LF157N [STMICROELECTRONICS]

WIDE BANDWIDTH SINGLE J-FET OPERATIONAL AMPLIFIERS; 宽带宽单J-FET运算放大器
LF157N
型号: LF157N
厂家: ST    ST
描述:

WIDE BANDWIDTH SINGLE J-FET OPERATIONAL AMPLIFIERS
宽带宽单J-FET运算放大器

运算放大器
文件: 总14页 (文件大小:251K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LF155-LF255-LF355  
LF156-LF256-LF356  
LF157-LF257-LF357  
WIDE BANDWIDTH  
SINGLE J-FET OPERATIONAL AMPLIFIERS  
.
.
.
HIGH INPUT IMPEDANCE J-FET INPUT  
STAGE  
HIGH SPEED J-FET OP-AMPs : up to 20MHz,  
50V/µs  
OFFSETVOLTAGEADJUSTMENTDOESNOT  
DEGRADE DRIFT OR COMMON-MODE  
REJECTION AS IN MOST OF MONOLITHIC  
AMPLIFIERS  
.
INTERNAL COMPENSATION AND LARGE  
N
DIP8  
(Plastic Package)  
D
SO8  
DIFFERENTIALINPUTVOLTAGECAPABILITY  
+
(UP TO VCC  
)
(Plastic Micropackage)  
TYPICAL APPLICATIONS  
.
.
.
.
PRECISION HIGH SPEED INTEGRATORS  
FAST D/A AND CONVERTERS  
HIGH IMPEDANCE BUFFERS  
WIDEBAND, LOW NOISE, LOW DRIFT  
AMPLIFIERS  
LOGARITHIMIC AMPLIFIERS  
PHOTOCELL AMPLIFIERS  
SAMPLE AND HOLD CIRCUITS  
ORDER CODES  
Package  
Temperature  
Range  
Part Number  
N
D
LF355, LF356, LF357  
LF255, LF256, LF257  
LF155, LF156, LF157  
Example : LF355N  
0oC, +70oC  
–40oC, +105oC  
–55oC, +125oC  
.
.
.
PIN CONNECTIONS (top view)  
1
2
3
4
8
DESCRIPTION  
7
6
5
These circuits are monolithic J-FET input operational  
amplifiers incorporating well matched, high voltage  
J-FET on the same chip with standardbipolar transis-  
tors.  
This amplifiers feature low input bias and offset cur-  
rents, low input offset voltage and input offset voltage  
drift,coupledwith offsetadjustwhichdoesnotdegrade  
driftor common-mode rejection.  
5 - Offset Null 2  
6 - Output  
7 - VCC  
1 - Offset Null 1  
2 - Inverting input  
3 - Non-inverting input  
The devicesarealso designedforhigh slew rate, wide  
bandwidth,extremelyfastsettlingtime,lowvoltageand  
current noise and a low 1/f noise level.  
+
-
8 - N.C.  
4 - VCC  
July 1998  
1/14  
LF155 - LF156 - LF157  
SCHEMATIC DIAGRAM  
Vio ADJUSTMENT  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
±22  
Unit  
V
VCC  
Vi  
Supply Voltage  
Input Voltage - (note 1)  
Differential Input Voltage  
Power Dissipation  
±20  
V
Vid  
Ptot  
±40  
V
570  
mW  
Output Short-circuit Duration  
Infinite  
Toper  
Operating Free Air Temperature Range  
LF155-LF156-LF157  
LF255-LF256-LF257  
LF355-LF356-LF357  
-55 to +125  
–40 to +105  
0 to 70  
oC  
oC  
Tstg  
Storage Temperature Range  
–65 to 150  
2/14  
LF155 - LF156 - LF157  
ELECTRICAL CHARACTERISTICS  
LF155, LF156, LF157  
LF255, LF256, LF257  
(unless otherwise specified)  
-55oC Tamb +125oC  
±5V VCC ≤ ±20V  
±5V VCC ≤ ±20V  
-40oC Tamb +105oC  
LF155 - LF156 - LF157  
LF255 - LF256 - LF257  
Symbol  
Parameter  
Unit  
Min.  
Typ.  
Max.  
Vio  
Input Offset Voltage (RS = 50)  
mV  
Tamb = 25oC  
3
5
7
6.2  
Tmin. Tamb Tmax.  
LF155, LF156, LF157  
LF255, LF256, LF257  
Iio  
Input Offset Current - (note 3)  
Tamb = 25oC  
3
20  
20  
1
pA  
nA  
nA  
Tmin. Tamb Tmax.  
LF155, LF156, LF157  
LF255, LF256, LF257  
Iib  
Input Bias Current - (note 3)  
Tamb = 25oC  
20  
100  
50  
5
pA  
nA  
nA  
Tmin. Tamb Tmax.  
LF155, LF156, LF157  
LF255, LF256, LF257  
Avd  
Large Signal Voltage Gain (RL = 2k, VO = ±10V, VCC = ±15V)  
V/mV  
Tamb = 25oC  
50  
25  
200  
100  
Tmin. Tamb Tmax.  
SVR  
ICC  
Supply Voltage Rejection Ratio - (note 4)  
85  
dB  
Supply Current (VCC = ±15V, no load)  
mA  
Tamb = 25oC  
LF155, LF255  
LF156, LF256  
LF157, LF257  
2
5
5
4
7
7
DVio  
Input Offset Voltage Drift (RS = 50)  
5
µV/oC  
µV/oC  
DVio/Vio Change in Average Temperature Coefficient with Vio adjust  
0.5  
(RS = 50) - (note 2)  
Input Common Mode Voltage Range (VCC = ±15V, Tamb = 25oC)  
Vicm  
±11  
+15.1  
-12  
V
CMR  
Common Mode Rejection Ratio  
85  
100  
dB  
V
±VOPP  
Output Voltage Swing (VCC = ±15V)  
RL = 10kΩ  
RL = 2kΩ  
±12  
±10  
±13  
±12  
GBP  
SR  
Gain Bandwidth Product (VCC = ±15V, Tamb = 25oC)  
MHz  
LF155, LF255  
LF156, LF256  
LF157, LF257  
2.5  
5
20  
Slew Rate (VCC = ±15V, Tamb = 25oC)  
V/µs  
AV = 1  
LF155, LF255  
LF156, LF256  
LF157, LF257  
5
12  
50  
1012  
3
7.5  
30  
AV = 5  
Ri  
Ci  
en  
Input Resistance (Tamb = 25oC)  
Input Capacitance (VCC = ±15V, Tamb = 25oC)  
pF  
Equivalent Input Noise Voltage  
nV  
Hz  
(VCC = ±15V, Tamb = 25oC, RS = 100)  
f = 1000Hz  
LF155, LF255  
20  
12  
12  
25  
15  
15  
LF156, LF256  
LF157, LF257  
LF155, LF255  
LF156, LF256  
LF157, LF257  
f = 100Hz  
in  
ts  
Equivalent Input Noise Current  
pA  
Hz  
µs  
(VCC = ±15V, Tamb = 25oC, f = 100Hz or f = 1000Hz)  
Settling Time (VCC = ±15V, Tamb = 25oC) - (note 5)  
0.01  
LF155, LF255  
4
LF156, LF256  
LF157, LF257  
1.5  
1.5  
3/14  
LF155 - LF156 - LF157  
ELECTRICAL CHARACTERISTICS  
LF355, LF356, LF357  
0oC Tamb +70oC  
VCC = ±15V, (unless otherwise specified)  
LF355 - LF356 - LF357  
Symbol  
Parameter  
Unit  
Min.  
Typ.  
Max.  
Vio  
Input Offset Voltage (RS = 50)  
mV  
Tamb = 25oC  
3
10  
13  
Tmin. Tamb Tmax.  
Iio  
Input Offset Current - (note 3)  
Tamb = 25oC  
3
50  
2
pA  
nA  
Tmin. Tamb Tmax.  
Iib  
Input Bias Current - (note 3)  
Tamb = 25oC  
20  
200  
8
pA  
nA  
Tmin. Tamb Tmax.  
Avd  
Large Signal Voltage Gain (RL = 2k, VO = ±10V)  
V/mV  
Tamb = 25oC  
25  
15  
200  
100  
Tmin. Tamb Tmax.  
SVR  
ICC  
Supply Voltage Rejection Ratio - (note 4)  
Supply Current (no load)  
80  
dB  
mA  
Tamb = 25oC  
LF355  
2
5
4
10  
LF356, LF357  
DVio  
Input Offset Voltage Drift (RS = 50) - (note 2)  
5
µV/oC  
DVio/Vio Change in Average Temperature Coefficient with Vio adjust  
0.5  
µV/oC  
(RS = 50)  
per mV  
Vicm  
Input Common Mode Voltage Range (Tamb = 25oC)  
±10  
+15.1  
-12  
V
CMR  
Common Mode Rejection Ratio  
80  
100  
dB  
V
±VOPP  
Output Voltage Swing  
RL = 10kΩ  
±12  
±10  
±13  
±12  
RL = 2kΩ  
GBP  
SR  
Gain Bandwidth Product Tamb = 25oC)  
LF355  
LF356  
LF357  
2.5  
5
20  
MHz  
Slew Rate (Tamb = 25oC)  
AV = 1  
V/µs  
LF355  
LF356  
LF357  
5
12  
50  
1012  
3
AV = 5  
Ri  
Ci  
en  
Input Resistance (Tamb = 25oC)  
Input Capacitance (Tamb = 25oC)  
pF  
Equivalent Input Noise Voltage (Tamb = 25oC, RS = 100)  
nV  
Hz  
f = 1000Hz  
LF355  
20  
12  
25  
15  
LF356, LF357  
LF355  
f = 100Hz  
LF356, LF357  
in  
ts  
Equivalent Input Noise Current  
pA  
Hz  
µs  
(Tamb = 25oC, f = 100Hz or f = 1000Hz)  
0.01  
Settling Time (Tamb = 25oC) - (note 5)  
LF355  
LF356, LF357  
4
1.5  
Notes : 1. Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.  
2. The temperature coefficient of the adjusted input offset voltage changes only a small amount (0.5µV/oC typically) for each mV  
of adjustment from its original unadjusted value. Common-mode rejection and open loop voltage gain are alsounaffected by  
offset adjustment.  
3. The input bias currents are junction leakage currents which approximately double for every 10oC increase in the junction  
temperature Tamb. Due to limited production test time, the input bias current measured is correlated to junction temperature.  
In a normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation,  
Ptot-Tamb =Tamb +Rth(j-a)xPtot where Rth(j-a)is the thermal resistance from junction to ambient. Use of a heatsink is recommended  
f input currents are to be kept to a minimum.  
4. Supply voltage rejection is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with  
common practise.  
5. Settling time is defined here, for a unity gain inverter connection using 2kresistors for the LF155, LF156 series. It is the time  
required for the error voltage (the voltage at the inverting input pin on the amplifier) to settle to within 0.01% of its final value from  
the time a 10V step input is applied to the inverter. For the LF157 series AV = -5, the feedback resistor from output to inputis 2kΩ  
and the output step is 10V.  
4/14  
LF155 - LF156 - LF157  
APPLICATION HINTS  
in a socket as an unilimited current surge throughthe  
resultingforward diode within the IC couldcausefusin-  
goftheinternalconductorsandresultina destroyedunit.  
Because these amplifiers are JFET rather than MOS-  
FET input op amps they do not require special han-  
dling.  
AllofthebiascurrentsintheseamplifiersaresetbyFET  
current sources. The drain currents for the amplifiers  
are therefore essentially independent of supply volt-  
ages.  
Aswith most amplifiers, care should betakenwith lead  
dress, componentsplacement and supply decoupling  
in orderto ensure stability. Forexample, resistorsfrom  
the output to an input should be placedwith the body  
close to theinputto minimiz ”pickupandmaximize the  
frequencyof the feedbackpole by minimizing the ca-  
pacitancefromthe input to ground.  
A feedbackpole is createdwhen the feedbackaround  
any amplifier is resistive. The parallel resistance and  
capacitancefromtheinput of thedevice(usuallythe in-  
vertinginput)toacgroundsetthefrequencyofthepole.In  
many instances the frequency of this pole is much  
greaterthanthe expected3 dBfrequencyof the closed  
loopgainand consequentlythereisnegligible effect on  
stability margin. However, if the feedback pole is less  
than approximately six time the expected 3 dB fre-  
quencyaleadcapacitorshould be placed from the out-  
putto the inputof the op amp. The value of that added  
capacitorshould be such that the RC time constant of  
thiscapacitorand theresistance it parallels is greater  
than or equal to the original feedbackpole time con-  
stant.  
The LF155, LF156, LF157 series areop amps with J-  
FETinput transistors. TheseJFETs havelarge reverse  
breakdown voltagesfromgatetosource or drain elimi-  
natingtheneed of clampsacrossthe inputs.Therefore  
large differential input voltagescan easily be accom-  
modatedwithoutalarge increaseof inputcurrents.The  
maximum differential input voltage is independent of  
the supplyvoltage.However, neitherof thenegativein-  
put voltagesshouldbe allowed to exceedthenegative  
supply as this will cause large currents to flow which  
can result in a destroyedunit. Exceeding the negative  
common-modelimit oneitherinputwillcauseareversal  
of thephasetotheoutputandforce the amplifier output  
to the correspondinghigh or lowstate. Exceedingthe  
negativecommon-mode limit on bothinputs will force  
theamplifieroutputtoa highstate.Inneithercasedoes  
a latch occur since raising the input back within the  
common-mode range again puts the input stage and  
thustheamplifierin a normaloperatingmode.Exceed-  
ingthepositivecommon-modelimit onasingleinputwill  
not changethephase of the output however, if bothin-  
putsexceedthe limit, theoutput of theamplifier will be  
forcedtoahighstate.Theseamplifierswill operatewith  
the common-mode input voltageequal to the positive  
supply. In fact, the common-modevoltagecanex-  
ceedthepositivesupplybyapproximately100mV inde-  
pendentof supply volt-age and over thefull operat-  
ingtemperaturerange.The positive suplly can there-  
forebeusedasa referenceonaninputas, forexample,  
in asupplycurrent monitorand/orlimiter. Precautions-  
shouldbe takentoensurethat thepowersupplyforthe  
integratedcircuit neverbecomesre-versedin polarity  
orthatthe unit isnot inadvertentlyin-stalledbackwards  
5/14  
LF155 - LF156 - LF157  
6/14  
LF155 - LF156 - LF157  
7/14  
LF155 - LF156 - LF157  
8/14  
LF155 - LF156 - LF157  
9/14  
LF155 - LF156 - LF157  
10/14  
LF155 - LF156 - LF157  
11/14  
LF155 - LF156 - LF157  
12/14  
LF155 - LF156 - LF157  
PACKAGE MECHANICAL DATA  
8 PINS - PLASTIC DIP  
Millimeters  
Inches  
Dimensions  
Min.  
Typ.  
Max.  
Min.  
Typ.  
Max.  
A
a1  
B
3.32  
0.131  
0.51  
1.15  
0.020  
0.045  
0.014  
0.008  
1.65  
0.55  
0.065  
0.022  
0.012  
0.430  
0.384  
b
0.356  
0.204  
b1  
D
E
0.304  
10.92  
9.75  
7.95  
0.313  
e
2.54  
7.62  
7.62  
0.100  
0.300  
0.300  
e3  
e4  
F
6.6  
0260  
0.200  
0.150  
0.060  
i
5.08  
3.81  
1.52  
L
3.18  
0.125  
Z
13/14  
LF155 - LF156 - LF157  
PACKAGE MECHANICAL DATA  
8 PINS - PLASTIC MICROPACKAGE (SO)  
Millimeters  
Dimensions  
Inches  
Typ.  
Min.  
Typ.  
Max.  
1.75  
0.25  
1.65  
0.85  
0.48  
0.25  
0.5  
Min.  
Max.  
0.069  
0.010  
0.065  
0.033  
0.019  
0.010  
0.020  
A
a1  
a2  
a3  
b
0.1  
0.004  
0.65  
0.35  
0.19  
0.25  
0.026  
0.014  
0.007  
0.010  
b1  
C
c1  
D
45o (typ.)  
4.8  
5.8  
5.0  
6.2  
0.189  
0.228  
0.197  
0.244  
E
e
1.27  
3.81  
0.050  
0.150  
e3  
F
3.8  
0.4  
4.0  
1.27  
0.6  
0.150  
0.016  
0.157  
0.050  
0.024  
L
M
S
8o (max.)  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the  
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifi-  
cations mentioned in this publication are subject to change without notice. This publication supersedes and replaces all infor-  
mation previously supplied. STMicroelectronics products are not authorized for use as critical components in life support  
devices or systems without express written approval of STMicroelectronics.  
The ST logo is a trademark of STMicroelectronics  
1998 STMicroelectronics – Printed in Italy – All Rights Reserved  
STMicroelectronics GROUP OF COMPANIES  
Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco  
The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdo m- U.S.A.  
14/14  

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