M27C2001-10C6 [STMICROELECTRONICS]

256KX8 OTPROM, 100ns, PQCC32, LEAD FREE, PLASTIC, LCC-32;
M27C2001-10C6
型号: M27C2001-10C6
厂家: ST    ST
描述:

256KX8 OTPROM, 100ns, PQCC32, LEAD FREE, PLASTIC, LCC-32

可编程只读存储器 OTP只读存储器 内存集成电路
文件: 总25页 (文件大小:200K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
M27C2001  
2 Mbit (256Kb x 8) UV EPROM and OTP EPROM  
Features  
5V ± 10% supply voltage in Read operation  
Access time: 55ns  
32  
32  
1
1
Low power consumption:  
– Active Current 30mA at 5MHz  
– Standby Current 100µA  
FDIP32W (F)  
PDIP32 (B)  
Programming voltage: 12.75V ± 0.25V  
Programming time: 100µs/word  
Electronic signature  
– Manufacturer Code: 20h  
– Device Code: 61h  
PL32 (C)  
TSOP32 (N)  
8 x 20 mm  
Packages  
®
– ECOPACK packages available.  
May 2006  
Rev 4  
1/25  
www.st.com  
1
M27C2001  
Contents  
Contents  
1
2
Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
2.1  
2.2  
2.3  
2.4  
2.5  
2.6  
2.7  
2.8  
2.9  
Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Two Line Output Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
System Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
PRESTO II Programming Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
2.10 Erasure operation (applies to UV EPOM) . . . . . . . . . . . . . . . . . . . . . . . 10  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Part numbering scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
3
4
5
6
7
2/25  
List of tables  
M27C2001  
List of tables  
Table 1.  
Table 2.  
Table 3.  
Table 4.  
Table 5.  
Table 6.  
Table 7.  
Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
AC Measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Capacitance (T = 25°C, f = 1 MHz). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
A
Read Mode DC Characteristics  
(T = 0 to 70°C or –40 to 85°C; V = 5V ± 5% or 5V ± 10%; V = V ) . . . . . . . . . . . . 14  
A
CC  
PP  
CC  
Table 8.  
Table 9.  
Programming Mode DC Characteristics  
(T = 25°C; V = 6.25V ± 0.25V; V = 12.75V ± 0.25V) . . . . . . . . . . . . . . . . . . . . . . . . 15  
A
CC  
PP  
Read Mode AC Characteristics  
(T = 0 to 70°C or –40 to 85°C; V = 5V ± 5% or 5V ± 10%; V = V ) . . . . . . . . . . . . 15  
A
CC  
PP  
CC  
Table 10.  
Table 11.  
Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Programming Mode AC Characteristics  
(T = 25°C; V = 6.25 ± 0.25V; V = 12.75 ± 0.25V) . . . . . . . . . . . . . . . . . . . . . . . . . 17  
A
CC  
PP  
Table 12.  
Table 13.  
Table 14.  
Table 15.  
Table 16.  
Table 17.  
FDIP32W - 32 pin Ceramic Frit-seal DIP, with window, Packae Mechanical Data. . . . . . 19  
PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Mechanical Data . . . . . . . . . . . . . 20  
PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data. . . . . . . . . . . . 21  
TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Mechanical Data. . . . 22  
Ordering Information Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
3/25  
M27C2001  
List of figures  
List of figures  
Figure 1.  
Figure 2.  
Figure 3.  
Figure 4.  
Figure 5.  
Figure 6.  
Figure 7.  
Figure 8.  
Figure 9.  
Logic Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
DIP Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
LCC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
TSOP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Programming Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
AC Testing Input Output Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
AC Testing Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Programming and Verify Modes AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Figure 10. FDIP32W - 32 pin Ceramic Frit-seal DIP, with window, Package Outline . . . . . . . . . . . . . 19  
Figure 11. PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Outline. . . . . . . . . . . . . . . . . . . . . 20  
Figure 12. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline . . . . . . . . . . . . . . . . . . . 21  
Figure 13. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Outline . . . . . . . . . . . 22  
4/25  
Summary description  
M27C2001  
1
Summary description  
The M27C2001 is a high speed 2 Mbit EPROM offered in the two ranges UV (ultra violet  
erase) and OTP (one time programmable). It is ideally suited for microprocessor systems  
requiring large programs and is organized as 262,144 by 8 bits.  
The FDIP32W (window ceramic frit-seal package) has a transparent lids which allow the  
user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be  
written to the device by following the programming procedure.  
For applications where the content is programmed only one time and erasure is not  
required, the M27C2001 is offered in PDIP32, PLCC32 and TSOP32 (8 x 20 mm) packages.  
®
In order to meet environmental requirements, ST offers the M27C2001 in ECOPACK  
packages.  
ECOPACK packages are Lead-free. The category of second Level Interconnect is marked  
on the package and on the inner box label, in compliance with JEDEC Standard JESD97.  
The maximum ratings related to soldering conditions are also markeon the inner box label.  
ECOPACK is an ST trademark. ECOPACK specifications are vailable at: www.st.com.  
Figure 1.  
Logic Diagram  
V
V
CC  
18  
8
A0-A17  
Q0-Q7  
P
E
M27C2001  
G
V
SS  
AI00716B  
Table 1.  
Signal Names  
A0-A17  
Address Inputs  
Data Outputs  
Chip Enable  
Output Enable  
Program  
Q0-Q7  
E
G
P
V
V
V
Program Supply  
Supply Voltage  
Ground  
PP  
CC  
SS  
5/25  
M27C2001  
Summary description  
Figure 2.  
DIP Connections  
V
1
2
3
4
5
6
7
8
9
32  
31  
V
P
PP  
CC  
A16  
A15  
A12  
A7  
30 A17  
29 A14  
28 A13  
27 A8  
A6  
A5  
26 A9  
A4  
25 A11  
M27C2001  
A3  
24  
23 A10  
22  
G
A2 10  
A1 11  
A0 12  
Q0 13  
Q1 14  
Q2 15  
E
21 Q7  
20 Q6  
19 Q5  
18 Q4  
17 Q3  
V
16  
SS  
AI00717  
Figure 3.  
LCC Connections  
1 32  
M27C2001  
17  
A7  
A14  
A13  
A8  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
Q0  
A9  
9
25 A11  
G
A10  
E
Q7  
AI00718  
6/25  
Summary description  
Figure 4.  
M27C2001  
TSOP Connections  
A11  
A9  
1
32  
G
A10  
E
A8  
A13  
A14  
A17  
P
Q7  
Q6  
Q5  
Q4  
Q3  
V
8
9
M27C2001 25  
CC  
(Normal)  
V
24  
V
SS  
PP  
A16  
A15  
A12  
A7  
Q2  
Q1  
Q0  
A0  
A1  
A2  
A3  
A6  
A5  
A4  
16  
17  
AI01153B  
7/25  
M27C2001  
Device operation  
2
Device operation  
The operating modes of the M27C2001 are listed in the Table 2. A single power supply is  
required in the read mode. All inputs are TTL levels except for V and 12V on A9 for  
PP  
Electronic Signature.  
2.1  
Read Mode  
The M27C2001 has two control functions, both of which must be logically active in order to  
obtain data at the outputs. Chip Enable (E) is the power control and should be used for  
device selection. Output Enable (G) is the output control and should be used to gate data to  
the output pins, independent of device selection. Assuming that the addresses are stable,  
the address access time (t  
) is equal to the delay from E to output (t  
). Data is  
AVQV  
ELQV  
available at the output after a delay of t  
from the falling edge of G, assuming that E has  
GLQV  
been low and the addresses have been stable for at least t  
-t  
.
AVQV GLQV  
2.2  
2.3  
Standby Mode  
The M27C2001 has a standby mode which reduces te supply current from 30mA to 100µA.  
The M27C2001 is placed in the standby mode by applying a CMOS high signal to the E  
input. When in the standby mode, the outputs are in a high impedance state, independent of  
the G input.  
Two Line Output Control  
Because EPROM devices are usually used in larger memory arrays, this product features a  
2 line control function which accommodates the use of multiple memory connection. The  
two line control fnction allows:  
a) the lowest possible memory power dissipation,  
b) complete assurance that output bus contention will not occur.  
For the most efficient use of these two control lines, E should be decoded and used as the  
primary device selecting function, while G should be made a common connection to all  
devices in the array and connected to the READ line from the system control bus. This  
ensures that all deselected memory devices are in their low power standby mode and that  
the output pins are only active when data is required from a particular memory device.  
2.4  
System Considerations  
The power switching characteristics of Advanced CMOS EPROMs require careful  
decoupling of the devices. The supply current, I , has three segments that are of interest to  
CC  
the system designer: the standby current level, the active current level, and transient current  
peaks that are produced by the falling and rising edges of E. The magnitude of the transient  
current peaks is dependent on the capacitive and inductive loading of the device at the  
output. The associated transient voltage peaks can be suppressed by complying with the  
two line output control and by properly selected decoupling capacitors. It is recommended  
that a 0.1µF ceramic capacitor be used on every device between V and V . This should  
CC  
SS  
8/25  
Device operation  
M27C2001  
be a high frequency capacitor of low inherent inductance and should be placed as close to  
the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used  
between V and V for every eight devices. The bulk capacitor should be located near the  
CC  
SS  
power supply connection point. The purpose of the bulk capacitor is to overcome the voltage  
drop caused by the inductive effects of PCB traces.  
2.5  
Programming  
When delivered (and after each erasure for UV EPROM), all bits of the M27C2001 are in the  
'1' state. Data is introduced by selectively programming '0's into the desired bit locations.  
Although only '0's will be programmed, both '1's and '0's can be present in the data word.  
The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The  
M27C2001 is in the programming mode when V input is at 12.75V, E is at V and P is  
PP  
IL  
pulsed to V . The data to be programmed is applied to 8 bits in parallel to the data output  
IL  
pins. The levels required for the address and data inputs are TTL. V is specified to be  
CC  
6.25 ± 0.25V.  
2.6  
PRESTO II Programming Algorithm  
PRESTO II Programming Algorithm allows the whole array to be programmed with a  
guaranteed margin, in a typical time of 26.5 seconds. Programming with PRESTO II  
consists of applying a sequence of 100µs prograpulses to each byte until a correct verify  
occurs (see Figure 5). During programming nd verify operation, a MARGIN MODE circuit is  
automatically activated in order to guatee that each cell is programmed with enough  
margin. No overprogram pulse is applied since the verify in MARGIN MODE provides the  
necessary margin to each programmed cell.  
Figure 5.  
Programming Flowchart  
V
= 6.25V, V  
= 12.75V  
PP  
CC  
n = 0  
P = 100µs Pulse  
NO  
NO  
++n  
VERIFY  
YES  
++ Addr  
= 25  
YES  
Last  
Addr  
NO  
FAIL  
YES  
CHECK ALL BYTES  
1st: V  
2nd: V  
= 6V  
= 4.2V  
CC  
CC  
AI00715C  
9/25  
 
M27C2001  
Device operation  
2.7  
Program Inhibit  
Programming of multiple M27C2001s in parallel with different data is also easily  
accomplished. Except for E, all like inputs including G of the parallel M27C2001 may be  
common. A TTL low level pulse applied to a M27C2001's P input, with E low and V at  
PP  
12.75V, will program that M27C2001. A high level E input inhibits the other M27C2001s from  
being programmed.  
2.8  
2.9  
Program Verify  
A verify (read) should be performed on the programmed bits to determine that they were  
correctly programmed. The verify is accomplished with E and G at V , P at V , V at  
IL  
IH  
PP  
12.75V and V  
at 6.25V.  
CC  
Electronic Signature  
The Electronic Signature (ES) mode allows the reading out of a bincode from an  
EPROM that will identify its manufacturer and type. This modis intended for use by  
programming equipment to automatically match the device to be programmed with its  
corresponding programming algorithm. The ES mode is functional in the 25 ± 5°C ambient  
temperature range that is required when programming the M27C2001. To activate the ES  
mode, the programming equipment must force 15 to 12.5V on address line A9 of the  
M27C2001 with V = V  
= 5V. Two identer bytes may then be sequenced from the  
PP  
CC  
device outputs by toggling address lin0 from V to V . All other address lines must be  
IL  
IH  
held at V during Electronic Signature mode. Byte 0 (A0 = V ) represents the manufacturer  
IL  
IL  
code and byte 1 (A0 = V ) the device identifier code. For the STMicroelectronics  
IH  
M27C2001, these two identifier bytes are given in Table 3 and can be read-out on outputs  
Q7 to Q0.  
2.10  
Erasure operation (applies to UV EPROM)  
The erasure characteristics of the M27C2001 are such that erasure begins when the cells  
are exposed to light with wavelengths shorter than approximately 4000Å. It should be noted  
that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000Å  
range. Data shows that constant exposure to room level fluorescent lighting could erase a  
typical M27C2001 in about 3 years, while it would take approximately 1 week to cause  
erasure when exposed to direct sunlight. If the M27C2001 is to be exposed to these types of  
lighting conditions for extended periods of time, it is suggested that opaque labels be put  
over the M27C2001 window to prevent unintentional erasure. The recommended erasure  
procedure for the M27C2001 is exposure to short wave ultraviolet light which has  
wavelength of 2537Å. The integrated dose (i.e. UV intensity x exposure time) for erasure  
should be a minimum of 15W-s/cm2. The erasure time with this dosage is approximately 15  
to 20 minutes using an ultraviolet lamp with 12000µW/cm2 power rating. The M27C2001  
should be placed within 2.5cm (1 inch) of the lamp tubes during the erasure. Some lamps  
have a filter on their tubes which should be removed before erasure.  
10/25  
Device operation  
M27C2001  
Q7-Q0  
Table 2.  
Operating Modes  
Mode  
E
G
P
A9  
V
PP  
Read  
V
V
X
X
X
X
X
X
X
V
V
or V  
or V  
Data Out  
Hi-Z  
IL  
IL  
IL  
IL  
IH  
IH  
IL  
IH  
IH  
CC  
CC  
SS  
SS  
Output Disable  
Program  
V
V
V
V
V
X
V
Pulse  
V
Data In  
Data Out  
Hi-Z  
IL  
PP  
PP  
PP  
Verify  
V
V
V
IL  
IH  
Program Inhibit  
Standby  
V
V
X
X
V
X
X
V
or V  
Hi-Z  
CC  
SS  
Electronic Signature  
V
V
V
V
V
CC  
Codes  
IL  
IL  
IH  
ID  
Note:  
X = VIH or VIL, VID = 12 ± 0.5V.  
Table 3. Electronic Signature  
Identifier  
Hex  
Data  
A0  
Q7  
Q6  
Q5  
Q4  
Q3  
Q2  
Q1  
Q0  
Manufacturer’s  
Code  
V
0
0
0
1
1
1
0
0
0
0
0
0
0
0
1
20h  
61h  
IL  
Device Code  
V
IH  
11/25  
M27C2001  
Maximum ratings  
3
Maximum ratings  
Except for the rating "Operating Temperature Range", stresses above those listed in the  
Table 4 may cause permanent damage to the device. These are stress ratings only and  
operation of the device at these or any other conditions above those indicated in the  
Operating sections of this specification is not implied. Exposure to Absolute Maximum  
Rating conditions for extended periods may affect device reliability. Refer also to the  
STMicroelectronics SURE Program and other relevant quality documents.  
Table 4.  
Symbol  
Absolute Maximum Ratings  
Parameter  
Value  
Unit  
(1)  
T
Ambient Operating Temperature  
Temperature Under Bias  
Storage Temperature  
–40 to 125  
–50 to 125  
–6to 150  
–2 to 7  
°C  
°C  
°C  
V
A
T
BIAS  
T
STG  
(2)  
V
Input or Output Voltage (except A9)  
Supply Voltage  
IO  
V
–2 to 7  
V
CC  
(2)  
V
A9 Voltage  
–2 to 13.5  
–2 to 14  
V
A9  
V
Program Supply Voltage  
V
PP  
1. Depends on range.  
2. Minimum DC voltage on Input or Output is V with possible undershoot to –2.0V for a period less than  
20ns. Maximum DCvoltage on Output is VC.5V with possible overshoot to VCC +2V for a period less  
than 20ns.  
12/25  
 
 
DC and AC parameters  
M27C2001  
4
DC and AC parameters  
This section summarizes the operating measurement conditions, and the DC and AC  
characteristics of the device. The parameters in the DC and AC characteristics Tables that  
follow, are derived from tests performed under the Measurement Conditions summarized in  
Table 5, Operating and AC Measurement Conditions. Designers should check that the  
operating conditions in their circuit match the operating conditions when relying on the  
quoted parameters.  
Table 5.  
AC Measurement conditions  
High Speed  
Standard  
Input Rise and Fall Times  
10ns  
0 to 3V  
1.5V  
20ns  
Input Pulse Voltages  
0.4V to 2.4V  
0.8V and 2V  
Input and Output Timing Ref. Voltages  
(1)  
Table 6.  
Symbol  
Capacitance  
(T = 25°C, f = 1 MHz)  
A
Parameter  
Test Condition  
0V  
Min  
Max  
Unit  
C
C
Input Capacitance  
Output Capacitance  
V
6
pF  
pF  
IN  
IN  
= 0V  
12  
OUT  
UT  
1. Sampled only, not 100% tested  
Figure 6.  
AC Testing Input Output Waveform  
High Speed  
3V  
1.5V  
0V  
Standard  
2.4V  
2.0V  
0.8V  
0.4V  
AI01822  
13/25  
 
M27C2001  
Figure 7.  
DC and AC parameters  
AC Testing Load Circuit  
1.3V  
1N914  
3.3k  
DEVICE  
UNDER  
TEST  
OUT  
C
L
C
C
C
= 30pF for High Speed  
= 100pF for Standard  
includes JIG capacitance  
L
L
L
AI01823B  
(1)  
Table 7.  
Symbol  
Read Mode DC Characteristics  
(T = 0 to 70°C or –40 to 85°C; V = 5V ± 5% or 5V ± 10%; V = V )  
A
CC  
PP  
CC  
Parameter  
Test Condtion  
0V V V  
Min  
Max  
Unit  
I
Input Leakage Current  
Output Leakage Current  
Supply Current  
±10  
±10  
30  
µA  
µA  
LI  
IN  
CC  
I
I
V  
V  
LO  
OUT CC  
mA  
E = V , G = V ,  
CC  
IL  
IL  
I
= 0mA, f = 5MHz  
OUT  
I
I
Supply Current (Standby) TTL  
Supply Current (Stadby) CMOS  
Program Curren
E = V  
1
mA  
µA  
µA  
V
CC1  
CC2  
IH  
E > V – 0.2V  
100  
10  
CC  
I
V
= V  
PP CC  
PP  
V
Input Low Voltage  
–0.3  
2
0.8  
IL  
(2)  
V
Input High Voltage  
V
+ 1  
CC  
V
IH  
V
Output Low Voltage  
I
= 2.1mA  
= –400µA  
= –100µA  
0.4  
V
O
OL  
Output High Voltage TTL  
Output High Voltage CMOS  
I
I
2.4  
V
V
OH  
OH  
OH  
V
– 0.7V  
V
CC  
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP  
2. Maximum DC voltage on Output is VCC +0.5V.  
.
14/25  
DC and AC parameters  
M27C2001  
(1)  
Table 8.  
Symbol  
Programming Mode DC Characteristics  
(T = 25°C; V = 6.25V ± 0.25V; V = 12.75V ± 0.25V)  
A
CC  
PP  
Parameter  
Test Condition  
Min  
Max  
Unit  
I
Input Leakage Current  
Supply Current  
0 V V  
IH  
±10  
50  
µA  
mA  
mA  
V
LI  
IN  
I
CC  
I
Program Current  
Input Low Voltage  
Input High Voltage  
Output Low Voltage  
Output High Voltage TTL  
A9 Voltage  
E = V  
50  
PP  
IL  
V
–0.3  
2
0.8  
IL  
V
V
+ 0.5  
CC  
V
IH  
V
I
= 2.1mA  
OL  
0.4  
V
OL  
V
I
= –400µA  
OH  
2.4  
V
OH  
V
11.5  
12.5  
V
ID  
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP  
.
(1)  
Table 9.  
Symbol  
Read Mode AC Characteristics  
(T = 0 to 70°C or –40 to 85°C; V = 5V ± 5% or 5V ± 10%; V = V  
)
A
CC  
PP  
CC  
M27C2001  
Test  
Condition  
(2)  
Alt  
Parameter  
-55  
Min  
-70  
-80  
-90  
Unit  
x Min Max Min Max Min Max  
t
t
55  
55  
30  
70  
70  
35  
80  
80  
40  
90  
90  
40  
ns  
ns  
ns  
E = V ,  
Address Valid  
to Output  
Valid  
AVQV  
ACC  
IL  
G = V  
IL  
t
t
G = V  
Chip Enable  
Low to Outut  
Valid  
ELQV  
CE  
IL  
t
t
E = V  
OutputEnable  
Low to Output  
Valid  
GLQV  
OE  
IL  
)  
t
t
Chip Enable  
High to Output  
Hi-Z  
EHQZ  
DF  
G = V  
E = V  
0
0
30  
30  
0
0
30  
30  
0
0
30  
30  
0
0
30  
30  
ns  
ns  
IL  
(3)  
t
t
OutputEnable  
High to Output  
Hi-Z  
GHQZ  
DF  
IL  
t
t
0
0
0
0
ns  
E = V ,  
AXQX  
OH  
Address  
Transition to  
Output  
IL  
G = V  
IL  
Transition  
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP  
2. In case of 55ns speed see High Speed AC measurement conditions.  
3. Sampled only, not 100% tested.  
.
15/25  
 
M27C2001  
DC and AC parameters  
(1)  
Table 10.  
Read Mode AC Characteristics  
= 5V ± 5% or 5V ± 10%; V = V )  
CC  
(T = 0 to 70°C or –40 to 85°C; V  
A
CC  
PP  
M27C2001  
-12 -15/-20/-25 Unit  
Symbol  
Alt  
Parameter  
Test Condition  
-10  
Min Max Min Max Min Max  
t
t
E = V , G = V  
100  
100  
50  
120  
120  
50  
150  
150  
60  
ns  
ns  
ns  
Address Valid to  
Output Valid  
AVQV  
ACC  
IL  
IL  
t
t
G = V  
Chip Enable Low  
to Output Valid  
ELQV  
CE  
IL  
t
t
E = V  
Output Enable  
Low to Output  
Valid  
GLQV  
OE  
IL  
(2)  
t
t
t
t
G = V  
0
0
0
30  
0  
0
0
0
40  
40  
0
0
0
50  
50  
ns  
ns  
ns  
Chip Enable  
High to Output  
Hi-Z  
EHQZ  
DF  
DF  
IL  
(2)  
t
E = V  
Output Enable  
High to Output  
Hi-Z  
GHQZ  
IL  
t
E = V , = V  
Address  
AXQX  
OH  
L  
IL  
Transition to  
Output Transition  
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP  
.
2. Sampled only, not 100% tested.  
16/25  
 
DC and AC parameters  
M27C2001  
Figure 8.  
Read Mode AC Waveforms  
VALID  
tAVQV  
VALID  
A0-A17  
E
tAXQX  
tEHQZ  
tGHQZ  
tGLQV  
G
tELQV  
Hi-Z  
Q0-Q7  
AI00719B  
(1)  
Table 11.  
Symbol  
Programming Mode AC Characteristics  
(T = 25°C; V = 6.25 ± 0.25V; V = 12.75 ± 0.25V)  
A
CC  
PP  
Test  
Condition  
Alt  
Parameter  
Min  
Max  
Unit  
t
t
t
Address Valid to Program Low  
Input Valid to Program Low  
2
2
µs  
µs  
µs  
µs  
µs  
µs  
µs  
µs  
ns  
ns  
ns  
AVPL  
AS  
t
QVPL  
DS  
t
t
t
t
V
V
High to Program Low  
High to Program Low  
2
VPHPL  
VCHPL  
VPS  
VCS  
CES  
PP  
CC  
t
2
t
Chip able Low to Program Low  
Program Pulse Width  
2
ELPL  
PLPH  
t
t
95  
2
105  
PW  
t
t
Program High to Input Transition  
Input Transition to Output Enable Low  
Output Enable Low to Output Valid  
Output Enable High to Output Hi-Z  
Output Enable High to Address Transition  
PHQX  
QXG
GLQV  
DH  
t
t
t
2
OES  
t
100  
130  
OE  
(2)  
t
t
0
0
GHQZ  
DFP  
t
t
AH  
GHAX  
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP  
2. Sampled only, not 100% tested.  
.
17/25  
M27C2001  
DC and AC parameters  
Figure 9.  
Programming and Verify Modes AC Waveforms  
VALID  
A0-A17  
tAVPL  
tQVPL  
tVPHPL  
tVCHPL  
tELPL  
Q0-Q7  
DATA IN  
DATA OUT  
tPHQX  
V
PP  
tGLQV  
tGHQZ  
tGHAX  
V
CC  
E
P
tPLPH  
tQXGL  
G
PROGRAM  
VERIFY  
AI00720  
18/25  
Package mechanical data  
M27C2001  
5
Package mechanical data  
Table 12.  
Symbol  
FDIP32W - 32 pin Ceramic Frit-seal DIP, with window, Package Mechanical  
Data  
mm  
Min  
inches  
Min  
Typ  
Max  
Typ  
Max  
A
A1  
A2  
A3  
B
5.72  
1.40  
4.57  
4.50  
0.56  
0.225  
0.055  
0.180  
0.177  
0.022  
0.51  
3.91  
3.89  
0.41  
0.020  
0.154  
0.153  
0.016  
B1  
C
1.45  
0.057  
0.23  
41.73  
0.30  
42.04  
0.009  
143  
0.012  
1.655  
D
D2  
E
38.10  
15.24  
1.500  
0.600  
E1  
e
13.06  
13.36  
0.514  
0.526  
2.54  
0.100  
0.590  
eA  
eB  
L
14.99  
16.18  
3.18  
1.52  
18.03  
0.637  
0.125  
0.060  
0.710  
S
2.49  
0.098  
7.11  
0.280  
α
4°  
11°  
4°  
11°  
N
32  
32  
Figure 10. IP32W - 32 pin Ceramic Frit-seal DIP, with window, Package Outline  
A2  
A3  
A1  
A
L
α
B1  
B
e
C
eA  
eB  
D2  
D
S
N
1
E1  
E
FDIPW-a  
1. Drawing is not to scale.  
19/25  
M27C2001  
Package mechanical data  
Table 13.  
Symbol  
PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Mechanical Data  
mm  
Min  
inches  
Min  
Typ  
Max  
Typ  
Max  
A
A1  
A2  
B
0.38  
3.56  
0.38  
5.08  
0.015  
0.140  
0.015  
0.200  
4.06  
0.51  
0.160  
0.020  
B1  
C
1.52  
0.060  
0.20  
41.78  
0.30  
42.04  
0.008  
1.645  
0.012  
1.655  
D
D2  
E
38.10  
15.24  
1.500  
0.600  
E1  
e1  
eA  
eB  
L
13.59  
13.84  
035  
0.545  
2.54  
0.100  
0.600  
15.24  
15.24  
3.18  
1.78  
0°  
17.78  
3.43  
2.03  
0°  
0.600  
0.125  
0.070  
0°  
0.700  
0.135  
0.080  
10°  
S
α
N
32  
32  
Figure 11. PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Outline  
A2  
A
L
A1  
e1  
α
C
B1  
B
eA  
eB  
D2  
D
S
N
1
E1  
E
PDIP  
1. Drawing is not to scale.  
20/25  
Package mechanical data  
M27C2001  
Table 14.  
Symbol  
PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data  
millimeters  
inches  
Typ  
Min  
Max  
Typ  
Min  
Max  
A
A1  
A2  
B
2.54  
1.52  
0.38  
0.33  
0.66  
12.32  
11.35  
9.91  
3.56  
2.41  
0.100  
0.060  
0.015  
0.013  
0.026  
0.485  
0.447  
0.390  
0.140  
0.095  
0.53  
0.81  
0.021  
0.032  
0.495  
0.455  
0.430  
B1  
D
12.57  
11.56  
10.92  
D1  
D2  
e
1.27  
0.89  
0.050  
0.035  
E
14.86  
13.89  
12.45  
0.00  
15.11  
14.10  
13.46  
0.25  
0.585  
0.547  
0.490  
0.000  
0.595  
0.555  
0.530  
0.010  
E1  
E2  
F
R
N
32  
7
32  
7
Nd  
Ne  
CP  
9
9
0.10  
0.004  
Figure 12. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline  
D
A1  
D1  
A2  
1 N  
B1  
e
E2  
E3  
E1 E  
F
B
0.51 (.020)  
E2  
1.14 (.045)  
Nd  
A
R
CP  
D2  
D2  
PLCC-B  
1. Drawing is not to scale.  
21/25  
 
M27C2001  
Package mechanical data  
Table 15.  
Symb  
TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package  
Mechanical Data  
mm  
inches  
Min  
Typ  
Min  
Max  
Typ  
Max  
A
A1  
A2  
B
1.20  
0.15  
1.05  
0.27  
0.21  
20.20  
18.50  
8.10  
0.047  
0.007  
0.041  
0.011  
0.008  
0.795  
0.728  
0.319  
0.05  
0.95  
0.15  
0.10  
19.80  
18.30  
7.90  
0.002  
0.037  
0.006  
0.004  
0.780  
0.720  
0.311  
C
D
D1  
E
e
0.50  
0.020  
L
0.50  
0°  
0.70  
5°  
0.020  
0°  
0.028  
5°  
α
N
32  
32  
CP  
0.10  
0.004  
Figure 13. TSOP32 - 32 lead Plastic ThSmall Outline, 8 x 20 mm, Package Outline  
A2  
1
N
e
E
B
N/2  
D1  
D
A
CP  
DIE  
C
TSOP-a  
A1  
α
L
1. Drawing is not to scale.  
22/25  
Part numbering scheme  
M27C2001  
6
Part numbering scheme  
Table 16.  
Ordering Information Scheme  
Example:  
M27C2001  
-55 X  
C
1 TR  
Device Type  
M27  
Supply Voltage  
C = 5V  
Device Function  
2001 = 2 Mbit (256Kb x 8)  
Speed  
(1)  
– 55  
= 55 ns  
– 70 = 70 ns  
– 80 = 80 ns  
– 90 = 90 ns  
– 10 = 100 ns  
(2)  
Not For New Design  
– 12 = 120 ns  
– 15 = 150 ns  
– 20 = 200 ns  
– 25 = 250 ns  
V
Tolerance  
CC  
X = ± 5%  
blank = ± 10%  
Packag
F = FDIP32W  
B = PDIP32  
C = PLCC32  
N = TSOP32: 8 x 20 mm  
Temperature Range  
1 = 0 to 70°C  
6 = –40 to 85°C  
Options  
TR = Tape & Reel Packing  
1. High Speed, see AC Characteristics section for further information.  
2. These speeds are replaced by the 100ns.  
For a list of available options (Speed, Package, etc....) or for further information on any  
aspect of this de-vice, please contact the STMicroelectronics Sales Office nearest to you.  
23/25  
M27C2001  
Revision history  
7
Revision history  
Structure  
Table 17.  
Date  
Document revision history  
Revision  
Changes  
June 1998  
1
2
3
4
First Issue.  
20-Sep-2000  
29-Nov-2000  
10-May-2006  
AN620 Reference removed.  
PLCC codification changed (Table 14).  
Structure modified, ECOPACK text added.  
LCCC32W package and the additional burn-in option (X) from  
Ordering information scheme removed.  
24/25  
M27C2001  
Please Read Carefully:  
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25/25  

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