M27C4002-12XN6X [STMICROELECTRONICS]
4 Mbit 256Kb x16 UV EPROM and OTP EPROM; 4兆位256Kb的X16 UV EPROM和OTP EPROM
| 型号： | M27C4002-12XN6X |
| 厂家： | 
ST |
| 描述： | 4 Mbit 256Kb x16 UV EPROM and OTP EPROM |
| 文件： | 总16页 (文件大小：115K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M27C4002
4 Mbit (256Kb x16) UV EPROM and OTP EPROM
5V ± 10% SUPPLYVOLTAGEin READ
OPERATION
FASTACCESS TIME: 45ns
LOW POWER CONSUMPTION:
– Active Current 70mA at 10MHz
– StandbyCurrent 100µA
40
40
1
1
PROGRAMMING VOLTAGE: 12.75V ± 0.25V
PROGRAMMING TIME: 100µs/byte (typical)
ELECTRONIC SIGNATURE
– ManufacturerCode: 0020h
– Device Code: 0044h
FDIP40W (F)
PDIP40 (B)
JLCC44W (J)
DESCRIPTION
The M27C4002 is a 4 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for micro-
processorsystemsrequiring large programsand is
organised as 262,144 words of 16 bits.
PLCC44 (C)
TSOP40 (N)
10 x 20 mm
The FDIP40W (window ceramic frit-seal package)
and the JLCC44W (J-lead chip carrier packages)
have transparent lids which allow the user to ex-
pose the chip to ultraviolet light to erase the bit
pattern. A new pattern can then be written to the
device by following the programming procedure.
Figure 1. Logic Diagram
For applications wherethe content is programmed
only one time and erasure is not required, the
M27C4002 is offered in PDIP40, PLCC44 and
TSOP40 (10 x 20 mm) packages.
V
V
PP
CC
18
16
A0-A17
Q0-Q15
Table 1. Signal Names
E
M27C4002
A0-A17
Q0-Q15
E
Address Inputs
Data Outputs
Chip Enable
Output Enable
Program Supply
Supply Voltage
Ground
G
G
VPP
V
SS
VCC
AI00727B
VSS
September 1998
1/16
M27C4002
Figure 2A. DIP Pin Connections
Figure 2B. LCC Pin Connections
V
1
2
3
4
5
6
7
8
9
40
V
CC
PP
E
39 A17
38 A16
37 A15
36 A14
35 A13
34 A12
33 A11
32 A10
31 A9
Q15
Q14
Q13
Q12
Q11
Q10
Q9
1 44
Q12
A13
A12
A11
A10
A9
Q11
Q10
Q9
Q8
Q8 10
M27C4002
V
12
M27C4002
34
V
SS
SS
V
SS
11
30
V
SS
NC
Q7
Q6
Q5
Q4
NC
A8
A7
A6
A5
Q7 12
Q6 13
Q5 14
Q4 15
Q3 16
Q2 17
Q1 18
Q0 19
29 A8
28 A7
27 A6
26 A5
25 A4
24 A3
23 A2
22 A1
21 A0
23
AI00729
G
20
AI00728
Warning: NC = Not Connected.
DEVICE OPERATION
Figure 2C. TSOP Pin Connections
The operating modes of the M27C4002 are listed
in the OperatingModes table. A single power sup-
plyis requiredin theread mode. Allinputs are TTL
levels except for Vpp and 12V on A9 for Electronic
Signature.
A9
A10
A11
A12
A13
A14
A15
A16
A17
1
40
V
SS
A8
A7
A6
Read Mode
A5
The M27C4002 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
OutputEnable(G) is the outputcontrol and should
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, the address access time
(tAVQV)is equalto thedelayfrom Etooutput(tELQV).
Datais availableat theoutputafter a delayof tGLQV
from the falling edge of G, assuming that E has
been low and the addresses have been stable for
A4
A3
A2
A1
V
10 M27C4002 31
A0
CC
(Normal)
V
11
30
G
PP
E
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
at least tAVQV-tGLQV
.
Standby Mode
The M27C4002 has a standby mode which re-
ducesthe supplycurrentfrom 50mAto100µA. The
M27C4002 is placed in the standby mode by ap-
plying a CMOS high signal to the E input. Whenin
thestandby mode, theoutputs are in a high imped-
ance state, independentof the G input.
DQ8
20
21
V
SS
AI01831
2/16
M27C4002
Table 2. Absolute Maximum Ratings (1)
Symbol
TA
Parameter
Ambient Operating Temperature (3)
Temperature Under Bias
Storage Temperature
Value
–40 to 125
–50 to 125
–65 to 150
–2 to 7
Unit
C
°
TBIAS
TSTG
C
C
°
°
(2)
VIO
Input or Output Voltages (except A9)
Supply Voltage
V
V
V
V
VCC
–2 to 7
(2)
VA9
A9 Voltage
–2 to 13.5
–2 to 14
VPP
Program Supply Voltage
Notes: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”AbsoluteMaximum Ratings”
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other
relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0Vfor a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.
3. Depends on range.
Table 3. Operating Modes
Mode
E
VIL
G
A9
X
VPP
VCC or VSS
VCC or VSS
VPP
Q0 - Q15
Data Out
Hi-Z
Read
VIL
VIH
VIH
VIL
VIH
X
Output Disable
Program
VIL
X
VIL Pulse
VIH
X
Data In
Data Out
Hi-Z
Verify
X
VPP
Program Inhibit
Standby
VIH
X
VPP
VIH
X
VCC or VSS
VCC
Hi-Z
Electronic Signature
VIL
VIL
VID
Codes
Note: X = VIH or VIL, VID = 12V ± 0.5V
Table 4. Electronic Signature
Identifier
Manufacturer’s Code
Device Code
A0
VIL
VIH
Q7
0
Q6
0
Q5
Q4
0
Q3
Q2
0
Q1
0
Q0
0
Hex Data
1
0
0
0
20h
44h
0
1
0
1
0
0
Note: Outputs Q8-Q15 are set to ’0’.
Two Line Output Control
Forthe mostefficientuse of thesetwo controllines,
E should be decoded and used as the primary
device selecting function,while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
controlbus. This ensures that all deselectedmem-
ory devices are in their low power standby mode
and that the output pins are only active when data
is required from a particular memory device.
BecauseEPROMsare usuallyusedin largermem-
ory arrays, the product features a 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
3/16
M27C4002
Table 5. AC Measurement Conditions
High Speed
10ns
Standard
20ns
Input Rise and Fall Times
≤
≤
Input Pulse Voltages
0 to 3V
1.5V
0.4V to 2.4V
0.8V and 2V
Input and Output Timing Ref. Voltages
Figure 3. AC Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
1.3V
High Speed
1N914
3V
1.5V
3.3kΩ
0V
DEVICE
UNDER
TEST
OUT
Standard
C
L
2.4V
2.0V
0.8V
0.4V
C
C
C
= 30pF for High Speed
= 100pF for Standard
includes JIG capacitance
L
L
L
AI01822
AI01823B
Table 6. Capacitance(1) (TA = 25 °C, f = 1 MHz )
Symbol
CIN
Parameter
Input Capacitance
Output Capacitance
Test Condition
VIN = 0V
Min
Max
Unit
pF
6
COUT
VOUT = 0V
12
pF
Note: 1. Sampled only, not 100% tested.
System Considerations
control and by properly selected decoupling ca-
pacitors. It is recommended that a 0.1µF ceramic
capacitor be used on every device between VCC
andVSS. Thisshouldbe a highfrequencycapacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitor should be used
betweenVCC and VSS for everyeight devices. The
bulk capacitor should be located near the power
supply connection point.The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effectsof PCBtraces.
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. Themagnitudeof
the transient current peaks is dependent on the
output capacitive and inductive loading of the de-
vice.
The associated transient voltage peaks can be
suppressed by complying with the two line output
4/16
M27C4002
Table 7. Read Mode DC Characteristics(1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC
)
Symbol
ILI
Parameter
Input Leakage Current
Output Leakage Current
Test Condition
Min
Max
Unit
0V ≤ VIN ≤ VCC
±10
µA
ILO
0V
V
OUT
V
CC
10
±
A
µ
≤
≤
E = VIL, G = VIL,
70
50
mA
IOUT = 0mA, f = 10MHz
ICC
Supply Current
E = VIL, G = VIL,
OUT = 0mA, f = 5MHz
mA
mA
I
ICC1
ICC2
IPP
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
E = VIH
E > VCC – 0.2V
VPP = VCC
1
100
10
A
µ
µA
V
VIL
Input Low Voltage
–0.3
2
0.8
(2)
VIH
Input High Voltage
VCC + 1
0.4
V
VOL
VOH
Output Low Voltage
IOL = 2.1mA
V
Output High Voltage TTL
Output High Voltage CMOS
IOH = –400µA
2.4
V
IOH = –100 A
VCC – 0.7V
V
µ
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Maximum DC voltage on Output is VCC +0.5V.
Table 8A. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC
)
M27C4002
-60 (3)
Min Max Min Max Min Max Min Max
Test
Condition
Symbol
Alt
Parameter
Unit
-45 (3)
-80
-90
Address Valid to
Output Valid
E = VIL,
G = VIL
tAVQV
tELQV
tGLQV
tACC
tCE
tOE
tDF
45
45
25
30
30
60
60
30
30
30
80
80
40
30
30
90
90
40
30
30
ns
ns
ns
ns
ns
ns
Chip Enable Low
to Output Valid
G = VIL
E = VIL
G = VIL
E = VIL
Output Enable
Low to Output Valid
Chip Enable High
to Output Hi-Z
(2)
tEHQZ
0
0
0
0
0
0
0
0
0
0
0
0
Output Enable
High to Output Hi-Z
(2)
tGHQZ
tDF
Address Transition
to Output Transition
E = VIL,
G = VIL
tAXQX
tOH
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
3. In case of 70ns speed see High Speed AC Measurement conditions.
5/16
M27C4002
Table 8B. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC
)
M27C4002
Test
Unit
Symbol
Alt
Parameter
Condition
-10
-12
-15
-20
Min Max Min Max Min Max Min Max
Address Valid to
Output Valid
E = VIL,
G = VIL
tAVQV
tELQV
tACC
tCE
100
100
120
120
150
150
200
200
ns
ns
Chip Enable Low
to Output Valid
G = VIL
E = VIL
G = VIL
E = VIL
Output Enable
Low to Output
Valid
tGLQV
tOE
tDF
tDF
50
30
30
60
40
40
60
50
50
70
80
80
ns
ns
ns
Chip Enable High
to Output Hi-Z
(2)
tEHQZ
0
0
0
0
0
0
0
0
Output Enable
High to Output
Hi-Z
(2)
tGHQZ
Address
Transition to
Output Transition
E = VIL,
G = VIL
tAXQX
tOH
0
0
0
0
ns
Figure 5. Read Mode AC Waveforms
VALID
tAVQV
VALID
A0-A17
tAXQX
E
tEHQZ
tGHQZ
tGLQV
G
tELQV
Hi-Z
Q0-Q15
AI00731B
Programming
changea ’0’ to a ’1’is by die exposureto ultraviolet
light (UV EPROM). The M27C4002 is in the pro-
gramming mode when VPP input is at 12.75V, G is
at VIH and E is pulsed to VIL. The data to be
programmed is applied to 16 bits in parallel to the
data output pins. The levels required for the ad-
dress and data inputs are TTL. VCC is specified to
be 6.25V ± 0.25V.
When delivered (and after each erasure for UV
EPROM), all bits of the M27C4002 are in the ’1’
state. Data is introduced by selectively program-
ming ’0’s into the desired bit locations. Although
only ’0’s will be programmed,both ’1’s and’0’s can
be present in the data word. The only way to
6/16
M27C4002
Table 9. ProgrammingMode DC Characteristics (1)
(TA = 25 °C; VCC = 6.25V ± 0.25V;VPP = 12.75V ± 0.25V)
Symbol
ILI
Parameter
Input Leakage Current
Supply Current
Test Condition
Min
Max
10
Unit
0
V
IN
V
CC
A
µ
≤
≤
±
ICC
50
mA
mA
V
IPP
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
A9 Voltage
E = VIL
50
0.8
VIL
–0.3
2
VIH
VCC + 0.5
0.4
V
VOL
VOH
VID
IOL = 2.1mA
IOH = –400 A
V
2.4
V
µ
11.5
12.5
V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
.
Table 10. ProgrammingMode AC Characteristics(1)
(TA = 25 °C; VCC = 6.25V ± 0.25V;VPP = 12.75V ± 0.25V)
Symbol
tAVEL
Alt
tAS
Parameter
Test Condition
Min
2
Max
Unit
Address Valid to Chip Enable Low
Input Valid to Chip Enable Low
VPP High to Chip Enable Low
VCC High to Chip Enable Low
s
s
s
s
µ
µ
µ
µ
tQVEL
tDS
2
tVPHEL
tVCHEL
tVPS
tVCS
tPW
2
2
Chip Enable Program Pulse
Width
tELEH
tEHQX
tQXGL
tGLQV
tGHQZ
tGHAX
95
2
105
s
s
s
µ
µ
µ
Chip Enable High to Input
Transition
tDH
Input Transition to Output Enable
Low
tOES
2
Output Enable Low to Output
Valid
tOE
100
130
ns
ns
ns
Output Enable High to Output
Hi-Z
tDFP
0
0
Output Enable High to Address
Transition
tAH
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
.
2. Sampled only, not 100% tested.
7/16
M27C4002
Figure 6. Programmingand Verify Modes AC Waveforms
VALID
A0-A17
tAVEL
Q0-Q15
DATA OUT
DATA IN
tQVEL
tEHQX
V
PP
tVPHEL
tVCHEL
tGLQV
tGHQZ
tGHAX
V
CC
E
tELEH
tQXGL
G
PROGRAM
VERIFY
AI00730
PRESTO II Programming Algorithm
Figure 7. ProgrammingFlowchart
PRESTO II Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin,in a typicaltime of26.5seconds.Program-
ming with PRESTO II consists of applying a se-
quenceof 100µs programpulses to each byte until
a correct verify occurs (see Figure 7). During pro-
gramming and verify operation, a MARGIN MODE
circuit is automaticallyactivatedin orderto guaran-
tee that each cell is programmed with enough
margin. No overprogrampulse is appliedsincethe
verify in MARGIN MODE provides necessarymar-
gin to each programmedcell.
V
= 6.25V, V = 12.75V
PP
CC
n = 0
E = 100µs Pulse
NO
NO
++n
= 25
VERIFY
YES
++ Addr
Program Inhibit
Programming of multiple M27C4002s in parallel
with different data is also easily accomplished.
Except for E, all like inputs including G of the
parallel M27C4002 may be common. A TTL low
level pulse applied to a M27C4002’s E input, with
VPP at 12.75V,will programthatM27C4002. Ahigh
level E input inhibits the other M27C4002s from
being programmed.
YES
Last
NO
FAIL
Addr
YES
CHECK ALL WORDS
1st: V
2nd: V
= 6V
= 4.2V
CC
CC
Program Verify
A verify (read) should be performed on the pro-
grammedbits to determinethat theywere correctly
programmed. Theverify is accomplishedwith G at
VIL, E at VIH, VPP at 12.75V and VCC at 6.25V.
AI00726C
8/16
M27C4002
On-Board Programming
ERASUREOPERATION (applies to UV EPROM)
The erasure characteristics of the M27C4002 are
such that erasure begins when the cells are ex-
posed to light with wavelengths shorter than ap-
proximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengthsin the 3000-4000Å range. Research
shows that constant exposure to room level fluo-
rescent lighting could erase a typical M27C4002in
about 3 years, while it would take approximately1
week to cause erasure when exposed to direct
sunlight. If the M27C4002 is to be exposed to
these types of lighting conditions for extended pe-
riods of time, it is suggestedthat opaque labels be
putover theM27C4002windowtopreventuninten-
tional erasure. The recommendederasure proce-
dure for the M27C4002 is exposure to shortwave
ultraviolet light which has wavelength2537Å. The
integrateddose (i.e. UV intensityx exposuretime)
forerasureshouldbe a minimumof 15 W-sec/cm2.
Theerasuretime with thisdosage is approximately
15 to 20 minutes using an ultraviolet lamp with
12000 µW/cm2 power rating. The M27C4002
shouldbe placed within 2.5cm (1 inch)of the lamp
tubesduring the erasure. Somelamps have a filter
on their tubes which should be removed before
erasure.
TheM27C4002 can be directlyprogrammed in the
application circuit. See the relevant Application
Note AN620.
Electronic Signature
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROMthat
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
withits correspondingprogrammingalgorithm.The
ES mode is functional in the 25°C ± 5°C ambient
temperaturerange that is required when program-
mingthe M27C4002. ToactivatetheESmode, the
programmingequipmentmustforce11.5Vto 12.5V
on address line A9 of the M27C4002 with
VPP=VCC=5V. Two identifier bytes may then be
sequenced from the device outputs by toggling
address line A0 from VIL to VIH. All other address
lines must be held at VIL during Electronic Signa-
ture mode. Byte 0 (A0=V ) represents the manu-
IL
facturer code and byte 1 (A0=VIH) the device
identifier code. For the STMicroelectronics
M27C4002, these two identifier bytes are given in
Table4 and can be read-outon outputsQ0 to Q7.
9/16
M27C4002
ORDERING INFORMATION SCHEME
Example:
M27C4002 -70 X
C
1
X
Speed
45 ns
V
CC Tolerance
Package
FDIP40W
PDIP40
Temperature Range
Option
-45 (1)
-60 (1)
-80
X
5%
F
B
J
1
6
0 to 70 C
X
Additional
Burn-in
±
°
60 ns
80 ns
blank
10%
–40 to 85 C
±
°
TR
Tape & Reel
Packing
JLCC44W
PLCC44
-90
90 ns
C
N
-10
100 ns
120 ns
150 ns
200 ns
TSOP40
10 x 20mm
-12
-15
-20
Note: 1. High Speed, see AC Characteristics section for furtherinformation.
For a list ofavailableoptions(Speed, Packageetc...) orfor furtherinformationon anyaspect of thisdevice,
please contact the STMicroelectronics Sales Office nearest to you.
10/16
M27C4002
FDIP40W - 40 pin Ceramic Frit-seal DIP, with window
mm
Min
inches
Min
Symb
Typ
Max
5.72
1.40
4.57
4.50
0.56
–
Typ
Max
0.225
0.055
0.180
0.177
0.022
–
A
A1
A2
A3
B
0.51
3.91
3.89
0.41
–
0.020
0.154
0.153
0.016
–
B1
C
1.45
0.057
0.23
51.79
–
0.30
52.60
–
0.009
2.039
–
0.012
2.071
–
D
D2
E
48.26
15.24
1.900
0.600
–
–
–
–
E1
e
13.06
–
13.36
–
0.514
–
0.526
–
2.54
0.100
0.590
eA
eB
L
14.99
–
–
–
–
16.18
3.18
1.52
–
18.03
0.637
0.125
0.060
–
0.710
S
2.49
–
0.098
–
7.62
0.300
4
°
11
°
4
°
11
°
α
N
40
40
A2
A3
A1
A
L
α
B1
B
D2
e
C
eA
eB
D
S
N
1
E1
E
FDIPW-a
Drawing is not to scale.
11/16
M27C4002
PDIP40 - 40 pin Plastic DIP, 600 mils width
mm
Min
–
inches
Symb
Typ
4.45
0.64
Max
–
Typ
Min
–
Max
–
A
A1
A2
B
0.175
0.025
0.38
3.56
0.38
1.14
0.20
51.78
–
–
0.015
0.140
0.015
0.045
0.008
2.039
–
–
3.91
0.53
1.78
0.31
52.58
–
0.154
0.021
0.070
0.012
2.070
–
B1
C
D
D2
E
48.26
1.900
14.80
13.46
–
16.26
13.99
–
0.583
0.530
–
0.640
0.551
–
E1
e1
eA
eB
L
2.54
0.100
0.600
15.24
–
–
–
15.24
3.05
1.52
0°
17.78
3.81
2.29
15°
0.600
0.120
0.060
0É
0.700
0.150
0.090
15É
S
α
N
40
40
A2
A
A1
e1
L
α
C
B1
B
eA
eB
D2
D
S
N
1
E1
E
PDIP
Drawing is not to scale.
12/16
M27C4002
JLCC44W - 44 lead Ceramic Chip Carrier J-lead, square window
mm
Min
3.94
2.29
0.43
0.66
17.40
16.00
14.74
–
inches
Min
Symb
Typ
Max
4.83
3.05
0.53
0.81
17.65
16.89
16.26
–
Typ
Max
0.190
0.120
0.021
0.032
0.695
0.665
0.640
–
A
A1
B
0.155
0.090
0.017
0.026
0.685
0.630
0.580
–
B1
D
D1
D2
D3
E
12.70
0.500
17.40
16.00
14.74
–
17.65
16.89
16.26
–
0.685
0.630
0.580
–
0.695
0.665
0.640
–
E1
E2
E3
e
12.70
1.27
0.500
0.050
0.400
–
–
–
–
K
10.16
–
–
–
–
N
44
44
CP
0.10
0.004
D
D1
A1
1 N
B1
e
E3
K
E1 E
D2/E2
B
K
D3
A
CP
JLCCW-a
Drawing is not to scale.
13/16
M27C4002
PLCC44 - 44 lead Plastic Leaded Chip Carrier, square
mm
Min
4.20
2.29
–
inches
Min
Symb
Typ
Max
4.70
3.04
0.51
0.53
0.81
17.65
16.66
16.00
17.65
16.66
16.00
–
Typ
Max
0.185
0.120
0.020
0.021
0.032
0.695
0.656
0.630
0.695
0.656
0.630
–
A
A1
A2
B
0.165
0.090
–
0.33
0.66
17.40
16.51
14.99
17.40
16.51
14.99
–
0.013
0.026
0.685
0.650
0.590
0.685
0.650
0.590
–
B1
D
D1
D2
E
E1
E2
e
1.27
0.89
0.050
0.035
F
0.00
–
0.25
–
0.000
–
0.010
–
R
N
44
44
CP
0.10
0.004
D
A1
D1
A2
1 N
B1
e
Ne
E1 E
D2/E2
F
B
0.51 (.020)
1.14 (.045)
Nd
A
R
CP
PLCC
Drawing is not to scale.
14/16
M27C4002
TSOP40 - 40 lead Plastic Thin Small Outline, 10 x 20mm
mm
Min
inches
Min
Symb
Typ
Max
1.20
0.15
1.05
0.27
0.21
20.20
18.50
10.10
–
Typ
Max
0.047
0.006
0.041
0.011
0.008
0.795
0.728
0.398
–
A
A1
A2
B
0.05
0.95
0.17
0.10
19.80
18.30
9.90
–
0.002
0.037
0.007
0.004
0.780
0.720
0.390
–
C
D
D1
E
e
0.50
0.020
L
0.50
0.70
0.020
0.028
0
°
5
°
0
°
5
°
α
N
40
40
CP
0.10
0.004
A2
1
N
e
E
B
N/2
D1
D
A
CP
DIE
C
TSOP-a
A1
α
L
Drawing is not to scale.
15/16
M27C4002
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringementof patents or other rights of thirdparties which may result from its use. No licenseis granted
by implicationor otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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16/16
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