M27V160-120M6TR [STMICROELECTRONICS]

1MX16 OTPROM, 120ns, PDSO44, 0.525 INCH, ROHS COMPLIANT, PLASTIC, SOP-44;


型号：	M27V160-120M6TR
厂家：	ST
描述：	1MX16 OTPROM, 120ns, PDSO44, 0.525 INCH, ROHS COMPLIANT, PLASTIC, SOP-44 可编程只读存储器 OTP只读存储器光电二极管内存集成电路
文件：	总17页 (文件大小：181K)
中文：	中文翻译
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M27V160

16 Mbit (2Mb x8 or 1Mb x16)

Low Voltage UV EPROM and OTP EPROM

■ 3V to 3.6V LOW VOLTAGE in READ

OPERATION

■ ACCESS TIME: 100ns

■ BYTE-WIDE or WORD-WIDE

CONFIGURABLE

■ 16 Mbit MASK ROM REPLACEMENT

■ LOW POWER CONSUMPTION

– Active Current 30mA at 8MHz

– Standby Current 60µA

PDIP42 (B)

FDIP42W (F)

■ PROGRAMMING VOLTAGE: 12.5V ± 0.25V

■ PROGRAMMING TIME: 50µs/word

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 20h

SDIP42 (S)

– Device Code: B1h

DESCRIPTION

The M27V160 is a low voltage 16 Mbit EPROM of-

fered in the two ranges UV (ultra violet erase) and

OTP (one time programmable). It is ideally suited

for microprocessor systems requiring large data or

program storage. It is organised as either 2 Mbit

words of 8 bit or 1 Mbit words of 16 bit. The pin-out

is compatible with a 16 Mbit Mask ROM.

SO44 (M)

PLCC44 (K)

Figure 1. Logic Diagram

The M27V160 operates in the read mode with a

supply voltage as low as 3V. The decrease in op-

erating power allows either a reduction of the size

of the battery or an increase in the time between

battery recharges.

The FDIP42W (window ceramic frit-seal package)

has a transparent lid which allows the user to ex-

pose the chip to ultraviolet light to erase the bit pat-

tern. A new pattern can then be written rapidly to

the device by following the programming proce-

dure.

Q15A–1

A0-A19

Q0-Q14

M27V160

For applications where the content is programmed

only one time and erasure is not required, the

M27V160 is offered in PDIP42, SDIP42, PLCC44

and SO44 packages.

BYTEV

AI01898

March 2002

1/17

M27V160

Figure 2A. DIP Connections

Figure 2B. SO Connections

A18

A17

A18

A17

42 A19

41 A8

A19

40 A9

39 A10

38 A11

37 A12

36 A13

35 A14

34 A15

33 A16

32 BYTEV

A10

A11

A12

A13

A14

A15

A16

BYTEV

A0 10

M27V160

Q15A-1

30 Q15A-1

Q0 14

Q8 15

Q1 16

Q9 17

Q2 18

29 Q7

28 Q14

27 Q6

Q14

26 Q13

25 Q5

Q13

Q10 19

Q3 20

24 Q12

23 Q4

Q10

Q12

Q11 21

Q11

AI01899

AI01900

Table 1. Signal Names

Figure 2C. PLCC Connections

A0-A19

Q0-Q7

Q8-Q14

Q15A–1

Address Inputs

Data Outputs

1 44

A12

A13

A14

A15

A16

Data Output / Address Input

Chip Enable

Output Enable

M27V160

34 BYTEV

BYTEV

Byte Mode / Program Supply

Supply Voltage

Q15A–1

Q14

Ground

Not Connected Internally

AI04829

2/17

M27V160

(1)

Table 2. Absolute Maximum Ratings

Symbol

Parameter

Value

–40 to 125

–50 to 125

–65 to 150

–2 to 7

Unit

°C

(3)

Ambient Operating Temperature

Temperature Under Bias

Storage Temperature

Input or Output Voltage (except A9)

Supply Voltage

BIAS

STG

(2)

–2 to 7

(2)

A9 Voltage

–2 to 13.5

–2 to 14

Program Supply Voltage

Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may

cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions

above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-

tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-

ity documents.

2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC

voltage on Output is V

3. Depends on range.

+0.5V with possible overshoot to V

+2V for a period less than 20ns.

Table 3. Operating Modes

Mode

BYTEV

Q15A–1

Q14-Q8

Data Out

Hi-Z

Q7-Q0

Data Out

Hi-Z

Read Word-wide

Data Out

Read Byte-wide Upper

Read Byte-wide Lower

Output Disable

Hi-Z

Data In

Data Out

Hi-Z

Pulse

Program

Data In

Data Out

Hi-Z

Data In

Data Out

Hi-Z

Verify

Program Inhibit

Standby

Hi-Z

Electronic Signature

Code

Codes

Note: X = V or V , V = 12V ± 0.5V.

IH IL ID

Table 4. Electronic Signature

Q15

and

Q14

and

Q13

and

Q12

and

Q11

and

Q10

and

Identifier

Hex Data

Manufacturer’s Code

Device Code

20h

B1h

3/17

M27V160

Table 5. AC Measurement Conditions

High Speed

≤ 10ns

Standard

≤ 20ns

Input Rise and Fall Times

Input Pulse Voltages

0 to 3V

1.5V

0.4V to 2.4V

0.8V and 2V

Input and Output Timing Ref. Voltages

Figure 3. AC Testing Input Output Waveform

Figure 4. AC Testing Load Circuit

1.3V

High Speed

1N914

1.5V

3.3kΩ

DEVICE

UNDER

TEST

OUT

Standard

2.4V

2.0V

0.8V

0.4V

= 30pF for High Speed

= 100pF for Standard

includes JIG capacitance

AI01822

AI01823B

(1)

Table 6. Capacitance

Symbol

(T = 25 °C, f = 1 MHz)

Parameter

Test Condition

Min

Max

Unit

Input Capacitance (except BYTEV

)

= 0V

Input Capacitance (BYTEV

Output Capacitance

)

120

OUT

Note: 1. Sampled only, not 100% tested.

DEVICE OPERATION

lower 8 bits of the 16 bit data are selected and with

A–1 at V the upper 8 bits of the 16 bit data are

The operating modes of the M27V160 are listed in

the Operating Modes Table. A single power supply

is required in the read mode. All inputs are TTL

compatible except for V and 12V on A9 for the

Electronic Signature.

selected.

The M27V160 has two control functions, both of

which must be logically active in order to obtain

data at the outputs. In addition the Word-wide or

Byte- wide organisation must be selected.

Read Mode

Chip Enable (E) is the power control and should be

used for device selection. Output Enable (G) is the

output control and should be used to gate data to

the output pins independent of device selection.

Assuming that the addresses are stable, the ad-

The M27V160 has two organisations, Word-wide

and Byte-wide. The organisation is selected by the

signal level on the BYTEV pin. When BYTEV

is at V the Word-wide organisation is selected

and the Q15A–1 pin is used for Q15 Data Output.

dress access time (t

) is equal to the delay

). Data is available at the

AVQV

When the BYTEV pin is at V the Byte-wide or-

from E to output (t

ELQV

ganisation is selected and the Q15A–1 pin is used

for the Address Input A–1. When the memory is

logically regarded as 16 bit wide, but read in the

output after a delay of t

from the falling edge

GLQV

of G, assuming that E has been low and the ad-

dresses have been stable for at least t -t

AVQV GLQV

Byte-wide organisation, then with A–1 at V the

4/17

M27V160

(1)

Table 7. Read Mode DC Characteristics

(T = 0 to 70°C or –40 to 85°C; V = 3.3V ± 10%; V = V

)

Symbol

Parameter

Input Leakage Current

Output Leakage Current

Test Condition

Min

Max

±1

Unit

µA

0V ≤ V ≤ V

0V ≤ V

≤ V

OUT CC

±10

µA

E = V , G = V , I

= 0mA,

IL OUT

f = 8MHz, V ≤ 3.6V

Supply Current

E = V , G = V , I

= 0mA,

IL OUT

f = 5MHz, V ≤ 3.6V

E = V

Supply Current (Standby) TTL

Supply Current (Standby) CMOS

Program Current

µA

CC1

E > V – 0.2V, V ≤ 3.6V

CC2

= V

PP CC

0.2V

Input Low Voltage

–0.3

(2)

0.7V

V + 1

Input High Voltage

= 2.1mA

Output Low Voltage

Output High Voltage TTL

0.4

= –400µA

2.4

Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .

2. Maximum DC voltage on Output is V +0.5V.

Standby Mode

System Considerations

The M27V160 has a standby mode which reduces

the active current from 20mA to 20µA with low volt-

The power switching characteristics of Advanced

CMOS EPROMs require careful decoupling of the

age operation V

≤ 3.6V, see Read Mode DC

supplies to the devices. The supply current I

Characteristics table for details.The M27V160 is

placed in the standby mode by applying a CMOS

high signal to the E input. When in the standby

mode, the outputs are in a high impedance state,

independent of the G input.

has three segments of importance to the system

designer: the standby current, the active current

and the transient peaks that are produced by the

falling and rising edges of E. The magnitude of the

transient current peaks is dependent on the ca-

pacitive and inductive loading of the device out-

puts. The associated transient voltage peaks can

be suppressed by complying with the two line out-

put control and by properly selected decoupling

capacitors. It is recommended that a 0.1µF ceram-

Two Line Output Control

Because EPROMs are usually used in larger

memory arrays, this product features a 2 line con-

trol function which accommodates the use of mul-

tiple memory connection. The two line control

function allows:

a. the lowest possible memory power dissipation,

b. complete assurance that output bus contention

will not occur.

For the most efficient use of these two control

lines, E should be decoded and used as the prima-

ry device selecting function, while G should be

made a common connection to all devices in the

array and connected to the READ line from the

system control bus. This ensures that all deselect-

ed memory devices are in their low power standby

mode and that the output pins are only active

when data is required from a particular memory

device.

ic capacitor is used on every device between V

and V . This should be a high frequency type of

low inherent inductance and should be placed as

close as possible to the device. In addition, a

4.7µF electrolytic capacitor should be used be-

tween V

and V for every eight devices. This

capacitor should be mounted near the power sup-

ply connection point. The purpose of this capacitor

is to overcome the voltage drop caused by the in-

ductive effects of PCB traces.

5/17

M27V160

(1)

Table 8. Read Mode AC Characteristics

(T = 0 to 70°C or –40 to 85°C; V = 3.3V ± 10%; V = V

)

M27V160

-120

(3)

Symbol

Alt

Parameter

Test Condition

-150

Unit

-100

Min Max Min Max Min Max

E = V , G = V

Address Valid to Output Valid

BYTE High to Output Valid

100

120

150

AVQV

ACC

E = V , G = V

BHQV

G = V

Chip Enable Low to Output Valid

ELQV

Output Enable Low to Output

Valid

E = V

GLQV

(2)

E = V , G = V

BYTE Low to Output Hi-Z

STD

BLQZ

(2)

G = V

Chip Enable High to Output Hi-Z

EHQZ

Output Enable High to Output

Hi-Z

(2)

E = V

GHQZ

Address Transition to Output

Transition

E = V , G = V

AXQX

E = V , G = V

BYTE Low to Output Transition

BLQX

Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V

2. Sampled only, not 100% tested.

3. Speed obtained with High Speed measurement conditions.

Figure 5. Word-Wide Read Mode AC Waveforms

VALID

A0-A19

tAVQV

tAXQX

tEHQZ

tGHQZ

tGLQV

tELQV

Hi-Z

Q0-Q15

AI00741B

Note: BYTEV = V

6/17

M27V160

Figure 6. Byte-Wide Read Mode AC Waveforms

VALID

A–1,A0-A19

tAVQV

tAXQX

tEHQZ

tGHQZ

tGLQV

tELQV

Hi-Z

Q0-Q7

AI00742B

Note: BYTEV = V

Figure 7. BYTE Transition AC Waveforms

A0-A19

VALID

A–1

VALID

tAVQV

tAXQX

BYTEV

tBHQV

Q0-Q7

tBLQX

Q8-Q15

tBLQZ

DATA OUT

Hi-Z

DATA OUT

AI00743C

Note: Chip Enable (E) and Output Enable (G) = V

7/17

M27V160

(1)

Table 9. Programming Mode DC Characteristics

(T = 25 °C; V = 6.25V ± 0.25V; V = 12.5V ± 0.25V)

Symbol

Parameter

Test Condition

Min

Max

±1

Unit

µA

0 ≤ V ≤ V

Input Leakage Current

Supply Current

E = V

Program Current

Input Low Voltage

Input High Voltage

Output Low Voltage

Output High Voltage TTL

A9 Voltage

–0.3

2.4

0.8

+ 0.5

= 2.1mA

0.4

= –2.5mA

3.6

11.5

12.5

Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .

(1)

Table 10. Programming Mode AC Characteristics

(T = 25 °C; V = 6.25V ± 0.25V; V = 12.5V ± 0.25V)

Symbol

Alt

Parameter

Test Condition

Min

Max

Unit

Address Valid to Chip Enable Low

Input Valid to Chip Enable Low

µs

AVEL

QVEL

VPHAV

VCHAV

High to Address Valid

VPS

VCS

Chip Enable Program Pulse Width

Chip Enable High to Input Transition

Input Transition to Output Enable Low

Output Enable Low to Output Valid

Output Enable High to Output Hi-Z

ELEH

EHQX

QXGL

GLQV

OES

120

130

(2)

DFP

GHQZ

Output Enable High to Address

Transition

GHAX

Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .

2. Sampled only, not 100% tested.

Programming

cations. Although only '0's will be programmed,

both '1's and '0's can be present in the data word.

The only way to change a '0' to a '1' is by die expo-

sure to ultraviolet light (UV EPROM). The

The M27V160 has been designed to be fully com-

patible with the M27C160. As a result the

M27V160 can be programmed as the M27C160

on the same programming equipments applying

M27V160 is in the programming mode when V

input is at 12.5V, G is at V and E is pulsed to V .

12.75V on V and 6.25V on V by the use of the

The data to be programmed is applied to 16 bits in

parallel to the data output pins. The levels required

same PRESTO III algorithm. When delivered (and

after each erasure for UV EPROM), all bits of the

M27V160 are in the '1' state. Data is introduced by

selectively programming '0's to the desired bit lo-

for the address and data inputs are TTL. V

specified to be 6.25V ± 0.25V.

8/17

M27V160

Figure 8. Programming and Verify Modes AC Waveforms

A0-A19

Q0-Q15

VALID

tAVEL

DATA IN

tQVEL

DATA OUT

tEHQX

BYTEV

tVPHAV

tVCHAV

tGLQV

tGHQZ

tGHAX

tELEH

tQXGL

PROGRAM

VERIFY

AI00744

Figure 9. Programming Flowchart

PRESTO III Programming Algorithm

The PRESTO III Programming Algorithm allows

the whole array to be programed with a guaran-

teed margin in a typical time of 52.5 seconds. Pro-

gramming with PRESTO III consists of applying a

sequence of 50µs program pulses to each word

until a correct verify occurs (see Figure 9).

= 6.25V, V

= 12.5V

n = 0

During programing and verify operation a MAR-

GIN MODE circuit is automatically activated to

guarantee that each cell is programed with enough

margin. No overprogram pulse is applied since the

E = 50µs Pulse

verify in MARGIN MODE at V much higher than

3.6V provides the necessary margin to each pro-

grammed cell.

Program Inhibit

Programming of multiple M27V160s in parallel

with different data is also easily accomplished. Ex-

cept for E, all like inputs including G of the parallel

M27V160 may be common. A TTL low level pulse

++n

= 25

VERIFY

YES

++ Addr

YES

Last

FAIL

Addr

applied to a M27V160's E input and V at 12.5V,

YES

will program that M27V160. A high level E input in-

hibits the other M27V160s from being pro-

grammed.

CHECK ALL WORDS

BYTEV

1st: V

= 5V

= 3V

Program Verify

2nd: V

A verify (read) should be performed on the pro-

grammed bits to determine that they were correct-

ly programmed. The verify is accomplished with E

AI00901B

at V and G at V , V

at 12.5V and V

6.25V.

9/17

M27V160

On-Board Programming

ERASURE OPERATION (applies to UV EPROM)

The M27V160 can be directly programmed in the

application circuit. See the relevant Application

Note AN620.

The erasure characteristics of the M27V160 is

such that erasure begins when the cells are ex-

posed to light with wavelengths shorter than ap-

proximately 4000 Å. It should be noted that

sunlight and some type of fluorescent lamps have

wavelengths in the 3000-4000 Å range. Research

shows that constant exposure to room level fluo-

rescent lighting could erase a typical M27V160 in

about 3 years, while it would take approximately 1

week to cause erasure when exposed to direct

sunlight. If the M27V160 is to be exposed to these

types of lighting conditions for extended periods of

time, it is suggested that opaque labels be put over

the M27V160 window to prevent unintentional era-

sure. The recommended erasure procedure for

M27V160 is exposure to short wave ultraviolet

light which has a wavelength of 2537 Å. The inte-

grated dose (i.e. UV intensity x exposure time) for

Electronic Signature

The Electronic Signature (ES) mode allows the

reading out of a binary code from an EPROM that

will identify its manufacturer and type. This mode

is intended for use by programming equipment to

automatically match the device to be programmed

with its corresponding programming algorithm.

The ES mode is functional in the 25°C ± 5°C am-

bient temperature range that is required when pro-

gramming the M27V160. To activate the ES mode,

the programming equipment must force 11.5V to

12.5V on address line A9 of the M27V160, with

= V = 5V.

Two identifier bytes may then be sequenced from

the device outputs by toggling address line A0

erasure should be a minimum of 30 W-sec/cm .

from V to V . All other address lines must be

The erasure time with this dosage is approximate-

ly 30 to 40 minutes using an ultraviolet lamp with

held at V during Electronic Signature mode.

12000 µW/cm power rating. The M27V160

Byte 0 (A0 = V ) represents the manufacturer

should be placed within 2.5cm (1 inch) of the lamp

tubes during the erasure. Some lamps have a filter

on their tubes which should be removed before

erasure.

code and byte 1 (A0 = V ) the device identifier

code. For the STMicroelectronics M27V160, these

two identifier bytes are given in Table 4 and can be

read-out on outputs Q7 to Q0. Note that the

M27V160 and M27C160 have the same identifier

bytes.

10/17

M27V160

Table 11. Ordering Information Scheme

Example:

M27V160

-100 X

Device Type

M27

Supply Voltage

V = 3V to 3.6V

Device Function

160 = 16 Mbit (2Mb x 8 or 1Mb x 16)

Speed

(1)

-100 = 100 ns

-120 = 120 ns

-150 = 150 ns

Tolerance

blank = 3.3V ± 10%

X = 3.3V ± 5%

Package

(2)

F = FDIP42W

B = PDIP42

S = SDIP42

K = PLCC44

(2)

M = SO44

Temperature Range

1 = 0 to 70 °C

6 = –40 to 85 °C

Options

TR = Tape & Reel Packing

Note: 1. High Speed, see AC Characteristics section for further information.

2. Packages option available on request. Please contact STMicroelectronics local Sales Office.

For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de-

vice, please contact the STMicroelectronics Sales Office nearest to you.

Table 12. Revision History

Date

March 2000

23-Apr-2001

19-Jul-2001

21-Mar-2002

Revision Details

First Issue

PLCC44 package added

SDIP42 package added

SO44 package mechanical and data clarified

11/17

M27V160

Table 13. FDIP42W - 42 pin Ceramic Frit-seal DIP, with window, Package Mechanical Data

Min

–

inches

Min

–

Symb

Typ

Max

5.72

1.40

4.57

4.50

0.56

–

Typ

Max

0.225

0.055

0.180

0.177

0.022

–

0.51

3.91

3.89

0.41

–

0.020

0.154

0.153

0.016

–

1.45

0.057

0.23

54.41

–

0.30

54.86

–

0.009

2.142

–

0.012

2.160

–

50.80

15.24

2.000

0.600

–

14.50

–

14.90

–

0.571

–

0.587

–

2.54

0.100

0.590

14.99

–

16.18

3.18

1.52

–

18.03

4.10

2.49

–

0.637

0.125

0.060

–

0.710

0.161

0.098

–

9.40

0.370

0.450

11.43

–

4°

11°

4°

11°

Figure 10. FDIP42W - 42 pin Ceramic Frit-seal DIP, with window, Package Outline

FDIPW-b

Drawing is not to scale.

12/17

M27V160

Table 14. PDIP42 - 42 pin Plastic DIP, 600 mils width, Package Mechanical Data

Min

–

inches

Min

–

Symb

Typ

Max

5.08

–

Typ

Max

0.200

–

0.25

3.56

0.38

1.27

0.20

52.20

–

0.010

0.140

0.015

0.050

0.008

2.055

–

4.06

0.53

1.65

0.36

52.71

–

0.160

0.021

0.065

0.014

2.075

–

50.80

15.24

2.000

0.600

–

13.59

–

13.84

–

0.535

–

0.545

–

2.54

0.100

0.590

14.99

–

15.24

3.18

0.86

0°

17.78

3.43

1.37

10°

0.600

0.125

0.034

0°

0.700

0.135

0.054

10°

Figure 11. PDIP42 - 42 pin Plastic DIP, 600 mils width, Package Outline

PDIP

Drawing is not to scale.

13/17

M27V160

Table 15. SDIP42 - 42 pin Shrink Plastic DIP, 600 mils width, Package Mechanical Data

millimeters

Min

inches

Min

Symbol

Typ

Max

Typ

Max

5.08

0.200

0.51

3.05

0.38

0.89

0.23

36.58

–

0.020

0.120

0.015

0.035

0.009

1.440

–

3.81

0.46

1.02

0.25

36.83

1.78

4.57

0.56

1.14

0.38

37.08

–

0.150

0.018

0.040

0.010

1.450

0.070

0.180

0.022

0.045

0.015

1.460

–

15.24

12.70

–

16.00

14.48

–

0.600

0.500

–

0.630

0.570

–

13.72

15.24

0.540

0.600

18.54

3.56

0.730

0.140

3.30

0.64

2.54

0.130

0.025

0.100

Figure 12. SDIP42 - 42 pin Shrink Plastic DIP, 600 mils width, Package Outline

SDIP

Drawing is not to scale.

14/17

M27V160

Table 16. PLCC44 - 44 lead Plastic Leaded Chip Carrier, Package Mechanical Data

Min

4.20

2.29

–

inches

Min

Symbol

Typ

Max

4.70

3.04

0.51

0.53

0.81

17.65

16.66

16.00

17.65

16.66

16.00

–

Typ

Max

0.185

0.120

0.020

0.021

0.032

0.695

0.656

0.630

0.695

0.656

0.630

–

0.165

0.090

–

0.33

0.66

17.40

16.51

14.99

17.40

16.51

14.99

–

0.013

0.026

0.685

0.650

0.590

0.685

0.650

0.590

–

1.27

0.89

0.050

0.035

0.00

–

0.25

–

0.000

–

0.010

–

0.10

0.004

Figure 13. PLCC44 - 44 lead Plastic Leaded Chip Carrier, Package Outline

1 N

E1 E

D2/E2

0.51 (.020)

1.14 (.045)

PLCC

Drawing is not to scale.

15/17

M27V160

Table 17. SO44 - 44 lead Plastic Small Outline, 525 mils body width, Package Mechanical Data

millimeters

Min

inches

Min

Symbol

Typ

Max

Typ

Max

2.80

0.1102

0.10

2.20

0.35

0.10

0.0039

0.0866

0.0138

0.0039

2.30

0.40

0.15

2.40

0.50

0.20

0.08

13.50

16.25

28.40

–

0.0906

0.0157

0.0059

0.0945

0.0197

0.0079

0.0030

0.5315

0.6398

1.1181

–

13.30

16.00

28.20

1.27

13.20

15.75

28.00

–

0.5236

0.6299

1.1102

0.0500

0.0315

0.5197

0.6201

1.1024

–

0.80

8°

Figure 14. SO44 - 44 lead Plastic Small Outline, 525 mils body width, Package Outline

SO-d

Drawing is not to scale.

16/17

M27V160

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences

of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted

by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject

to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not

authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is registered trademark of STMicroelectronics

All other names are the property of their respective owners.

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17/17

M27V160-120M6TR [STMICROELECTRONICS]

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