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Description:
M28C64-25NS3T 64 Kbit 8K x 8 Parallel EEPROM With Software Data Protection
Prototype PCB
Part No.:   M28C64-25NS3T
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Description:   64 Kbit 8K x 8 Parallel EEPROM With Software Data Protection
File Size :   154 K    
Page : 24 Pages
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M28C64
64 Kbit (8K x 8) Parallel EEPROM
With Software Data Protection
s
Fast Access Time:
– 90 ns at V
CC
=5 V for M28C64 and M28C64-A
– 120 ns at V
CC
=3 V for M28C64-xxW
s
Single Supply Voltage:
– 4.5 V to 5.5 V for M28C64 and M28C64-A
– 2.7 V to 3.6 V for M28C64-xxW
28
s
s
Low Power Consumption
Fast BYTE and PAGE WRITE (up to 64 Bytes)
– 1 ms at V
CC
=4.5 V for M28C64-A
– 3 ms at V
CC
=4.5 V for M28C64
– 5 ms at V
CC
=2.7 V for M28C64-xxW
1
PDIP28 (BS)
PLCC32 (KA)
s
Enhanced Write Detection and Monitoring:
– Ready/Busy Open Drain Output
– Data Polling
– Toggle Bit
– Page Load Timer Status
1
28
s
s
s
s
JEDEC Approved Bytewide Pin-Out
Software Data Protection
100000 Erase/Write Cycles (minimum)
Data Retention (minimum):
– 40 Years for M28C64 and M28C64-xxW
– 10 Years for M28C64-A
SO28 (MS)
300 mil width
TSOP28 (NS)
8 x 13.4 mm
Figure 1. Logic Diagram
VCC
Table 1. Signal Names
13
A0-A12
DQ0-DQ7
W
E
G
RB
V
CC
V
SS
Address Input
Data Input / Output
Write Enable
Chip Enable
Output Enable
Ready / Busy
Supply Voltage
8
DQ0-DQ7
A0-A12
W
E
M28C64
RB
G
VSS
Ground
AI01350C
June 2000
1/24
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