M41T315V-85MH6TR [STMICROELECTRONICS]
Serial Access Phantom RTC Supervisor; 串行访问幻影RTC主管
| 型号： | M41T315V-85MH6TR |
| 厂家： | 
ST |
| 描述： | Serial Access Phantom RTC Supervisor |
| 文件： | 总24页 (文件大小：407K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M41T315Y*
M41T315V/W
Serial Access Phantom RTC Supervisor
FEATURES SUMMARY
■
3.0V, 3.3V, OR 5V OPERATING VOLTAGE
Figure 1. 16-pin SOIC Package
■
REAL TIME CLOCK KEEPS TRACK OF
TENTHS/HUNDREDTHS OF SECONDS,
SECONDS, MINUTES, HOURS, DAYS,
DATE OF THE MONTH, MONTHS, AND
YEARS
16
■
■
■
AUTOMATIC LEAP YEAR CORRECTION
VALID UP TO 2100
AUTOMATIC SWITCH-OVER AND
DESELECT CIRCUITRY
CHOICE OF POWER-FAIL DESELECT
VOLTAGES:
1
SO16 (MQ)
(VPFD = Power-fail Deselect Voltage)
–
–
–
M41T315Y: VCC = 4.5 to 5.5V
4.25V ≤ VPFD ≤ 4.50V
M41T315V: VCC = 3.0 to 3.6V
2.80V ≤ VPFD ≤ 2.97V
M41T315W: VCC = 2.7 to 3.3V
2.60V ≤ VPFD ≤ 2.70V
Figure 2. 28-pin SOIC Package
SNAPHAT (SH)
Battery/Crystal
■
■
NO ADDRESS SPACE REQUIRED TO
COMMUNICATE WITH RTC
PROVIDES NONVOLATILE SUPERVISOR
FUNCTIONS FOR BATTERY BACKUP OF
SRAM
■
■
FULL ±10% VCC OPERATING RANGE
INDUSTRIAL OPERATING TEMPERATURE
RANGE (–40 to +85°C)
■
■
ULTRA-LOW BATTERY SUPPLY CURRENT
OF 500nA (max)
OPTIONAL PACKAGING INCLUDES A 28-
LEAD SOIC and SNAPHAT® TOP (to be
ordered separately)
28
1
SOH28 (MH)
■
SNAPHAT PACKAGE PROVIDES DIRECT
CONNECTION FOR A SNAPHAT TOP,
WHICH CONTAINS THE BATTERY AND
CRYSTAL
* Contact Local Sales Office
June 2004
1/24
M41T315Y*, M41T315V, M41T315W
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 1. 16-pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2. 28-pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 4. 16-pin SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 5. 28-pin SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 6. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 7. M41T315Y/V/W to RAM/Clock Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 2. Operating Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Non-volatile Supervisor Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 8. READ Mode Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 9. WRITE Mode Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 3. AC Electrical Characteristics (M41T315Y) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 4. AC Electrical Characteristics (M41T315V/W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 10.Comparison Register Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CLOCK OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Clock Register Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
AM-PM/12/24 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Oscillator and Reset Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Zero Bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 5. RTC Register Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11.Reset Pulse Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 6. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 7. DC and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12.AC Testing Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 8. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 9. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 10. Crystal Electrical Characteristics (Externally Supplied). . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 13.Power Down/Up Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 11. Power Down/Up Trip Points DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
PACKAGE MECHANICAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/24
M41T315Y*, M41T315V, M41T315W
Figure 14.SO16 – 16-lead Plastic Small Outline, Package Outline. . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 12. SO16 – 16-lead Plastic Small Outline (150 mils body width), Package Mech. Data . . . . 18
Figure 15.SOH28 – 28-lead Plastic Small Outline, Package Outline . . . . . . . . . . . . . . . . . . . . . . . 19
Table 13. SOH28 – 28-lead Plastic Small Outline, Package Mechanical Data . . . . . . . . . . . . . . . . 19
Figure 16.SH – 4-pin SNAPHAT Housing for 48mAh Battery and Crystal, Package Outline . . . . . 20
Table 14. SH – 4-pin SNAPHAT Housing for 48mAh Battery and Crystal, Package Mech. Data. . 20
Figure 17.SH – 4-pin SNAPHAT Housing for 120mAh Battery and Crystal, Package Outline . . . . 21
Table 15. SH – 4-pin SNAPHAT Housing for 120mAh Battery and Crystal, Package Mech. Data. 21
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 16. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 17. SNAPHAT Battery Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 18. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3/24
M41T315Y*, M41T315V, M41T315W
SUMMARY DESCRIPTION
The M41T315Y/V/W RTC Supervisor is a combi-
nation of a CMOS TIMEKEEPER® and a nonvola-
tile memory supervisor. Power is constantly
monitored by the memory supervisor. In the event
of power instability or absence, an external battery
maintains the timekeeping operation and provides
power for a CMOS static RAM by switching on and
invoking write protection to prevent data corrup-
tion in the memory and RTC.
The M41T315Y/V/W is supplied in a 28-lead SOIC
SNAPHAT® package (which integrates both crys-
tal and battery in a single SNAPHAT top) or a-16
pin SOIC. The 28-pin, 330mil SOIC provides sock-
ets with gold plated contacts at both ends for direct
connection to a separate SNAPHAT housing con-
taining the battery and crystal. The unique design
allows the SNAPHAT battery/crystal package to
be mounted on top of the SOIC package after the
completion of the surface mount process.
The clock keeps track of tenths/hundredths of sec-
onds, seconds, minutes, hours, day, date, month,
and year information. The last day of the month is
automatically adjusted for months with less than
31 days, including leap year correction.
Insertion of the SNAPHAT housing after reflow
prevents potential battery and crystal damage due
to the high temperatures required for device sur-
face-mounting. The SNAPHAT housing is also
keyed to prevent reverse insertion.
The clock operates in one of two formats:
–
a 12-hour mode with an AM/PM indicator;
or
The 28-pin SOIC and battery/crystal packages are
shipped separately in plastic anti-static tubes or in
Tape & Reel form. For the 28-lead SOIC, the bat-
tery/crystal package (e.g., SNAPHAT) part num-
–
a 24-hour mode
The nonvolatile supervisor supplies all the neces-
sary support circuitry to convert a CMOS RAM to
a nonvolatile memory. The M41T315Y/V/W can
be interfaced with RAM without leaving gaps in
memory.
ber
is
“M4TXX-BR12SH”
(see
Table
17., page 22).
Caution: Do not place the SNAPHAT battery/crys-
tal top in conductive foam, as this will drain the lith-
ium button-cell battery.
Note: 1. For 16-pin SOIC only
Figure 3. Logic Diagram
Table 1. Signal Names
XI-XO
D
32.768 kHz Crystal Connection
Data Input
V
V
CCO
CCI
Q
Data Output
D
Q
RST
CEO
CEI
Reset Input
XI(1)
(1)
Chip Enable Output
Chip Enable Input
Battery Input
CEO
XO
M41T315Y
M41T315V
M41T315W
WE
V
BAT
CEI
OE
OE
Output Enable Input
WRITE Enable Input
Switched Supply Voltage Output
WE
RST
V
CCO
(1)
BAT
V
Supply Voltage Input
Ground
CCI
V
V
SS
AI03902
V
SS
NC
DU
Not Connected Internally
Don’t Use
4/24
M41T315Y*, M41T315V, M41T315W
Figure 5. 28-pin SOIC Connections
Figure 4. 16-pin SOIC Connections
WE
NC
NC
NC
NC
NC
NC
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CCI
NC
2
3
NC
XI
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
V
CCI
4
V
CCO
DU
XO
CCO
5
WE
(1)
DU
6
NC
M41T315Y
M41T315V
M41T315W
M41T315Y
M41T315V
M41T315W
V
RST
OE
BAT
7
RST
NC
V
SS
D
V
8
SS
NC
NC
D
CEI
CEO
NC
9
OE
Q
10
11
12
13
14
NC
V
SS
NC
AI03909
Q
CEI
CEO
NC
NC
V
SS
AI03910
Note: 1. Should be tied to V if not used.
SS
Figure 6. Block Diagram
XO
32,768 Hz
CRYSTAL
CLOCK/CALENDAR LOGIC
UPDATE
XI
CEO
READ
CEI
OE
WRITE
TIMEKEEPER REGISTER
CONTROL
LOGIC
WE
RST
POWER-FAIL
ACCESS
ENABLE
SEQUENCE
DETECTOR
COMPARISON REGISTER
D
Q
I/O
BUFFERS
DATA
INTERNAL V
V
CC
POWER-FAIL
DETECT
LOGIC
V
CCI
CCO
V
BAT
AI03636B
5/24
M41T315Y*, M41T315V, M41T315W
Figure 7. M41T315Y/V/W to RAM/Clock Interface
A0-An
DATA I/O
A0-An
D0-D7
CMOS
SRAM
WE
OE
WE
OE
CE
V
CC
CEO
OE
V
CCO
D
WE
V
CC
M41T315Y/V/W
CE
CEI
Q
RST
RST
V
CCI
V
BAT
X
X
1
0
+
BAT
V
SS
32.768 Hz
CRYSTAL
V
SS
AI04258
6/24
M41T315Y*, M41T315V, M41T315W
OPERATION
Figure 6., page 5 illustrates the main elements of
the device. The following paragraphs describe the
signals and functions.
ister. If a match is found, the pointer increments to
the next location of the comparison register and
awaits the next WRITE cycle.
Communication with the clock is established by
pattern recognition of a serial bit stream of 64 bits
which must be matched by executing 64 consecu-
tive WRITE cycles containing the proper data on
data in (D). All accesses which occur prior to rec-
ognition of the 64-bit pattern are directed to mem-
ory via the chip enable output pin (CEO).
After recognition is established, the next 64 READ
or WRITE Cycles either extract or update data in
the clock and CEO remains high during this time,
disabling the connected memory (see Table
2., page 7).
Data transfer to and from the timekeeping function
is accomplished with a serial bit stream under con-
trol of chip enable input (CEI), output enable (OE),
and WRITE enable (WE). Initially, a READ cycle
using the CEI and OE control of the clock starts the
pattern recognition sequence by moving the point-
er to the first bit of the 64-bit comparison register.
Next, 64 consecutive WRITE cycles are executed
using the CEI and WE control of the clock. These
64 WRITE cycles are used only to gain access to
the clock.
If a match is not found, the pointer does not ad-
vance and all subsequent WRITE cycles are ig-
nored. If a READ cycle occurs at any time during
pattern recognition, the present sequence is abort-
ed and the comparison register pointer is reset.
Pattern recognition continues for a total of 64
WRITE cycles as described above until all the bits
in the comparison register have been matched
(see Figure 10., page 11.)
With a correct match for 64 bits, access to the reg-
isters is enabled and data transfer to or from the
timekeeping registers may proceed. The next 64
cycles will cause the device to either receive data
on D, or transmit data on Q, depending on the lev-
el of OE pin or the WE pin. Cycles to other locations
outside the memory block can be interleaved with
CEI cycles without interrupting the pattern recogni-
tion sequence or data transfer sequence to the de-
vice.
For a SO16 pin package, a standard 32.768 kHz
quartz crystal can be directly connected to the
M41T315Y/V/W via pins 1 and 2 (XI, XO). The
crystal selected for use should have a specified
load capacitance (CL) of 12.5 pF (see Table
10., page 17).
When the first WRITE cycle is executed, it is com-
pared to the first bit of the 64-bit comparison reg-
Table 2. Operating Modes
V
Mode
Deselect
WRITE
READ
CEI
OE
X
WE
D
Q
Power
Standby
Active
CC
V
X
Hi-Z
Hi-Z
Hi-Z
IH
4.5 to 5.5V
or
3.0 to 3.6V
or
V
V
D
X
IL
IL
IN
V
V
IL
V
D
OUT
Hi-Z
Hi-Z
Hi-Z
Active
IL
IH
2.7 to 3.3V
V
V
IH
V
READ
Hi-Z
Active
IL
IH
(1)
Deselect
X
X
X
X
X
X
Hi-Z
Hi-Z
CMOS Standby
V
to V
(min)
PFD
SO
(1)
SO
Deselect
Hi-Z
Battery Back-up Mode
≤ V
Note: X = V or V ; V = Battery Back-up Switchover Voltage.
IH
IL
SO
Note: 1. See Table 11., page 17 for details.
7/24
M41T315Y*, M41T315V, M41T315W
Non-volatile Supervisor Operation
A switch is provided to direct power from the bat-
tery input or VCCI to VCCO with a maximum voltage
drop of 0.3 Volts. The VCCO output pin is used to
supply uninterrupted power to CMOS SRAM. The
M41T315Y/V/W safeguards the clock and RAM
data by power-fail detection and write protection.
Power-fail detection occurs when VCCI falls below
VPFD which is set by an internal bandgap refer-
ence. The M41T315Y/V/W constantly monitors
power-fail circuitry forces the chip enable output
(CEO) to VCCI or VBAT-0.2 volts for external RAM
write protection. During nominal supply conditions,
CEO will track CEI with a propagation delay. Inter-
nally, the M41T315Y/V/W aborts any data transfer
in progress without changing any of the device
registers and prevents future access until VCCI
exceeds VPFD. Figure 7., page 6 illustrates a typi-
cal RAM/clock interface.
the VCCI supply pin. When VCCI is less than VPFD
,
Figure 8. READ Mode Waveforms
WE
tRC
tCW
tRR
tCO
CEI
tOW
tOD
OE
tODO
tOE
tOEE
tCOE
DATA OUTPUT VALID
Q
AI04259
Figure 9. WRITE Mode Waveforms
OE
tWC
tWP
tWR
WE
tWR
tCW
CEI
t
DH
tDH
tDS
D
DATA INPUT STABLE
AI04261
8/24
M41T315Y*, M41T315V, M41T315W
Table 3. AC Electrical Characteristics (M41T315Y)
(1)
Symbol
Min
Typ
Max
Units
ns
Parameter
READ Cycle Time
t
t
t
t
65
AVAV
RC
CO
OE
t
t
CEI Access Time
OE Access Time
CEI to Output Low Z
OE to Output Low Z
CEI to Output High Z
OE to Output High Z
READ Recovery
CEI Pulse Width
OE Pulse Width
55
55
ns
ELQV
ns
GLQV
t
t
t
5
5
ns
ELQX
GLQX
EHQZ
COE
t
t
t
ns
OEE
t
25
25
ns
OD
t
ns
GHQZ
ODO
t
10
55
55
65
55
ns
RR
t
t
t
ns
ELEH
CW
t
ns
GLGH
OW
t
t
WC
WRITE Cycle
ns
AVAV
t
t
WRITE Pulse Width
ns
WLWH
WP
t
EHAX
(2)
WRITE Recovery
Data Setup
10
30
ns
ns
t
WR
t
WHAX
t
DVEH
(3)
(3)
t
DS
t
DVWH
t
EHDX
Data Hold Time
0
ns
ns
t
DH
t
WHDX
t
RST Pulse Width
65
RST
Note: 1. Valid for Ambient Operating Temperature: T = –40 to 85°C; V = 4.5 to 5.5V (except where noted).
A
CC
2. t
is a function of the latter occurring edge of WE or CEI.
WR
3. t and t are functions of the first occurring edge of WE or CEI in RAM mode.
DH
DS
9/24
M41T315Y*, M41T315V, M41T315W
Table 4. AC Electrical Characteristics (M41T315V/W)
(1)
Symbol
Min
Typ
Max
Units
ns
Parameter
READ Cycle Time
t
t
t
t
85
AVAV
RC
CO
OE
t
t
CEI Access Time
OE Access Time
CEI to Output Low Z
OE to Output Low Z
CEI to Output High Z
OE to Output High Z
READ Recovery
CEI Pulse Width
OE Pulse Width
85
85
ns
ELQV
ns
GLQV
t
t
t
5
5
ns
ELQX
GLQX
EHQZ
COE
t
t
t
ns
OEE
t
30
30
ns
OD
t
ns
GHQZ
ODO
t
20
65
60
85
60
ns
RR
t
t
t
t
ns
ELEH
CW
OW
WC
t
ns
GLGH
t
WRITE Cycle
ns
AVAV
t
t
WP
WRITE Pulse Width
ns
WLWH
t
EHAX
(2)
WR
WRITE Recovery
Data Setup
25
35
ns
ns
t
t
WHAX
t
DVEH
(3)
t
DS
t
DVWH
t
EHDX
(3)
Data Hold Time
5
ns
ns
t
DH
t
WHDX
t
RST Pulse Width
85
RST
Note: 1. Valid for Ambient Operating Temperature: T = –40 to 85°C; VCC = 2.7 to 3.6V (except where noted).
A
2. t
is a function of the latter occurring edge of WE or CEI.
WR
3. t and t are functions of the first occurring edge of WE or CEI in RAM mode.
DH
DS
10/24
M41T315Y*, M41T315V, M41T315W
Figure 10. Comparison Register Definition
Hex
Value
6
1
5
0
4
0
3
0
2
1
0
1
7
1
1
0
C5
3A
BYTE 0
BYTE 1
1
1
0
1
1
0
0
1
0
1
0
1
0
0
1
0
1
0
0
0
1
1
0
1
BYTE 2
BYTE 3
BYTE 4
BYTE 5
BYTE 6
A3
5C
C5
3A
A3
0
1
1
0
1
1
1
0
1
0
1
0
1
0
0
1
0
1
1
0
0
0
1
0
5C
0
0
BYTE 7
0
1
1
0
1
1
AI04262
Note: Pattern recognition in “hex” is C5, 3A, A3, 5C, C5, 3A, A3, and 5C. The odds of this pattern being accidentally duplicated and sending
19
aberrant entries to the RTC is less than 1 in 10 . This pattern is sent to the clock LSB to MSB.
11/24
M41T315Y*, M41T315V, M41T315W
Data Retention
Most low power SRAMs on the market today can
be used with the M41T315Y/V/W. There are, how-
ever some criteria which should be used in making
the final choice of an SRAM to use. The SRAM
must be designed in a way where the chip enable
input disables all other inputs to the SRAM. This
allows inputs to the M41T315Y/V/W and SRAMs
to be Don’t Care once VCCI falls below VPFD(min).
The SRAM should also guarantee data retention
down to VCC=2.0 volts. The chip enable access
time must be sufficient to meet the system needs
with the chip enable output propagation delays
included. If the SRAM includes a second chip
SRAMs being evaluated. Most SRAMs specify a
data retention current at 3.0 volts. Manufacturers
generally specify a typical condition for room tem-
perature along with a worst case condition (gener-
ally at elevated temperatures). The system level
requirements will determine the choice of which
value to use. The data retention current value of
the SRAMs can then be added to the IBAT value of
the M41T315Y/V/W to determine the total current
requirements for data retention. The available bat-
tery capacity for the SNAPHAT® of your choice
can then be divided by this current to determine
the amount of data retention available (see Table
17., page 22).
enable pin (E2), this pin should be tied to VOUT
.
If data retention lifetime is a critical parameter for
the system, it is important to review the data reten-
tion current specifications for the particular
For a further more detailed review of lifetime calcu-
lations, please see Application Note AN1012.
12/24
M41T315Y*, M41T315V, M41T315W
CLOCK OPERATION
Clock Register Information
Oscillator and Reset Bits
Clock information is contained in eight registers of
8 bits, each of which is sequentially accessed 1 bit
at a time after the 64-bit pattern recognition se-
quence has been completed. When updating the
clock registers, each must be handled in groups of
8 bits. Writing and reading individual bits within a
register could produce erroneous results. These
READ/WRITE registers are defined in Table
5., page 13.
Data contained in the clock registers is in binary
coded decimal format (BCD). Reading and writing
the registers is always accomplished by stepping
though all eight registers, starting with Bit 0 of
Register 0 and ending with Bit 7 of Register 7.
Bits 4 and 5 of the day register are used to control
the reset and oscillator functions. Bit 4 controls the
reset pin input. When the Reset Bit is set to logic
'1,' the reset input pin is ignored. When the Reset
Bit is set to logic '0,' a low input on the reset pin will
cause the device to abort data transfer without
changing data in the timekeeping registers. Reset
operates independently of all other inputs. Bit 5
controls the oscillator. When set to logic '0,' the os-
cillator turns on and the real time clock/calendar
begins to increment.
Zero Bits
Registers 1, 2, 3, 4, 5, and 6 contain one (1) or
more bits that will always read logic '0.' When writ-
ing to these locations, either a logic '1' or '0' is ac-
ceptable.
AM-PM/12/24 Mode
Bit 7 of the hours register is defined as the 12-hour
or 24-hour mode select bit. When high, the 12-
hour mode is selected. In the 12-hour mode, Bit 5
is the AM/PM bit with logic high being PM. In the
24-hour mode, Bit 5 is the second 10-hour bit (20-
23 hours).
Table 5. RTC Register Map
Function/Range
BCD Format
Register
D7
D6
0.1 Seconds
10 Seconds
D5
D4
D3
D2
D1
D0
0
1
2
0.01 Seconds
Seconds
Seconds
Seconds
Minutes
00-99
00-59
00-59
0
0
10 Minutes
Minutes
10 /
A/P
01-12/
00-23
3
12/24
0
Hrs
Hours (24 Hour Format)
Hours
4
5
6
7
0
0
0
0
0
0
OSC
RST
0
Day of the Week
Date: Day of the Month
Month
Day
Date
Month
Year
01-7
01-31
01-12
00-99
10 date
0
10M
10 Years
Year
Keys:
A/P = AM/PM Bit
12/24 = 12 or 24-hour mode Bit
OSC = Oscillator Bit
RST = Reset Bit
0 = Must be set to '0'
Figure 11. Reset Pulse Waveform
tRST
RST
AI04260
13/24
M41T315Y*, M41T315V, M41T315W
MAXIMUM RATING
Stressing the device above the rating listed in the
“Absolute Maximum Ratings” table may cause
permanent damage to the device. These are
stress ratings only and operation of the device at
these or any other conditions above those indicat-
ed in the Operating sections of this specification is
not implied. Exposure to Absolute Maximum Rat-
ing conditions for extended periods may affect de-
vice
reliability.
Refer
also
to
the
STMicroelectronics SURE Program and other rel-
evant quality documents.
Table 6. Absolute Maximum Ratings
Symbol
Parameter
Value
-40 to +85
–40 to +85
–55 to +125
260
Unit
°C
T
A
Operating Temperature
®
°C
SNAPHAT
SOIC
T
Storage Temperature (V , Oscillator Off)
STG
(1)
CC
°C
Lead Solder Temperature for 10 seconds
°C
T
SLD
M41T315Y
-0.3 to +7.0
-0.3 to +4.6
V
V
V
Supply Voltage (on any pin relative to Ground)
CCI
M41T315V/W
V
-0.3 to V + 0.3
Input or Output Voltages
Output Current
V
IO
CC
I
O
20
1
mA
W
P
Power Dissipation
D
Note: 1. For SO package, standard (SnPb) lead finish: Reflow at peak temperature of 225°C (total thermal budget not to exceed 180°C for
between 90 to 150 seconds).
2. For SO package, Lead-free (Pb-free) lead finish: Reflow at peak temperature of 260°C (total thermal budget not to exceed 245°C
for greater than 30 seconds).
CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode.
CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.
14/24
M41T315Y*, M41T315V, M41T315W
DC AND AC PARAMETERS
This section summarizes the operating and mea-
surement conditions, as well as the DC and AC
characteristics of the device. The parameters in
the following DC and AC Characteristic tables are
derived from tests performed under the Measure-
ment Conditions listed in the relevant tables. De-
signers should check that the operating conditions
in their projects match the measurement condi-
tions when using the quoted parameters.
Table 7. DC and AC Measurement Conditions
Parameter
M41T315Y
4.5 to 5.5V
–40 to 85°C
100pF
M41T315V/W
2.7 to 3.6V
–40 to 85°C
50pF
V
CC
Supply Voltage
Ambient Operating Temperature
Load Capacitance (C )
L
Input Rise and Fall Times
≤ 5ns
≤ 5ns
Input Pulse Voltages
0 to 3V
0 to 3V
Input and Output Timing Ref. Voltages
1.5V
1.5V
Figure 12. AC Testing Load Circuit
400 Ω
DEVICE
UNDER
TEST
2.0V
C
L
C
includes JIG capacitance
L
AI04255
Note: 50pF for M41T315V.
Table 8. Capacitance
Symbol
(1,2)
Min
Max
10
Unit
pF
Parameter
C
Input Capacitance
Input / Output Capacitance
IN
(3)
10
pF
C
IO
Note: 1. Effective capacitance measured with power supply at 5V; sampled only; not 100% tested.
2. At 25°C, f = 1MHz.
3. Outputs were deselected.
15/24
M41T315Y*, M41T315V, M41T315W
Table 9. DC Characteristics
Test
M41T315Y
–65
M41T315V/W
Sym
Parameter
–85
Typ
Unit
(1)
Condition
Min
Typ
Max
Min
Max
0V ≤ V
≤
Input Leakage
Current
IN
(2)
±1
±1
µA
I
IL
V
CC
0V ≤ V
≤
Output Leakage
Current
OUT
I
±1
10
±1
6
µA
mA
mA
OL
V
CC
(3)
CC1
Supply Current
I
V
=
V
Power Supply
CC0
CC
(4)
CCO1
150
100
I
V
CCI
– 0.3
Current
Supply Current
(TTL Standby)
(3)
CEI = V
3
2
mA
mA
I
I
IH
CC2
V
Power Supply
CEI =
CC
(3)
1
1
CC3
V
CCI
– 0.2
Current
(5)
Input Low Voltage
–0.3
2.2
0.8
–0.3
2.0
0.6
V
V
V
IL
(5)
V
+ 0.3
V
+ 0.3
CC
Input High Voltage
V
CC
IH
Output Low
Voltage
(6)
I
= 4.0 mA
0.4
0.4
V
V
V
V
OL
OL
Output High
Voltage
(6)
I
= –1.0 mA
2.4
2.4
V
OH
OH
Power Fail
Deselect
2.80 (V)
2.60 (W)
2.97 (V)
2.70 (W)
V
4.25
4.50
3.7
PFD
Battery Back-up
Switchover
V
V
BAT
2.5
V
V
SO
V
Battery Voltage
2.5
2.5
3.7
BAT
V
– 0.2
or
– 0.2
V
– 0.2
or
– 0.2
CCI
CCI
CEO Output
Voltage
V
V
CEO
(3)
V
V
BAT
BAT
V
= 3.0V
BAT
T = 25°C
V
Battery Current
0.5
0.5
µA
µA
I
A
BAT
= 0V
CC
V
= V
Battery Backup
Current
CCO
BAT
(7)
100
100
I
CCO2
– 0.2V
Note: 1. Valid for Ambient Operating Temperature: T = –40 to 85°C; V = 4.5 to 5.5V or 2.7 to 3.6V (except where noted).
A
CC
2. Applies to all input pins except RST, which is pulled internally to V
3. Measured without RAM connected.
.
CCI
4. I
is the maximum average load current the device can supply to external memory.
CCO1
5. Voltages are referenced to Ground.
6. Measured with load shown in Figure 12., page 15.
7. I
is the maximum average load current that the device can supply to memory in the battery backup mode.
CCO2
16/24
M41T315Y*, M41T315V, M41T315W
Table 10. Crystal Electrical Characteristics (Externally Supplied)
(1,2)
Symbol
Min
Typ
Max
Unit
kHz
kΩ
Parameter
Resonant Frequency
fO
32.768
R
Series Resistance
Load Capacitance
60
S
C
12.5
pF
L
Note: 1. These values are externally supplied. STMicroelectronics recommends the KDS DT-38: 1TA/1TC252E127, Tuning Fork Type (thru-
hole) or the DMX-26S: 1TJS125FH2A212, (SMD) quartz crystal for industrial temperature operations. KDS can be contacted at kou-
hou@kdsj.co.jp or http://www.kdsj.co.jp for further information on this crystal type.
Note: 1. Load capacitors are integrated within the M41T315Y/V/W. Circuit board layout considerations for the 32.768kHz crystal of minimum
trace lengths and isolation from RF generating signals should be taken into account.
Figure 13. Power Down/Up Mode AC Waveforms
V
CC
V
(max)
PFD
V
(min)
PFD
V
SO
tR
tFB
tF
tREC
tPF
DON'T CARE
CEI
V
– 0.2V
V
– 0.2V
tPD
tPD
BAT
BAT
CEO
AI04257
Table 11. Power Down/Up Trip Points DC Characteristics
(1,2)
Symbol
Min
Max
Unit
Parameter
(max) to CEI low
t
V
V
V
V
1.5
300
10
0
2.5
ms
µs
µs
µs
REC
PFD
PFD
PFD
PFD
t
F
(max) to V
(min) to V
(min) V
Fall Time
PFD
V
CC
Fall Time
t
FB
SO CC
PFD
t
R
(min) to V
(max) V
Rise Time
CC
t
CEI High to Power-Fail
CEI Propagation Delay
0
µs
ns
ns
PF
M41T315Y
10
15
(3,4)
t
PD
M41T315V/W
Note: 1. Valid for Ambient Operating Temperature: T = –40 to 85°C; V = 4.5 to 5.5V or 2.7 to 3.6V (except where noted).
A
CC
2. Measured at 25°C.
3. Measured with load shown in Figure 12., page 15.
4. Input pulse rise and fall times equal 10ns
17/24
M41T315Y*, M41T315V, M41T315W
PACKAGE MECHANICAL INFORMATION
Figure 14. SO16 – 16-lead Plastic Small Outline, Package Outline
A2
A
C
B
CP
e
D
N
1
E
H
A1
α
L
SO-b
Note: Drawing is not to scale.
Table 12. SO16 – 16-lead Plastic Small Outline (150 mils body width), Package Mech. Data
mm
Min
inches
Min
Symb
Typ
Max
1.75
0.25
1.60
0.46
0.25
10.00
4.00
–
Typ
Max
0.069
0.010
0.063
0.018
0.010
0.394
0.158
–
A
A1
A2
B
0.10
0.004
0.35
0.19
9.80
3.30
–
0.014
0.007
0.386
0.150
–
C
D
E
e
1.27
0.050
H
5.80
0.40
0°
6.20
1.27
8°
0.228
0.016
0°
0.244
0.050
8°
L
a
N
16
16
CP
0.10
0.004
18/24
M41T315Y*, M41T315V, M41T315W
Figure 15. SOH28 – 28-lead Plastic Small Outline, Package Outline
A2
A
C
eB
B
e
CP
D
N
E
H
A1
α
L
1
SOH-A
Note: Drawing is not to scale.
Table 13. SOH28 – 28-lead Plastic Small Outline, Package Mechanical Data
mm
inches
Min
Symb
Typ
Min
Max
3.05
0.36
2.69
0.51
0.32
18.49
8.89
–
Typ
Max
0.120
0.014
0.106
0.020
0.012
0.728
0.350
–
A
A1
A2
B
0.05
2.34
0.36
0.15
17.71
8.23
–
0.002
0.092
0.014
0.006
0.697
0.324
–
C
D
E
e
1.27
0.050
eB
H
3.20
11.51
0.41
0°
3.61
12.70
1.27
8°
0.126
0.453
0.016
0°
0.142
0.500
0.050
8°
L
a
N
28
28
CP
0.10
0.004
19/24
M41T315Y*, M41T315V, M41T315W
Figure 16. SH – 4-pin SNAPHAT Housing for 48mAh Battery and Crystal, Package Outline
A2
A1
A
A3
L
eA
D
B
eB
E
SHTK-A
Note: Drawing is not to scale.
Table 14. SH – 4-pin SNAPHAT Housing for 48mAh Battery and Crystal, Package Mech. Data
mm
Min
inches
Min
Symb
Typ
Max
9.78
7.24
6.99
0.38
0.56
21.84
14.99
15.95
3.61
2.29
Typ
Max
A
A1
A2
A3
B
0
0.385
0.285
0.275
0.015
0.022
0.860
0.590
.6280
0.142
0.090
6.73
6.48
0.265
0.255
0
0.46
21.21
14.22
15.55
3.20
0.018
0.835
0.560
.6122
0.126
0.080
D
E
eA
eB
L
2.03
20/24
M41T315Y*, M41T315V, M41T315W
Figure 17. SH – 4-pin SNAPHAT Housing for 120mAh Battery and Crystal, Package Outline
A2
A1
A
A3
L
eA
D
B
eB
E
SHTK-A
Note: Drawing is not to scale.
Table 15. SH – 4-pin SNAPHAT Housing for 120mAh Battery and Crystal, Package Mech. Data
mm
Min
inches
Min
Symb
Typ
Max
10.54
8.51
Typ
Max
A
A1
A2
A3
B
0
0.415
0.335
0.315
0.015
0.022
0.860
0.710
.6280
0.142
0.090
8.00
7.24
0.315
0.285
0
8.00
0.38
0.46
21.21
17.27
15.55
3.20
0.56
0.018
0.835
0.680
.6122
0.126
0.080
D
21.84
18.03
15.95
3.61
E
eA
eB
L
2.03
2.29
21/24
M41T315Y*, M41T315V, M41T315W
PART NUMBERING
Table 16. Ordering Information Scheme
Example:
M41T
315Y
–65
MH
6
E
Device Type
M41T
Supply Voltage and Write Protect Voltage
(1)
315Y = V
= 4.5 to 5.5V; V
= 4.25 to 4.50V
PFD
CC
315V = V
= 3.0 to 3.6V; V
= 2.80 to 2.97V
= 2.60 to 2.70V
CC
PFD
315W = V
= 2.7 to 3.3V; V
PFD
CC
Speed
–65 = 65ns (315Y)
–85 = 85ns (315V/W)
Package
(2)
MH = SOH28
MQ = SO16
Temperature Range
6 = –40 to 85°C
Shipping Method
For SOH28:
blank = Tubes (Not for New Design - Use E)
®
E = Lead-free Package (ECO PACK ), Tubes
®
F = Lead-free Package (ECO PACK ), Tape & Reel
TR = Tape & Reel (Not for New Design - Use F)
For SO16:
blank = Tubes (Not for New Design - Use E)
®
E = Lead-free Package (ECO PACK ), Tubes
®
F = Lead-free Package (ECO PACK ), Tape & Reel
TR = Tape & Reel (Not for New Design - Use F)
Note: 1. Contact Local Sales Office
®
2. The SOIC package (SOH28) requires the SNAPHAT battery package which is ordered separately under the part number “M4TXX-
BR12SHX” in plastic tube or “M4TXX-BR12SHXTR” in Tape & Reel form (see Table 17).
Caution: Do not place the SNAPHAT battery package “M4TXX-BR12SH” in conductive foam as it will drain the lithium button-cell bat-
tery.
For other options, or for more information on any aspect of this device, please contact the ST Sales Office
nearest you.
Table 17. SNAPHAT Battery Table
Part Number
M4T28-BR12SH
M4T32-BR12SH
Description
Lithium Battery (48mAh) SNAPHAT
Lithium Battery (120mAh) SNAPHAT
Package
SH
SH
22/24
M41T315Y*, M41T315V, M41T315W
REVISION HISTORY
Table 18. Document Revision History
Date
Rev. #
1.0
Revision Details
June 2001
17-Jul-01
18-Sep-01
27-Sep-01
01-May-02
First Issue
1.1
Basic formatting changes
Changed pin 8 in 28-pin to V
1.2
SS
1.3
Added ambient temp to DC Characteristics table (Table 9)
Modify reflow time and temperature footnote (Table 6)
1.4
Modify Crystal Electrical Characteristics table footnotes (Table 10); add marketing
status (Table 16)
04-Nov-02
1.5
26-Mar-03
08-Jun-04
1.6
2.0
Update test condition (Table 9)
Reformatted; add Lead-free information (Table 6, 16)
M41T315, M41T315Y, M41T315V, M41T315W, 41T315, 41T315Y, 41T315V, 41T315W, T315,SUPERVISOR, SUPERVISOR, SUPERVI-
SOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SU-
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Transparent, Transparent, Transparent, Transparent, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C,
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Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator,
Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator,
Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crys-
tal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal,
Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Bat-
tery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery,
Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Bat-
tery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery,
Battery, Switchover, Switchover, Switchover, Switchover, Switchover, Switchover, Switchover, Switchover, Switchover, Switchover, Backup,
Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup,
Backup, Backup, Backup, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail,
Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Com-
parator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator,
Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Com-
parator, Comparator, Comparator, Comparator, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT,
SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT,
SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT,
SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC,
SOIC, SOIC, SOIC, SOIC, SOIC, Industrial, Industrial, Industrial, Industrial, Industrial, Industrial, Industrial, Industrial, Industrial, Industrial,
Industrial, Industrial, Industrial, Industrial, Industrial, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V,
5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 3.3V, 3.3V, 3.3V, 3.3V, 3.3V, 3.3V, 3.3V, 3.3V, 3.3V, 3.3V, 3V, 3V,
3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, real time clock, real time clock, real time clock, real time clock, real
time clock, real time clock, real time clock, real time clock, real time clock, real time clock
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M41T315Y*, M41T315V, M41T315W
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