P40NF03L [STMICROELECTRONICS]
N - CHANNEL 30V - 0.020 ohm - 40A TO-220 STripFET POWER MOSFET; N - CHANNEL 30V - 0.020欧姆 - 40A TO- 220的STripFET功率MOSFET
| 型号： | P40NF03L |
| 厂家： | 
ST |
| 描述： | N - CHANNEL 30V - 0.020 ohm - 40A TO-220 STripFET POWER MOSFET |
| 文件： | 总8页 (文件大小：84K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STP40NF03L
N - CHANNEL 30V - 0.020 Ω - 40A TO-220
STripFET POWER MOSFET
TYPE
VDSS
RDS(on)
ID
STP40NF03L
30 V
< 0.022 Ω
40 A
■
■
TYPICAL RDS(on) = 0.020 Ω
LOW THRESHOLD DRIVE
DESCRIPTION
This Power MOSFET is the latest developmentof
STMicroelectronics unique ”Single Feature
Size ” strip-based process. The resulting
transistor shows extremely high packing density
for low on-resistance, rugged avalanche
characteristics and less critical alignment steps
3
2
1
TO-220
therefore
a
remarkable
manufacturing
reproducibility.
APPLICATIONS
■
■
■
■
HIGH CURRENT, HIGH SPEED SWITCHING
SOLENOID AND RELAY DRIVERS
MOTOR CONTROL, AUDIO AMPLIFIERS
DC-DC & DC-AC CONVERTERS
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
VDS
VDGR
VGS
ID
Parameter
Value
30
Unit
Drain-source Voltage (VGS = 0)
Drain- gate Voltage (RGS = 20 kΩ)
Gate-source Voltage
V
V
30
± 20
40
V
o
Drain Current (continuous) at Tc = 25 C
A
o
ID
Drain Current (continuous) at Tc = 100 C
28
A
IDM
(
Drain Current (pulsed)
160
A
•)
o
Ptot
Total Dissipation at Tc = 25 C
70
W
Derating Factor
0.46
250
W/oC
m/J
oC
oC
EAS(1) Single Pulse Avalanche Energy
Tstg
Tj
Storage Temperature
-65 to 175
Max. Operating Junction Temperature
(•) Pulse width limitedby safe operating area
175
( 1) starting Tj = 25 oC, ID =20A , VDD = 15V
1/8
October 1999
STP40NF03L
THERMAL DATA
Rthj-case Thermal Resistance Junction-case
Rthj-amb Thermal Resistance Junction-ambient
Max
Max
2.1
62.5
300
oC/W
oC/W
oC
Tl
Maximum Lead Temperature For Soldering Purpose
(Tcase = 25 oC unless otherwisespecified)
ELECTRICAL CHARACTERISTICS
OFF
Symbol
Parameter
Test Conditions
ID = 250 µA VGS = 0
Min.
Typ.
Max.
Unit
V(BR)DSS Drain-source
30
V
Breakdown Voltage
Zero Gate Voltage
Drain Current (VGS = 0) VDS = Max Rating
IDSS
IGSS
VDS = Max Rating
1
10
µA
A
µ
o
Tc =125 C
Gate-body Leakage
Current (VDS = 0)
VGS = ± 20 V
± 100
nA
ON ( )
Symbol
VGS(th)
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Gate Threshold Voltage VDS = VGS ID = 250 µA
1
1.7
2.5
V
RDS(on)
Static Drain-source On VGS = 10 V
Resistance VGS = 4.5 V
ID = 20 A
ID = 20 A
0.018 0.022
0.028 0.035
Ω
Ω
ID(on)
On State Drain Current VDS > ID(on) x RDS(on)max
VGS = 10 V
40
A
DYNAMIC
Symbol
Parameter
Forward
Test Conditions
VDS > ID(on) x RDS(on)max ID =20 A
Min.
Typ.
Max.
Unit
gfs ( )
20
S
Transconductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS = 25 V f = 1 MHz VGS = 0
830
230
92
pF
pF
pF
2/8
STP40NF03L
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHING ON
Symbol
Parameter
Test Conditions
Min.
Min.
Min.
Typ.
Max.
Unit
td(on)
tr
Turn-on Delay Time
Rise Time
VDD = 15 V
RG = 4.7
ID = 20 A
VGS = 4.5 V
35
205
ns
ns
Ω
(Resistive Load, see fig. 3)
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 24 V ID = 40 A VGS = 5 V
18
7
8
23
nC
nC
nC
SWITCHING OFF
Symbol
Parameter
Test Conditions
Typ.
Max.
Unit
td(off)
tf
Turn-off Delay Time
Fall Time
VDD = 15 V
RG = 4.7 Ω
ID = 20 A
VGS = 4.5 V
90
240
ns
ns
(Resistive Load, see fig. 3)
td(off)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
Vclamp = 24 V
RG = 4.7 Ω
ID = 20 A
VGS = 4.5 V
150
155
340
ns
ns
ns
(Inductive Load, see fig. 5)
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Typ.
Max.
Unit
ISD
ISDM ( )
Source-drain Current
Source-drain Current
(pulsed)
40
160
A
A
•
VSD ( ) Forward On Voltage
ISD = 40 A VGS = 0
1.5
V
trr
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD = 40 A
VDD = 15 V
(see test circuit, fig. 5)
di/dt = 100 A/ s
65
72
2
ns
µ
Tj = 150 oC
Qrr
nC
A
IRRM
( ) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
( ) Pulse width limited by safe operating area
•
Safe Operating Area
Thermal Impedance
3/8
STP40NF03L
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-sourceVoltage
CapacitanceVariations
4/8
STP40NF03L
Normalized Gate ThresholdVoltage vs
Temperature
Normalized On Resistance vs Temperature
Source-drainDiode Forward Characteristics
5/8
STP40NF03L
Fig. 1: Unclamped InductiveLoad Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
STP40NF03L
TO-220 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
4.40
1.23
2.40
TYP.
MAX.
4.60
1.32
2.72
MIN.
0.173
0.048
0.094
MAX.
0.181
0.051
0.107
A
C
D
D1
E
1.27
0.050
0.49
0.61
1.14
1.14
4.95
2.4
0.70
0.88
1.70
1.70
5.15
2.7
0.019
0.024
0.044
0.044
0.194
0.094
0.393
0.027
0.034
0.067
0.067
0.203
0.106
0.409
F
F1
F2
G
G1
H2
L2
L4
L5
L6
L7
L9
DIA.
10.0
10.40
16.4
0.645
13.0
2.65
15.25
6.2
14.0
2.95
15.75
6.6
0.511
0.104
0.600
0.244
0.137
0.147
0.551
0.116
0.620
0.260
0.154
0.151
3.5
3.93
3.85
3.75
L2
Dia.
L5
L9
L7
L6
L4
P011C
7/8
STP40NF03L
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parites which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificationmentioned in this publication are
subject tochange without notice. This publication supersedes and replaces all informaiton previouslysupplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systemswithout express written approval of STMicroelectronics.
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1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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.
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