PM8851D [STMICROELECTRONICS]

Short propagation delays;
PM8851D
型号: PM8851D
厂家: ST    ST
描述:

Short propagation delays

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PM8851  
1 A low-side gate driver with configurable asymmetric sink/source  
Datasheet - production data  
Description  
The PM8851 device is a high frequency single  
channel low-side MOSFET driver specifically  
designed to work with digital power conversion  
microcontrollers, such as the STMicroelectronics  
STLUX™ family of products.  
SOT23-6L  
The PM8851 has complementary output pins to  
differentiate sink and source driving with a current  
capability of respectively 1 A and 0.8 A.  
Features  
The input levels of the driver are derived by the  
voltage present at the IN_TH pin (between 2 V  
and 5.5 V). This pin is typically connected at the  
same voltage of the microcontroller supply  
voltage.  
Low-side MOSFET driver  
1 A sink and 0.8 A source capability  
Complementary outputs for source and sink  
driving  
The PM8851 includes both input and output pull-  
down resistors.  
Ext. reference for input threshold  
Wide supply voltage range (10 V ÷ 18 V)  
Input and output pull-down resistors  
Short propagation delays  
UVLO circuitry for input and output stages is  
present preventing the IC from driving external  
MOSFET in unsafe condition.  
Input and output UVLO  
Table 1. Device summary  
Wide operating temperature range:  
-40 °C to 125 °C  
Order code  
Option  
Package  
SOT23-6L package  
PM8851D  
Low input threshold  
SOT23-6L  
Applications  
SMPS  
Digital lighting  
Wireless battery chargers  
Digitally controlled MOSFETs  
October 2014  
DocID027090 Rev 1  
1/14  
This is information on a product in full production.  
www.st.com  
Block diagram  
PM8851  
1
Block diagram  
Figure 1. Block diagram  
9&&  
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89/2  
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65&  
61.  
/HYHOꢀꢀ  
6KLIWHU  
,1  
*1'  
PM8851  
2/14  
DocID027090 Rev 1  
PM8851  
Pin connection  
2
Pin connection  
Figure 2. Pin connection  
ꢄꢀ  
65&  
61.  
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Table 2. Pinning  
Description  
Symbol  
Pin  
IC power supply. A voltage comprised between 10 V and 18 V can be connected  
between this pin and GND to supply the IC.  
VCC  
GND  
IN  
1
2
3
Reference voltage connection.  
Digital input signal for driver.  
It is internally pulled down to GND with a 100 k(typ.) equivalent resistor.  
Input for IN pin's threshold definition: a voltage can be applied obtaining the  
values for VIH and VIL.  
IN_TH  
SNK  
4
5
6
MOSFET gate drive sinking output controlled by the IN pin.  
A pull-down equivalent resistor [100 k(typ.)] is present.  
MOSFET gate drive sourcing output controlled by the IN pin.  
SRC  
A pull-down equivalent resistor [100 k(typ.)] is present.  
DocID027090 Rev 1  
3/14  
14  
Maximum ratings  
PM8851  
3
Maximum ratings  
Table 3. Thermal data  
Parameter  
Symbol  
Value  
Unit  
Thermal resistance junction to ambient  
RthJA  
250  
°C/W  
(2-layer FR4 PCB, TA = 27 °C natural convection)  
Thermal resistance junction to case  
Maximum junction temperature  
RthJC  
TMAX  
TSTG  
TJ  
130  
°C/W  
°C  
150  
Storage temperature range  
-40 to 150  
-40 to 150  
-40 to 125  
°C  
Junction temperature range  
°C  
TA  
Operating ambient temperature range  
°C  
Table 4. Absolute maximum ratings  
Symbol  
Parameter  
Value  
Unit  
Note  
IN unconnected, IN_TH = 3.3 V  
Maximum IC supply voltage  
Max. negative allowed voltage  
Max. positive voltage at IN_TH pin  
Max. negative allowed voltage  
Maximum voltage at IN pin  
19  
- 0.3  
5.5  
V
V
VVCC,max  
V
VIN_TH,max  
- 0.3  
5.5  
V
V
VIN,max  
Max. negative allowed voltage  
Maximum RMS output current  
Maximum RMS output current  
- 0.3  
40  
V
ISRC,rms  
ISNK,rms  
mA  
mA  
60  
4/14  
DocID027090 Rev 1  
PM8851  
Electrical characteristics  
4
Electrical characteristics  
(V = 12 V, V  
= 3.3 V, T = - 40 ÷ 125 °C, unless otherwise specified).  
CC  
IN_TH  
J
Table 5. Electrical characteristics  
Symbol  
Pin  
Parameter  
Test condition  
Min. Typ. Max. Unit  
IC SUPPLY  
VCC  
VCC Operating range  
VCC Turn-on threshold  
10  
9
18  
11  
V
V
VCC,on  
10  
1
VUVLO,hyst VCC UVLO hysteresis  
0.5  
V
IST-UP  
ICC,0  
VCC Start-up current  
VCC = VCC,on - 0.5 V  
40  
40  
µA  
µA  
VCC Static supply current  
VCC Operating supply current  
IN = 0 V  
ICC,op  
See Figure 4 and Figure 5  
IN_TH  
VIN_TH  
IN_TH Operating range  
2
5.5  
40  
V
V
VIN_TH,UV IN_TH IN_TH UVLO  
IIN_TH  
IN_TH IN_TH pin bias current(1)  
INPUT  
IN_TH short with IN, rising edge  
1.5  
µA  
(2)  
(2)  
VIH/VIN_TH  
VIL/VIN_TH  
VIN_Hyst  
IIN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
Relative input high level threshold  
Relative input low level threshold  
Hysteresis  
36  
25  
7
58  
46  
25  
%
%
%
IN pin bias current  
VIN = 5 V  
50  
µA  
k  
ns  
ns  
RINPD  
Input pull-down resistance  
IN to GD propagation delay  
IN to GD propagation delay  
VIN = VIN_TH  
100  
TD_LH  
IN low to high, no load  
IN high to low, no load  
30  
30  
TD_HL  
OUTPUT  
Isrc = 100 mA, TJ = 25°C  
Isrc = 100 mA, TJ =- 40 ÷ 125 °C(1)  
Isnk =100 mA, TJ = 25°C  
Isnk =100 mA, TJ =- 40 ÷ 125 °C(1)  
VSRC = VCC / 2  
11.4  
11.4  
0.53  
0.53  
940  
1.1  
V
V
SRC pin high level (when invoked  
by IN pin)  
VSRC,H  
SRC  
SNK  
SRC pin low level (when invoked  
by IN pin)  
VSNK,L  
ISRC  
ISNK  
tR  
SRC Source current(1)  
SNK Sink current(1)  
SRC Rise time  
mA  
A
VSNK = VCC / 2  
COUT = 470 pF  
20  
20  
ns  
ns  
tF  
SNK Fall time  
COUT = 470 pF  
SRC  
RGPD  
Pull-down resistor  
SNK  
100  
k  
1. Not tested in production.  
2. Overlapping prevent by hysteresis VIN_Hyst  
.
DocID027090 Rev 1  
5/14  
14  
 
 
Electrical characteristics  
PM8851  
Figure 3. Timings  
9,+  
,1  
9,/  
9&&  
ꢉꢇꢊ  
287  
ꢁꢇꢊ  
75  
7)  
7'B/+  
7'B+/  
Figure 4. Operating supply current (no load)  
Figure 5. Operating supply current  
(C = 470 pF)  
OUT  
Figure 6. V power dissipation (PD) when no load is applied  
CC  
6/14  
DocID027090 Rev 1  
 
PM8851  
Typical applications  
5
Typical applications  
Figure 7. Test circuit  
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ꢁꢇꢇꢀQ)  
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9&&  
,1 30ꢈꢈꢅꢁ 65&  
61.  
&RXW  
ꢆꢌꢇꢀS)  
Figure 8. Digitally controlled PFC boost converter  
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93)&  
/RJLFꢀ9&&  
,1B7+  
3RZHUꢀ9&&  
9&&  
65&  
30ꢈꢈꢅꢁ  
,1  
61.  
DocID027090 Rev 1  
7/14  
14  
Typical applications  
PM8851  
Figure 9. Digitally controlled flyback converter  
9$&  
9287  
/RJLFꢀ9&&  
3RZHUꢀ9&&  
,1B7+  
9&&  
65&  
30ꢈꢈꢅꢁ  
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61.  
Figure 10. Digitally controlled inverse buck converter (e.g.: LED controller)  
9B+9  
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,1B7+  
9&&  
,1  
65&  
61.  
8/14  
DocID027090 Rev 1  
PM8851  
Application guidelines  
6
Application guidelines  
6.1  
Power supply  
The PM8851 driver is intended to drive power MOSFETs used in power conversion  
topologies at high speed. The accurate supply voltage definition guarantees an effective  
driving in every condition. The voltage present at the IN_TH pin is used for the threshold  
definition. It could be the same voltage used to supply the device providing the signal  
applied to the IN pin, or it can be derived by the VCC pin, eventually using a voltage divider.  
It is mainly suggested to provide IN_TH voltage starting from VCC voltage.  
For example, an auxiliary, unregulated voltage can be used to be connected to both  
PM8851 VCC pin and the input of a linear regulator that provides a well regulated supply  
voltage for logic circuitry. The same low voltage is then provided to the IN_TH pin of the  
PM8851.  
If the IN_TH is derived directly by the VCC pin, the structure illustrated in Figure 12 can be  
used.  
Figure 11. Shared supply configuration  
Figure 12. Independent supply configuration  
It is mandatory to properly connect a 100 nF ceramic cap as close as possible to the VCC  
pin to bypass the current's spikes absorbed by VCC during the gate charging.  
Also IN_TH voltage should be filtered with a ceramic capacitor (10 nF to 100 nF), especially  
when long traces are used to supply it; when derived by VCC a lighter filtering is allowed.  
6.2  
Layout suggestions  
The small package of the PM8851 allows to place it very close to the gate of the driven  
MOSFET: this reduces the risk of injecting high frequency noise produced by the driving  
current running between the OUT pin and the MOSFET's gate pin.  
DocID027090 Rev 1  
9/14  
14  
 
Application guidelines  
PM8851  
6.3  
Driving switches  
The IN pin truth table is reported in Table 6.  
Table 6. PM8851 truth table (levels refer to unloaded condition of SNK and SRC)  
PM8851  
IN  
SRC  
SNK  
High  
Low  
Vcc  
Hi-Z  
Hi-Z  
GND  
Differential MOSFET's driving strength is seldom necessary in topologies such as flybacks  
or boost controlled in the peak current mode. A lower driving current is used to turn-on the  
MOSFET in order to reduce the EMI produced by the Miller capacitance activation, while  
a stronger turn-off action is suggested to minimize the turn-off delay and, consequently the  
deviation between theoretical and practical behaviors.  
The same asymmetrical driving strength is required when the IGBT switch is used: in fact  
the driving strength control is mandatory to avoid latch-up phenomena intrinsically related  
with this kind of the switch. The asymmetrical driving can be realized using different values  
for the resistances placed between the MOSFET's gate and the SRC and SNK pins.  
When low switching frequencies are required and propagation delays can be compensated,  
it is possible to drive contemporary the IN pin and the IN_TH pin to exploit the relevant  
UVLO threshold of the device (typ. 1.5 V) using the PM8851 as a fixed threshold device  
without any external component: care has to be taken to consider additional propagation  
delay (typ. 300 ns) after the falling edge of the input signal.  
6.4  
Power dissipation  
Overall power dissipation can be evaluated considering two main contributions: the device  
related consumption (PD) and the gate driving power demand (PG):  
Equation 1  
P
= P + P  
D G  
Tot  
The device power consumption can be found in Figure 6 on page 6, it represents the power  
required by the device to supply internal structures and pull-downs resistors.  
The gate driving power dissipation is the power required to deliver to and from the  
MOSFET's gate the required gate charge:  
Equation 2  
P = Q x V x f  
sw  
G
g
gs  
The Q value can be found depicted into the MOSFET's datasheet for any applied V : V  
g
gs  
gs  
can be considered equal to VCC.  
10/14  
DocID027090 Rev 1  
 
PM8851  
Package information  
7
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of  
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK  
specifications, grade definitions and product status are available at: www.st.com.  
ECOPACK is an ST trademark.  
DocID027090 Rev 1  
11/14  
14  
Package information  
PM8851  
Figure 13. SOT23-6L package outline  
627ꢂꢃꢍꢄ/  
Table 7. SOT23-6L package mechanical data  
Dimensions(1)  
Symbol  
mm  
inch  
Typ.  
Min.  
Typ.  
Max.  
Min.  
Max.  
A
0.9  
0
1.45  
0.1  
0.035  
0
0.057  
0.0039  
0.0512  
0.02  
A1  
A2  
0.9  
0.35  
0.09  
2.8  
1.5  
1.3  
0.035  
0.014  
0.004  
0.11  
b
0.5  
c
0.2  
0.008  
0.120  
0.0689  
D
3.05  
1.75  
E
0.059  
e
0.95  
0.037  
H
2.6  
0.1  
0°  
3
0.102  
0.004  
0°  
0.118  
0.024  
10°  
L
0.6  
10°  
(degrees)  
1. Dimensions per JEDEC MO178AB.  
12/14  
DocID027090 Rev 1  
PM8851  
Revision history  
8
Revision history  
Table 8. Document revision history  
Date  
Revision  
Changes  
23-Oct-2014  
1
Initial release.  
DocID027090 Rev 1  
13/14  
14  
PM8851  
IMPORTANT NOTICE – PLEASE READ CAREFULLY  
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improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on  
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acknowledgement.  
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or  
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2014 STMicroelectronics – All rights reserved  
14/14  
DocID027090 Rev 1  

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