RHFL49143SCA-07V [STMICROELECTRONICS]
Rad-hard adjustable positive voltage regulator; 抗辐射可调正电压稳压器![RHFL49143SCA-07V](http://pdffile.icpdf.com/pdf1/p00106/img/icpdf/RHFL4913_576533_icpdf.jpg)
型号: | RHFL49143SCA-07V |
厂家: | ![]() |
描述: | Rad-hard adjustable positive voltage regulator |
文件: | 总19页 (文件大小:434K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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RHFL4913
Rad-hard adjustable positive voltage regulator
Features
■ 3 A low dropout voltage
■ Embedded overtemperature and overcurrent
protection
■ Adjustable overcurrent limitation
■ Output overload monitoring/signalling
■ Adjustable output voltage
SMD5C:
5-connection SMD
Flat-16
■ Inhibit (ON/OFF) TTL-compatible control
■ Programmable output short-circuit current
■ Remote sensing operation
Description
The RHFL4913 high-performance adjustable
positive voltage regulator provides exceptional
radiation performance. It is tested in accordance
with Mil Std 883E Method 1019.6, in ELDRS
conditions.
■ Rad-hard: guaranteed up to 300 krad Mil Std
883E Method 1019.6 high dose rate and 0.01
rad/s in ELDRS conditions
■ Heavy ion, SEL, and SEU immune; able to
14
2
14
sustain 2x10 protons/cm and 2x10
neutrons/cm
The device is available in the Flat-16 and the new
SMD5C hermetic ceramic package, and the
QML-V die is specifically designed for space and
harsh radiation environments. It operates with an
input supply of up to 12 volts.
2
The RHFL4913 is QML-V qualified, DSCC SMD
#5962F02524.
November 2007
Rev 8
1/19
www.st.com
19
Contents
RHFL4913
1
Contents
1
2
3
4
5
6
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6.1
6.2
6.3
6.4
6.5
6.6
ADJ pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Inhibit ON-OFF control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
OCM pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Alternatives to the RHFL4913 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7
8
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7.1
7.2
7.3
Notes on the 16-pin hermetic package . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Remote sensing operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
FPGA power supply lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Die information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8.1
Die bonding pad locations and electrical functions . . . . . . . . . . . . . . . . . 13
9
Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
10
11
2/19
RHFL4913
Diagram
2
Diagram
Figure 1. Block diagram
3/19
Pin configuration
RHFL4913
3
Pin configuration
Figure 2.
Pin configuration (top view for Flat-16, bottom view for SMD5C)
SMD5C
Flat-16
Table 1.
Pin description
Pin name
Flat-16
SMD5C
VO
VI
1, 2, 6, 7
1
4
5
3, 4, 5
GND
ISC
13
8
OCM
INHIBIT
ADJ
10
14
15
3
2
NC
9, 11, 12, 16
4/19
RHFL4913
Maximum ratings
4
Maximum ratings
Table 2.
Symbol
Recommended maximum operating ratings (see Note:)
Parameter
Value
Unit
VI
VO
IO
DC input voltage, VI - VGROUND
DC output voltage range
12
1.23 to 9
2
V
V
Output current, RHFL4913KPA
Output current, RHFL4913SCA
TC = 25 °C power dissipation
Storage temperature range
A
IO
3
PD
Tstg
Top
ESD
15
W
°C
°C
-65 to +150
-55 to +150
Class 3
Operating junction temperature range
Electrostatic discharge capability
Note:
Exceeding maximum ratings may damage the device.
Table 3.
Symbol
Thermal data
Parameter
Value
Unit
RthJC
Thermal resistance junction-case, Flat-16 and SMD5C
Maximum soldering temperature, 10 sec.
8.3
°C/W
°C
TSOLD
300
5/19
Electrical characteristics
RHFL4913
5
Electrical characteristics
Table 4.
Electrical characteristics
(T = 25 °C, V = V +2.5 V, C = C = 1 µF, unless otherwise specified)
J
I
O
I
O
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
VI
Operating input voltage IO = 1 A, TJ = -55 to 125°C
3
1.19
8.7
1
12
1.27
9.3
V
V
V
A
IO = 1 A and or 2, VO = 1.23 V
Operating output
VO
voltage
IO = 1 A and or 2, VO = 9 V
ISHORT Output current limit (1) Adjustable by mask/external resistor
4.5
VI = VO+2.5 V to 12 V, IO = 5 mA,
TJ = +25°C
0.35
0.4
0.4
0.3
0.5
0.5
VI = VO+2.5 V to 12 V, IO = 5 mA,
TJ = -55°C
ΔVO/ΔVI Line regulation
%
VI = VO+2.5 V to 12 V, IO = 5 mA,
TJ = +125°C
VI = VO+2.5 V, IO = 5 to 400 mA,
TJ = +25°C
VI = VO+2.5 V, IO = 5 to 400 mA,
TJ = -55°C
VI = VO+2.5 V, IO = 5 to 400 mA,
TJ = +125°C
ΔVO/ΔVO Load regulation
%
VI = VO+2.5 V, IO = 5 mA to 1 A,
TJ = +25°C
0.5
0.6
0.6
VI = VO+2.5 V, IO = 5 mA to 1A, TJ = -55°C
VI = VO+2.5 V, IO = 5 mA to 1A,
TJ = +125°C
ZOUT
Output impedance
Quiescent current
IO = 100 mA DC and 20 mA rms
100
mΩ
VI = VO+2.5 V, IO = 5 mA, ON mode
(+25°C)
6
8
VI = VO+2.5 V, IO = 30 mA, ON mode
(+25°C)
Iq
mA
VI = VO+2.5 V, IO = 300 mA, ON mode
(+25°C)
25
VI = VO+2.5 V, IO = 1 A, ON mode (+25°C)
VI = VO+2 V, VINH = 2.4 V, OFF mode
VI = VO+2.5 V, IO = 30 mA, (-55°C)
VI = VO+2.5 V, IO = 300 mA, (-55°C)
VI = VO+2.5 V, IO = 1 A, (-55°C)
60
1
14
40
100
8
Quiescent current
ON mode
Iq
mA
VI = VO+2.5 V, IO = 30 mA, (+125°C)
VI = VO+2.5 V, IO = 300 mA, (+125°C)
VI = VO+2.5 V, IO = 1 A, (+125°C)
20
40
6/19
RHFL4913
Electrical characteristics
Table 4.
Symbol
Electrical characteristics (continued)
(T = 25 °C, V = V +2.5 V, C = C = 1 µF, unless otherwise specified)
J
I
O
I
O
Parameter
Test conditions
Min.
Typ.
Max.
Unit
IO = 400 mA, VO = 2.5 to 9 V, (+25°C)
350
300
450
450
400
550
650
550
800
I
I
O = 400 mA, VO = 2.5 to 9 V, (-55°C)
O = 400 mA, VO = 2.5 to 9 V, (+125°C)
IO = 1 A, VO = 2.5 to 9 V, (+25°C)
IO = 1 A, VO = 2.5 to 9 V, (-55°C)
Vd
Dropout voltage
mV
I
O = 1 A, VO = 2.5 to 9 V, (+125°C)
IO = 2 A, VO = 2.5 to 9 V, (+25°C)
IO = 2 A, VO = 2.5 to 9 V, (+125°C)
IO = 5 mA, TJ = -55 to +125°C
IO = 5 mA, TJ = -55 to +125°C
900
950
VINH(ON) Inhibit voltage
VINH(OFF) Inhibit voltage
0.8
V
2.4
60
30
f = 120 Hz
70
40
Supply voltage
SVR
VI = VO + 2.5 V 0.5 V,
dB
rejection (1)
VO = 3 V IO = 5 mA
f = 33 kHz
ISH
Shutdown input current VINH = 5 V
15
µA
V
VOCM
OCM pin voltage
Sinked IOCM = 24 mA active low
0.38
ON-OFF
OFF-ON
20
µs
tPLH
tPHL
Inhibit propagation
delay (1)
VI = VO + 2.5V, VINH = 2.4 V, IO = 400 mA
VO = 3 V
100
µs
eN
Output noise voltage (1) B = 10 Hz to 100 kHz, IO = 5 mA to 2 A
40
µVrms
1. These values are guaranteed by design. For each application it is strongly recommended to comply with the maximum
current limit of the package used.
Figure 3.
Application diagram for remote sensing operation
7/19
Device description
RHFL4913
6
Device description
The RHFL4913 adjustable voltage regulator contains a PNP type power element controlled
by a signal resulting from an amplified comparison between the internal temperature-
compensated band-gap and the fraction of the desired output voltage value obtained from
an external resistor divider bridge. The device is protected by several functional blocks.
6.1
6.2
6.3
ADJ pin
The load output voltage feedback comes from an external resistor divider bridge mid-point
connected to the ADJ pin (allowing all possible output voltage settings as per user
requirements) established between load terminals.
Inhibit ON-OFF control
By setting the INHIBIT pin TTL high, the device switches off the output current and voltage.
The device is ON when the INHIBIT pin is set low. Since the INHIBIT pin is pulled down
internally, it can be left floating in cases where the inhibit function is not used.
Overtemperature protection
A temperature detector internally monitors the power element junction temperature. The
device turns off when a temperature of approximately 175 °C is reached, returning to ON
mode when back to approximately 135 °C. Combined with the other protection blocks, the
device is protected from destructive junction temperature excursions in all load conditions. It
should be noted that when the internal temperature detector reaches 175 °C, the active
power element can be as high as 225 °C. Prolonged operation under these conditions far
exceeds the maximum operating ratings and device reliability cannot be guaranteed.
6.4
Overcurrent protection
An internal non fold-back short circuit limitation is set with I
> 3.8 A (V is 0 V). This
O
SHORT
value can be decreased via an external resistor connected between the I and V pins, with
SC
I
a typical value range of 10 kΩto 200 kΩ. To maintain optimal V regulation, it is necessary to
O
set I
1.6 times greater than the maximum desired application I . When I reaches
SHORT
O O
I
– 300 mA, the current limiter overrules the regulation, V starts to drop and the OCM
SHORT
O
flag is raised. When no current limitation adjustment is required, the I pin must be left
SC
unbiased (as it is in 3 pin packages).
6.5
OCM pin
The OCM pin goes low when the current limit becomes active, otherwise V
= V . It is
I
OCM
buffered and can sink 10 mA. The OCM pin is internally pulled up by a 5 kΩ resistor.
8/19
RHFL4913
Device description
6.6
Alternatives to the RHFL4913
The adjustable RHFL4913 is recommended to replace all industry positive voltage
regulators due to its exceptional radiation performance. To replace 3-terminal industry
devices, the fixed voltage versions of the RHFL4913 should be used.
9/19
Application information
RHFL4913
7
Application information
To adjust the output voltage, the R2 resistor must be connected between the V and ADJ
O
pins. The R1 resistor must be connected between ADJ and ground. Resistor values can be
derived from the following formula:
V = V
(R1+ R2) / R1
O
ADJ
The V
is 1.23 V, controlled by the internal temperature-compensated band gap block.
ADJ
The minimum output voltage is therefore 1.22 V and minimum input voltage is 3 V.
The RHFL4913 adjustable is functional as soon as the V - V voltage difference is slightly
I
O
above the power element saturation voltage. The adjust pin to ground resistor value must
not be greater than 10 kΩ, in order to keep the output feedback error below 0.2%. A
minimum of 0.5 mA I must be set to ensure perfect no-load regulation. It is advisable to
O
dissipate this current into the divider bridge resistor. All available V pins, as well as all
I
available V pins, should always be externally interconnected, otherwise the stability and
O
reliability of the device cannot be guaranteed. The inhibit function switches off the output
current electronically, and therefore very quickly. According to Lenz’s Law, external circuitry
reacts with LdI/dt terms which can be of high amplitude in case somewhere a serial coil
inductance exists. Large transient voltage would develop on both device terminals. It is
advisable to protect the device with Schottky diodes to prevent negative voltage excursions.
In the worst case, a 14 V Zener diode could protect the device input. The device has been
designed for high stability and low dropout operation. Therefore, tantalum input and output
capacitors with a minimum 1 µF are mandatory. Capacitor ESR range is from 0.5 Ω to over
20 Ω. This range is useful when ESR increases at low temperature. When large transient
currents are expected, larger value capacitors are necessary.
In the case of high current operation with short circuit events expected, caution must be
exercised with regard to capacitors. They must be connected as close as possible to the
device terminals. As some tantalum capacitors may permanently fail when subjected to high
charge-up surge currents, it is recommended to decouple them with 470 nF polyester
capacitors.
Since the RHFL4913 adjustable voltage regulator is manufactured with very high speed
bipolar technology (6 GHz f transistors), the PCB layout must be designed with exceptional
T
care, with very low inductance and low mutually coupling lines. Otherwise, high frequency
parasitic signals may be picked up by the device resulting in system self-oscillation. The
benefit is an SVR performance extended to far higher frequencies.
7.1
7.2
Notes on the 16-pin hermetic package
The bottom section of the 16-pin package is metallized in order to allow the user to directly
solder the RHFL4913 onto the equipment heat sink for enhanced heat removal.
Remote sensing operation
A separate kelvin voltage sensing line provides the ADJ pin with exact load "high potential"
information (see Figure 3) . But variable remote load current consumption induces variable
Iq current (Iq is roughly the I current divided by the h of the internal PNP series power
O
FE
element) routed through the parasitic series line resistor RW2. To compensate for this
10/19
RHFL4913
Application information
parasitic voltage, resistor RW1can be introduced to provide the necessary compensating
voltage signal to the ADJUST pin.
7.3
FPGA power supply lines
Because these devices are very sensitive to V transients beyond a few % of their nominal
DD
supply voltage (usually 1.5 V), special attention must be given by supply lines designers to
mitigate possible heavy ion L4913 disturbances. The worst case heavy ion effect can be
summarized as: the L4913 internal control loop being cut (made open) or short-circuited for
a sub-microsecond duration. During such an event, the L4913 die power element can either
provide excessive current or current supply stoppage to the output (V
) for a duration of
OUT
about one microsecond, after which time the L4913 smoothly recovers to nominal operation.
To mitigate these "transients", it is recommended to implement the L4913 PCB layout as
follows:
●
Minimizing series/parallel parasitic inductances of the PC path
Using a low ESR 47 µF Tantalum V filtering capacitor with a 470 nF ceramic
●
OUT
capacitor in parallel with the former (to reduce dynamic ESR)
●
Inserting a 100-200 nH ferrite core on the V -to-tantalum capacitor wire
OUT
With this implementation, the ELDO simulated worst transient case shows no more than 90
mV deviation from the nominal line voltage value.
11/19
Die information
RHFL4913
8
Die information
Figure 4.
Die map
GND
0;1002
13
INBH
-1542;868
14
15
16
OCM
1517;5
ADJ
-1545;574
10
8
SENSE
-1545;287
Short
1517;2
1-2
6-7
3-4-5
VO
-890;-974
VI
0;-974
VO
970;-974
Note:
Pad numbers reflect terminal numbers when placed in case Flat-16.
12/19
RHFL4913
Die information
8.1
Die bonding pad locations and electrical functions
Die physical dimensions:
Die size: 150 mils x 110 mils (3.81 mm by 2.79 mm)
Die thickness: 375 µm 25 µm (14.8 mils 1 mil)
Pad size: V , V
pads: 450 µm x 330 µm (17.7 mils by 13 mils)
IN OUT
Control pads: 184 µm x 184 µm (7.25 mils square)
Interface materials:
Top metallization: Al/Si/Cu, 1.05 µm 0.15 µm
Backside metallization: none
Glassivation:
Type: p. vapox + nitride
Thickness: 0.6 µm 0.1 µm + 0.6 µm 0.08 µm
Substrate: bare silicon
Assembly related information:
Substrate potential: floating recommended to be tied to ground
Special assembly instructions: "Sense" pad not used; not internally connected to
any part of the IC. Can be connected to ground when space anti-static electricity
rules apply.
13/19
Die information
RHFL4913
FLAT-16 (MIL-STD-1835) mechanical data
mm.
inch.
Typ.
Dim.
Min.
Typ.
Max.
Min.
Max.
A
b
2.16
2.72
0.085
0.107
0.43
0.13
9.91
6.91
4.32
0.017
0.005
0.390
0.272
0.170
c
D
E
E2
E3
e
0.76
0.030
1.27
6.72
0.050
0.265
L
Q
S1
0.66
1.14
0.026
0.005
0.045
0.13
b
c
e
L
E3
16
9
E
E2
1
8
E3
L
Q
S1
A
D
7450901A
14/19
RHFL4913
Die information
SMD5C mechanical data
mm.
inch.
Typ.
Dim.
Min.
Typ.
Max.
Min.
Max.
A
A1
b
2.84
3.00
3.15
0.112
0.118
0.015
0.286
0.200
0.095
0.120
0.545
0.124
0.25
7.13
4.95
2.28
2.92
13.71
0.76
7.39
0.38
7.26
5.08
2.41
3.05
13.84
0.51
7.39
5.21
2.54
3.18
13.97
0.010
0.281
0.195
0.090
0.115
0.540
0.030
0.291
0.020
0.291
0.205
0.100
0.125
0.550
b1
b2
b3
D
D1
E
7.52
7.65
0.296
0.301
e
1.91
0.075
7924296B
15/19
Packaging
RHFL4913
9
Packaging
The RHFL4913 adjustable voltage regulator is available in a high thermal dissipation 16-pin
hermetic Flat package, the bottom flange of which is metallized to allow direct soldering to a
heat sink (efficient thermal conductivity). The device is also available in the SMD5C
hermetic ceramic package.
16/19
RHFL4913
Ordering information
10
Ordering information
Table 5.
Die
Order code
Terminal
finish
Output
voltage
Flat-16
SMD5C
Quality level
Adj
Adj
Adj
Adj
Adj
Adj
RHFL4913KPA-01V
RHFL4913KPA-02V
RHFL4913KPA1
RHFL49143SCA-07V
Gold
Solder
Gold
QML-V
QML-V
RHFL4913SCA1
RHFL4913SCA2
EM1
RHFL4913KPA2
Gold
EM2=EM1+48hours B.I.
QML-V die
EM1 die
L4913ADIE2V
L4913ADIES
Table 6.
Part number - SMD equivalent
ST part number
SMD part number
RHFL4913KPA-01V
RHFL4913KPA-02V
L4913ADIE2V
5962F0252401VXC
5962F0252401VXA
5962F0252401V9A
Table 7.
Environmental characteristics
Parameter
Conditions
Value
Unit
Output voltage thermal drift
Output voltage radiation drift
-55°C to +125°C
From 0 krad to 300 krad at 0.55 rad/s
40
8
ppm/°C
ppm/krad
From 0 krad to 300 krad, Mil Std 883E Method
1019.6
Output voltage radiation drift
6
ppm/krad
17/19
Revision history
RHFL4913
11
Revision history
Table 8.
Document revision history
Revision
Date
Changes
29-Oct-2004
27-May-2005
3
4
New Order Codes added - Tables 4 and 5.
The Features, Tables 4, 5 and the Figure 1 has been updated. Add the
Mechanical Data SOC-16.
Mistake on Table 4 (Q.ty Level), Table 7 has been updated and add DIE
Information.
08-Jun-2005
5
30-Jan-2006
26-Jan-2007
6
7
Added new Package SMD5C and Removed old Package SOC-16.
DIE Information and DIE Pad has been updated par. 6, pages 9 and 10.
Pin information for the SMD5C package updated in Table 1; added section
7.3: FPGA power supply lines on page 11. Minor text changes.
23-Nov-2007
8
18/19
RHFL4913
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RHFL7913KPA-02Q
1.2V-9.5V ADJUSTABLE NEGATIVE LDO REGULATOR, CDFP16, ROHS COMPLIANT, HERMETIC SEALED, CERAMIC, FP-16
STMICROELECTR
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RHFL7913SCA-01V
1.2 V-9.5V ADJUSTABLE NEGATIVE LDO REGULATOR, 0.8V DROPOUT, CBCC5, HERMETIC SEALED. CERAMIC, SMD-5
STMICROELECTR
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