ST1355-CD10/XXYY [STMICROELECTRONICS]
EEPROM ; EEPROM\n
| 型号： | ST1355-CD10/XXYY |
| 厂家： | 
ST |
| 描述： | EEPROM
|
| 文件： | 总3页 (文件大小：39K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ST1335, ST1336
ST1355
5-Contact Memory Card IC
272-bit EEPROM with Advanced Security Mechanisms
DATA BRIEFING
■ 5 V Single Supply Voltage
■ Counting Capability (two options)
5
– up to 32767 (8 -1)
4
– 8 times reloadable, up to 4095 (8 -1)
■ Active Authentication Function (ST1335/1355)
■ Cipher Block Chaining Function (ST1355)
■ Memory Divided into :
– 16 bits of Circuit Identification
– 48 bits of Card Identification
– 40 bits of Count Data
Micromodule
(D10)
Micromodule
(D15)
– 16 bits for Validation Certificate
– 24 bits of Transport Code
– 64 bits of Issuer Data (ST1336) or
Authentication Secret Key (ST1335/1355)
– 32 bits of Anti-tearing Flags (optional)
– 56 bits of User data (optionally not erasable)
■ 1 Million Erase/Write Cycle (minimum)
■ 10 Year Data Retention (minimum)
■ 3.5 ms Programming Time at 5 V (typical)
■ 500 µA Supply Current at 5 V (typical)
■ 250 µA Stand-by Current at 5 V (typical)
Wafer
DESCRIPTION
The members of the ST1335/1336/1355 family are
principally designed for use in prepaid Phonecard
applications. Each is a 272-bit EEPROM device,
with associated security logic and special fuses to
control memory access. The memory is arranged
as a matrix of 34 x 8 cells, accessed in a serial bit-
wise fashion for reading and programming, and in
a byte-wise fashion for internal erasing. An on-chip
Figure 1. Logic Diagram
V
CC
RST
CLK
ST1335
ST1336
ST1355
I/O
Table 1. Signal Names
CLK
RST
I/O
Clock
Reset
Data Input / Output
Supply Voltage
Ground
V
CC
GND
AI03106b
GND
October 1999
1/3
Complete data available under NDA.
ST1335, ST1336, ST1355
Figure 2. Memory Map
0
0
Circuit
Identification Area
1
RAM (Write-Only)
16 masked bits
16
32 bits
(RN)
(ST1335, ST1355)
32
Card Identification
Area (ID)
48 bits
40 bits
64
Data Area (CD)
(Counters and
Transport Code)
104
112
8 bits
Reserved Area (RA)
Certificate (CER)
16 bits
128
Issuer-Defined Area
(ST1336)
64 bits
Authentication
Secret Key (SK)
(ST1335, ST1355)
192
Reserved Area
(RA)
256
260
264
4 bits
4 bits
Signature
Fuses
Unused
24 bits
288
320
32 bits
Anti-Tearing Flags
User-Defined Area
56 bits
376
AI03385
Note: 1. The write-only RAM area (RN) is applicable only for the User Configuration.
address counter provides an internal address
space of up to 512 bits.
key area (ST1335/1355), and a user area. This is
summarized in Figure 2.
Each member of the ST1335/1336/1355 family
has an identification data area, unit-counters (with
an anti-tearing mechanism for reliable usage in
open readers), a post validation certificate, an
issuer area (ST1336) or an authentication secret
The validation certificate allows the recognition of
the device by the appropriate security module.
The anti-tearing mechanism guards against extra,
spurious count signals being executed when the
2/3
ST1335, ST1336, ST1355
card is unexpectedly extracted, while an operation
is underway, in an open reader.
OPTIONS
Three options can be chosen on ordering the
device:
– The
anti-tearing
mechanism
can
be
EXTERNAL COMMANDS
The device uses five contacts: V , GND, I/O,
CLK, RST. Four commands distinct can be
composed using these external pins:
– RESET: to reset the internal address register to
000d
disconnected. In this case, the anti-tearing flag
area from bit 288d to bit 319d is unused (Figure
2).
CC
– The user area, from bit 320d to bit 375d, can be
defined as “not erasable” in the User
Configuration.
– READ: to increment the internal address
register and read the data bit at the new address
– COMPARE: to allow comparison of the
presented code against the internal transport
code
– The reload mechanism can be activated. In this
case, erasing a bit in the reload counter
refreshes the certificate (CER). At this time, the
certificate can be programmed with a new
value.
– PROGRAM: to program the bit at the current
address
ORDERING INFORMATION
The notation used for the device number is as
shown in Table 2. For a list of available options
(speed, package, etc.) or for further information on
any aspect of this device, please contact your
nearest ST Sales Office.
CONFIGURATIONS
The device works in two distinct configurations:
– Issuer Configuration: for the card manufacturer.
Customized data can be written to the chip, to
initialize it before release to the end user.
– User Configuration: for use by the end user of
the card, but with restricted access.
Table 2. Ordering Information Scheme
Example:
ST1335
–
C
W4
/
XX
YY
Product
Transport Code
35
36
55
Active Authentication Function
Issuer Area
Given by ST
Cipher Block Chaining
Authentication Function
Customer Code
Given by the Issuer
Fuse Blow Voltage
Delivery Form
1
Micromodule on reel
D10
D15
B
C
6 V
1
Micromodule on reel
5 V
W4 Wafer (180 µm thickness)
W2 Wafer (280 µm thickness)
Note: 1. Please contact your nearest ST Sales Office to check on availability
3/3
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