ST16SF48 [STMICROELECTRONICS]
Smartcard MCU With 8176 Bytes EEPROM; 智能卡微控制器与8176字节EEPROM型号: | ST16SF48 |
厂家: | ST |
描述: | Smartcard MCU With 8176 Bytes EEPROM |
文件: | 总2页 (文件大小:31K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
®
ST16SF48
Smartcard MCU
With 8176 Bytes EEPROM
DATA BRIEFING
■ 8 BIT ARCHITECTURE CPU
■ 16 KBytes of USER ROM, SECTOR
COMBINATIVE
■ 1.5 KByte of SYSTEM ROM
■ 384 Bytes of RAM
■ 8176 Bytes of EEPROM, SECTOR
COMBINATIVE
– Highly reliable CMOS EEPROM technology
– 10 year data retention
Micromodule (D4)
– 300,000 Erase/Write cycle endurance
– Protected One Time Programmable block (32
or 64 bytes)
– 1 to 32 bytes block either Erase or Write in
single cycle programming
■ EXTENDED VOLTAGE OPERATION
– V Range: 2.7V to 5.5V
CC
■ SERIAL ACCESS, ISO 7816-3 COMPATIBLE
■ POWER SAVING STANDBY MODE
■ UP TO 5 MHz INTERNAL OPERATING
FREQUENCY
Wafer
■ VERY HIGH SECURITY FEATURES
INCLUDING EEPROM FLASH ERASE
■ CONTACT ASSIGNMENT COMPATIBLE ISO
7816-2
■ ESD PROTECTION GREATER THAN 5000V
■ MEETS GSM 11.11 AND 11.12
SPECIFICATIONS
■ 2 OPERATING CONFIGURATIONS
– ISSUER
– USER
BD.SF48/9809V5
1/2
This is Brief Data from STMicroelectronics. Details are subject to change without notice. For complete data, please contact
your nearest Sales Office or SmartCard Products Divison, Rousset, France. Fax: (+33) 4 42 25 87 29
ST16SF48
DESCRIPTION
Reliability data related to the ST16SF48 product
manufactured using STMicroelectronics ad-
vanced CMOS EEPROM technology confirm data
retention up to 10 years and endurance up to
300,000 Erase/Write cycles.
The ST16SF48, a member of the standard ST16
device family, is a serial access microcontroller
especially designed for high volume and cost
competitive Smartcard applications where
firmware security algorithm must be implemented.
The ST16SF48 is based on 8 bit CPU core and in-
cludes on chip memories: 384 Bytes of RAM, 16
KBytes of USER ROM, 1.5 KByte of SYSTEM
ROM, and 8176 Bytes of EEPROM.
As all other ST16 family members, the ST16SF48
is fully compatible with the ISO standards for
Smartcard applications.
Software development (ROM code, options) can
be completed by the ST16-19HDS development
system.
Both ROM and EEPROM memories can be con-
figured into two sectors. Access rules from any
memory section or sector to any other are set-up
by the User’s defined Memory Access Control Ma-
trix (MACM).
The ST16SF48 can be delivered either in unsawn
or sawn wafers, 180 or 275 micron thickness as
well as in micromodule package.
Figure 1. Block Diagram
V
GENERATION
PP
RAM
SYSTEM
ROM
ROM
8 BIT
CPU
1615 KBytes
384
1.5 KBtyte
EEPROM
8176 Bytes
BYTES
SECTORS
COMBIN.
SECTORS COMBINATIVE
SECT.
S
SECT. SECT.
SECTOR
SECTOR
B
A
B
A
MEMORY ACCESS CONTROL MATRIX
INTERNAL BUS
CLK
RST
SERIAL I/0's
INTERFACE
NUMBER
GENERATOR
SECURITY
LOGIC
V
CC
I/O1
I/O2
GND
SCP 102b/DS
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