ST1S09PU [STMICROELECTRONICS]

2A, 1.5 MHz PWM step-down switching regulator with synchronous rectification; 2A , 1.5 MHz的PWM降压型开关稳压器具有同步整流
ST1S09PU
型号: ST1S09PU
厂家: ST    ST
描述:

2A, 1.5 MHz PWM step-down switching regulator with synchronous rectification
2A , 1.5 MHz的PWM降压型开关稳压器具有同步整流

稳压器 开关式稳压器或控制器 电源电路 开关式控制器
文件: 总18页 (文件大小:417K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ST1S09  
2A, 1.5 MHz PWM step-down switching regulator  
with synchronous rectification  
Features  
1.5MHz fixed frequency PWM with current  
control mode  
2A output current capability  
Typical efficiency: > 90%  
2% DC output voltage tolerance  
Two versions available: Power Good or Inhibit  
Integrated output over-voltage protection  
DFN6 (3x3mm)  
Non switching quiescent current: (typ) 1.5mA  
over temperature range  
R  
(typ) 100mΩ  
DSON  
Moreover, since the required synchronous  
rectifier is integrated, the number of the external  
components is reduced to minimum: a resistor  
divider, an inductor and two capacitors. The  
Power Good function continuously monitors the  
output voltage. An open drain power good flag is  
released when the output voltage is within  
regulation. In addition, a low output ripple is  
guaranteed by the current mode PWM topology  
and by the use of low E.S.R. SMD ceramic  
capacitors. The device is thermally protected and  
the output current limited to prevent damages due  
to accidental short circuit. The ST1S09 is  
available in the DFN6 3x3mm package.  
Utilizes tiny capacitors and inductors  
Operating junction temp. -30°C to 125°C  
Available in DFN6 3x3mm exposed pad  
Description  
The ST1S09 is a step-down DC-DC converter  
optimized for powering low output voltage  
applications. It supplies a current in excess of 2A  
over an input voltage range from 2.7V to 6V.  
A high PWM switching frequency (1.5MHz) allows  
the use of tiny surface-mount components.  
Table 1.  
Devices summary  
Order codes  
Packaging  
Package  
ST1S09PU  
ST1S09APU (1)  
ST1S09IPU  
ST1S09PUR  
ST1S09APUR  
ST1S09IPUR  
DFN6D (3x3 mm)  
DFN6D (3x3 mm)  
DFN6D (3x3 mm)  
1. Available on request.  
July 2007  
Rev. 2  
1/18  
www.st.com  
18  
ST1S09  
Contents  
1
2
3
4
5
6
7
8
9
Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
2/18  
ST1S09  
Diagram  
1
Diagram  
Figure 1. Schematic diagram  
(*) Only for ST1S09IPU  
(**) Only for ST1S09PU  
3/18  
Pin configuration  
ST1S09  
2
Pin configuration  
Figure 2.  
Pin connections (top view)  
ST1S09  
ST1S09A  
ST1S09I  
Table 2.  
Pin N°  
Pin description  
Symbol  
Name and function  
1
2
3
4
5
6
FB  
GND  
Feedback voltage  
System ground  
Switching pin  
SW  
VIN_SW  
VIN_A  
Power supply for the MOSFET switch  
Power supply for analog circuit  
INH/PG/NC  
Inhibit (to turn off the device) / Power Good / Not Connected.  
Exposed  
Pad  
To be connected to PCB ground plane for optimal electrical and thermal  
performance.  
GND  
4/18  
ST1S09  
3
Maximum ratings  
Maximum ratings  
Table 3.  
Absolute maximum ratings  
Symbol  
VIN_SW  
Parameter  
Value  
Unit  
Positive power supply voltage  
Positive power supply voltage  
Inhibit voltage (I version)  
-0.3 to 7  
-0.3 to 7  
V
V
VIN_A  
VINH  
-0.3 to VI + 0.3  
-0.3 to 7  
-0.3 to 3  
V
V
SWITCH Voltage Max. voltage of output pin  
VFB  
PG  
Feedback voltage  
V
Power Good open drain  
-0.3 to 7  
-40 to 150  
-65 to 150  
260  
V
TJ  
Max junction temperature  
Storage temperature range  
Lead temperature (soldering) 10 sec  
°C  
°C  
°C  
TSTG  
TLEAD  
Note:  
Absolute Maximum Ratings are those values beyond which damage to the device may  
occur. Functional operation under these conditions is not implied.  
Table 4.  
Symbol  
Thermal data  
Parameter  
Thermal resistance junction-case  
Value  
Unit  
RthJC  
RthJA  
10  
55  
°C/W  
°C/W  
Thermal resistance junction-ambient  
Table 5.  
ESD Performance  
Parameter  
Symbol  
Test conditions  
Value  
Unit  
ESD  
ESD  
ESD protection voltage  
ESD protection voltage  
HBM  
MM  
2
KV  
V
500  
5/18  
Electrical characteristics  
ST1S09  
4
Electrical characteristics  
Table 6.  
Electrical characteristics for ST1S09PU Refer to Figure 21. application circuit  
= V = 5V, V = 1.2V, C1 = 4.7µF, C2 = 22µF, L1 = 2.7µH, T = -30 to 125°C  
V
IN_SW  
IN_A  
O
J
(unless otherwise specified. Typical values are referred to 25°C)  
Symbol  
Parameter  
Feedback voltage  
Test conditions  
Min.  
Typ.  
Max. Unit  
FB  
IFB  
VI  
784  
800  
816  
600  
5.5  
3.9  
mV  
nA  
V
VFB pin bias current  
Input voltage  
IO = 10mA to 2A  
4.5  
3.5  
VI Rising  
3.7  
V
UVLO  
Under voltage lock out threshold  
Hysteresis  
150  
mV  
Over voltage protection  
threshold  
VO rising  
VO falling  
1.05 VO 1.1 VO  
5
V
OVP  
Over voltage protection  
hysteresis  
%
IOVP  
IQ  
Overvoltage clamping current  
Quiescent current  
VO = 1.2V  
300  
mA  
mA  
A
Not switching  
1.5  
2.5  
IO  
Output current  
VI = 4.5 to 5.5V Note: 1  
2
VI = 4.5V to 5.5V, IO = 100mA  
Note: 1  
%VO/  
ΔVI  
%VO/ΔVI Output line regulation  
0.16  
0.2  
%VO/ΔIO Output load regulation  
IO = 10mA to 2A Note: 1  
0.6  
1.8  
%
MHz  
%
PWMfS PWM switching frequency  
VFB = 0.65V  
1.2  
80  
1.5  
87  
DMAX  
Maximum duty cycle  
Power good output threshold  
Power good output voltage low  
0.92 VO  
V
ISINK = 6mA open drain output  
ISW = 750 mA  
0.4  
3.5  
V
R
DSON-N NMOS switch on resistance  
0.1  
0.1  
2.9  
Ω
RDSON-P PMOS switch on resistance  
ISW = 750 mA  
Ω
ISWL  
Switching current limitation  
Note: 1  
2.5  
65  
82  
A
IO = 10mA to 100mA, VO = 3.3V  
IO = 100mA to 2A, VO = 3.3V  
Efficiency Note: 1  
%
ν
87  
150  
20  
TSHDN  
THYS  
Thermal shutdown  
°C  
°C  
Thermal shutdown hysteresis  
IO = 100mA to 1A, TA = 25°C  
tR = tF 200ns, Note: 1  
%VO/ΔIO Load transient response  
-10  
-10  
+10  
+10  
%VO  
%VO  
IO = 10mA to IO = short,  
TA = 25°C Note: 1  
%VO/ΔIO Short circuit removal response  
Note:  
1
Guaranteed by design, but not tested in production.  
6/18  
ST1S09  
Table 7.  
Symbol  
Electrical characteristics  
Electrical characteristics for ST1S09IPU Refer to Figure 22. application circuit  
= V = V = 5V, V = 1.2V, C1 = 4.7µF, C2 = 22µF, L1 = 2.7µH,  
T = -30 to 125°C (unless otherwise specified. Typical values are referred to 25°C)  
V
IN_SW  
IN_A  
INH  
O
J
Parameter  
Feedback voltage  
Test conditions  
Min.  
Typ.  
Max. Unit  
FB  
IFB  
VI  
784  
800  
816  
600  
mV  
nA  
V
VFB pin bias current  
Minimum input voltage  
IO = 10mA to 2A  
2.7  
Over voltage protection  
threshold  
VO rising  
VO falling  
1.05 VO 1.1 VO  
V
OVP  
Over voltage protection  
hysteresis  
5
%
V
INH > 1.2V, not switching  
1.5  
2.5  
1
mA  
µA  
A
IQ  
IO  
Quiescent current  
Output current  
VINH < 0.4V, T = - 30°C to 85°C  
VI = 2.7 to 5.5V Note: 1  
Device ON, VI = 2.7 to 5.5V  
Device ON, VI = 2.7 to 5V  
Device OFF  
2
1.3  
1.2  
VINH  
Inhibit threshold  
Inhibit pin current  
V
0.4  
2
IINH  
µA  
VI = 2.7V to 5.5V, IO = 100mA  
Note: 1  
%VO/  
ΔVI  
%VO/ΔVI Output line regulation  
0.16  
0.2  
%VO/  
ΔIO  
%VO/ΔIO Output load regulation  
IO = 10mA to 2A Note: 1  
0.6  
1.8  
PWMfS PWM switching frequency  
VFB = 0.65V  
1.2  
80  
1.5  
87  
MHz  
%
DMAX  
RDSON-N NMOS switch on resistance  
DSON-P PMOS switch on resistance  
Maximum duty cycle  
ISW = 750 mA  
0.1  
0.1  
2.9  
Ω
R
ISW = 750 mA  
Ω
ISWL  
Switching current limitation  
Note: 1  
2.5  
65  
82  
3.5  
A
IO = 10mA to 100mA, VO = 3.3V  
IO = 100mA to 2A, VO = 3.3V  
ν
Efficiency Note: 1  
%
87  
150  
20  
TSHDN  
THYS  
Thermal shutdown  
°C  
°C  
Thermal shutdown hysteresis  
IO = 100mA to 1A, TA = 25°C  
tR = tF 200ns, Note: 1  
%VO/ΔIO Load transient response  
-10  
-10  
+10  
+10  
%VO  
%VO  
IO = 10mA to IO = short,  
TA = 25°C Note: 1  
%VO/ΔIO Short circuit removal response  
Note:  
1
Guaranteed by design, but not tested in production.  
7/18  
Typical performance characteristics  
ST1S09  
5
Typical performance characteristics  
(L = 3.3µH, C = 4.7µF, C = 2F, unless otherwise specified)  
I
O
Figure 3.  
Voltage feedback vs temperature  
Figure 4.  
Feedback pin bias current vs temp.  
840  
830  
820  
810  
800  
790  
780  
770  
760  
840  
740  
640  
540  
440  
340  
240  
140  
40  
VI=5V, IO=10mA  
VI=5V  
VO@1.2V  
-60  
-75 -50 -25  
0
25 50  
T [°C]  
75 100 125 150 175  
-75 -50 -25  
0
25 50 75 100 125 150 175  
T [°C]  
Figure 5.  
Quiescent current non switching vs Figure 6.  
temperature  
Inhibit voltage vs temperature  
3
2.5  
2
1.6  
VI=5V  
VO@1.2V  
ON  
OFF  
1.4  
1.2  
1
1.5  
1
0.8  
0.6  
0.4  
0.2  
0
0.5  
0
VI=5V, IO=from 10mA to 2A  
-75 -50 -25  
0
25  
50  
75 100 125 150 175  
-75 -50 -25  
0
25 50 75 100 125 150 175  
T [°C]  
T [°C]  
Figure 7.  
Inhibit voltage vs input voltage  
Figure 8.  
Output voltage vs input voltage  
1.40  
1.20  
1.00  
0.80  
0.60  
0.40  
0.20  
VO@1.2V  
1.6  
1.4  
1.2  
1
VI=from 2.7 to 5.5V, IO=2A  
ON  
OFF  
0.8  
0.6  
0.4  
0.2  
0
VCC =VINH=from 0 to 5.5V, IO=2A  
0.00  
0
2
3
4
5
6
7
1
2
3
4
5
6
VI [V]  
VI [V]  
8/18  
ST1S09  
Typical performance characteristics  
Figure 9.  
Line regulation vs temperature  
Figure 10. Load regulation vs temperature  
1.1  
1
0.8  
0.6  
0.4  
0.2  
0
VI = 5V, IO from10mA to 2A  
VO@1.2V  
VO@1.2V  
VI = from 2.7V to 5.5V, IO = 100mA  
0.9  
0.7  
0.5  
0.3  
-0.2  
-0.4  
-0.6  
-0.8  
-1  
0.1  
-0.1  
-0.3  
-0.5  
-75 -50 -25  
0
25 50 75 100 125 150 175  
-75 -50 -25  
0
25 50 75 100 125 150 175  
T [°C]  
T [°C]  
Figure 11. PWM Switching frequency vs  
temperature  
Figure 12. Maximum duty cycle vs  
temperature  
90  
88  
86  
84  
82  
80  
78  
76  
74  
2
1.9  
1.8  
1.7  
1.6  
1.5  
1.4  
1.3  
1.2  
1.1  
1
VO@1.2V  
VI=5V, VFB=0.6V  
VO@3.3V  
-50  
VI=5V, VFB=0.6V  
72  
70  
-75 -50 -25  
0
50 75 100 125 150 175  
25  
-75  
-25  
0
25  
50  
75  
100  
125  
150  
175  
T [°C]  
T [°C]  
Figure 13. Under voltage lock out threshold  
vs temperature  
Figure 14. Efficiency vs output current  
4
3.9  
3.8  
3.7  
3.6  
3.5  
3.4  
3.3  
95  
85  
75  
VO=3.3V  
V
O=1.2V  
65  
55  
45  
35  
25  
VIN=5V  
3.2  
3.1  
3
VO@1.2V  
IO=10mA  
0
500  
1000  
Iout [mA]  
1500  
2000  
-75 -50 -25  
0
25  
50  
75 100 125 150 175  
T [°C]  
9/18  
Typical performance characteristics  
Figure 15. Efficiency vs temperature  
ST1S09  
Figure 16. Over voltage protection vs  
temperature  
1.4  
100  
Resistor 1.2k from VI and VSW  
VO=3.3V  
95  
1.3  
90  
85  
VSW=1.2V  
VI=5V, VO=3.3V, CFB=100nF  
1.2  
1.1  
1
80  
75  
70  
65  
60  
55  
50  
45  
40  
VO=1.2V  
OVP ON  
VI=5V, IO=100mA  
0.9  
0.8  
-75 -50 -25  
0
25 50 75 100 125 150 175  
-75 -50 -25  
0
25 50 75 100 125 150 175  
T [°C]  
T [°C]  
Figure 17. Over voltage protection vs  
temperature  
Figure 18. Over voltage protection hyst. vs  
temperature  
14  
1.4  
Resistor 1.2k from VI and VSW  
12  
Resistor 1.2k from VI and VSW  
1.3  
VSW=0.8V  
VI=5V, VO=3.3V, CFB=100nF  
VSW=0.8V  
VI=5V, VO=3.3V, CFB=100nF  
10  
8
1.2  
1.1  
1
6
OVP ON  
4
OVP ON  
0.9  
0.8  
2
0
-75 -50 -25  
0
25 50 75 100 125 150 175  
-75 -50 -25  
0
25 50 75 100 125 150 175  
T [°C]  
T [°C]  
Figure 19. Load transient  
Figure 20. Inhibit transient  
VINH  
VO  
IO  
VO  
IO  
VI=5V, VINH=0 to 2V, IO=2A, L=3.3µH, CI=4.7µF, CO=22µF,  
VO=3.3V  
VI=5V, VO=1.2V, IO=100mA to1A, L=3.3µH, CI=4.7µF,  
CO=22µF  
10/18  
ST1S09  
Typical application  
6
Typical application  
Figure 21. Application circuits  
Figure 22. Application circuits  
11/18  
Application information  
ST1S09  
7
Application information  
The ST1S09 is an adjustable current mode PWM step-down DC/DC converter with internal  
2A power switch, packaged in a DFN6 3x3mm.  
The device is a complete 2A switching regulator with its internal compensation eliminating  
the need for additional components.  
The constant frequency, current mode, PWM architecture and stable operation with ceramic  
capacitors results in low, predictable output ripple.  
The over-voltage protection circuit acts when the output voltage is over 10% of the rated  
voltage and within 200ns the low side MOSFET will be turned on to clamp the output  
transient. The current limit for clamping is about 400mA. When the output voltage drops to  
about 5% above the nominal level, the device returns to nominal closed loop switching  
operation.  
The open drain Power Good (PG) pin is released when the output voltage is higher than  
0.92 x V  
. If the output voltage is below 0.92 x V , the PG pin goes to low impedance.  
O_NOM  
O
Other circuits fitted to the device protection are the Thermal Shut-down block, which turns  
off the regulator when the junction temperature exceeds 150°C (typ), and the cycle-by-cycle  
Current Limiting, which provides protection against shorted outputs.  
As an adjustable regulator, the ST1S09’s output voltage is determined by an external  
resistor divider. The desired value is given by the following equation:  
V = V [1+R1/R2]  
O
FB  
To utilize the device, only a few components are required: an inductor, two capacitors and  
the resistor divider. The inductor chosen must be able to reach peak current level without  
saturating. Its value can be selected while taking into account that a large inductor value  
increases the efficiency at low output current and reduces output voltage ripple, while a  
smaller inductor can be chosen when it is important to reduce package size and the total  
cost of the application. Finally, the ST1S09 has been designed to work properly with X5R or  
X7R SMD ceramic capacitors both at the input and at the output. These types of capacitors,  
due to their very low series resistance (ESR), minimize the output voltage ripple. Other low  
ESR capacitors can be used according to the need of the application without compromising  
the correct functioning of the device.  
12/18  
ST1S09  
Package mechanical data  
8
Package mechanical data  
®
In order to meet environmental requirements, ST offers these devices in ECOPACK  
packages. These packages have a Lead-free second level interconnect. The category of  
second Level Interconnect is marked on the package and on the inner box label, in  
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering  
conditions are also marked on the inner box label. ECOPACK is an ST trademark.  
ECOPACK specifications are available at: www.st.com.  
13/18  
Package mechanical data  
ST1S09  
DFN6D (3x3) Mechanical Data  
mm.  
inch.  
Typ.  
Dim.  
Min.  
Typ.  
Max.  
1.00  
0.05  
Min.  
0.031  
0
Max.  
A
A1  
A3  
b
0.80  
0.039  
0
0.02  
0.20  
0.001  
0.002  
0.008  
0.23  
2.90  
2.23  
2.90  
1.50  
0.45  
3.10  
2.50  
3.10  
1.75  
0.009  
0.114  
0.088  
0.114  
0.059  
0.018  
0.122  
0.098  
0.122  
0.069  
D
3.00  
3.00  
0.118  
0.118  
D2  
E
E2  
e
0.95  
0.037  
L
0.30  
0.40  
0.50  
0.012  
0.016  
0.020  
7946637B  
14/18  
ST1S09  
Package mechanical data  
Figure 23. DFN6 (3x3) Footprint Recommended Data  
15/18  
Package mechanical data  
ST1S09  
Tape & Reel QFNxx/DFNxx (3x3) Mechanical Data  
mm.  
Typ.  
inch.  
Typ.  
Dim.  
Min.  
Max.  
330  
Min.  
Max.  
A
C
12.992  
0.519  
12.8  
20.2  
60  
13.2  
0.504  
0.795  
2.362  
D
N
T
18.4  
0.724  
Ao  
Bo  
Ko  
Po  
P
3.3  
3.3  
1.1  
4
0.130  
0.130  
0.043  
0.157  
0.315  
8
16/18  
ST1S09  
9
Revision history  
Revision history  
Table 8.  
Revision history  
Revision  
Date  
Changes  
18-Jun-2007  
05-Jul-2007  
1
2
First Issue.  
Removed incorrect watermark.  
17/18  
ST1S09  
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