STD150NH02LT4 [STMICROELECTRONICS]
N-channel 24V- 0.003Ω - 150A - ClipPAK™ - IPAK STripFET™ IlI Power MOSFET; N沟道24V- 0.003Ω - 150A - ClipPAK ™ - IPAK的STripFET ™伊犁功率MOSFET
| 型号： | STD150NH02LT4 |
| 厂家： | 
ST |
| 描述： | N-channel 24V- 0.003Ω - 150A - ClipPAK™ - IPAK STripFET™ IlI Power MOSFET |
| 文件： | 总16页 (文件大小：489K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STD150NH02L-1
STD150NH02L
N-channel 24V - 0.003Ω - 150A - ClipPAK™ - IPAK
STripFET™ IlI Power MOSFET
General features
VDSSS
RDS(on)
ID
Type
STD150NH02L
24V
24V
<0.0035Ω
<0.0035Ω
150A
150A
3
3
STD150NH02L-1
2
1
1
■ R
* Qg industry’s benchmark
DS(on)
ClipPAKTM
IPAK
■ Conduction losses reduced
■ Switching losses reduced
■ Low threshold device
Description
Internal schematic diagram
The STD150NH02L utilizes the latest advanced
design rules of ST’s proprietary STripFET™
technology. This novel 0.6µ process utilizes also
unique metallization techniques that couple to a
"bondless" assembly technique result in
outstanding performance with standard DPAK
outline. It is therefore ideal in high performance
DC-DC converter applications where efficiency it
to be achieved at very high out currents.
Applications
■ Switching application
Order codes
Part number
Marking
Package
Packaging
STD150NH02LT4
STD150NH02L-1
D150NH02L
D150NH02L
ClipPAK™
IPAK
Tape & reel
Tube
December 2006
Rev 9
1/16
www.st.com
16
Contents
STD150NH02L
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
5
6
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16
STD150NH02L
Electrical ratings
1
Electrical ratings
Table 1.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
(1)
Vspike
Drain-source voltage rating
30
24
V
V
VDS
Drain-source voltage (VGS = 0)
VDGR Drain-gate voltage (RGS = 20KΩ)
24
V
VGS
ID
Drain-source voltage
20
V
Drain current (continuous) at TC = 25°C
Drain current (continuous) at TC=100°C
Drain current (pulsed)
150
107
600
125
0.83
500
A
ID
A
(2)
IDM
A
PTOT Total dissipation at TC = 25°C
W
W/°C
mJ
Derating factor
(3)
EAS
Single pulse avalanche energy
Storage temperature
Tstg
TJ
-55 to 175
°C
Max. operating junction temperature
1. Garanted when external Rg = 4.7 Ω and tf < tfmax
2. Pulse width limited by safe operating area
3. Starting TJ = 25 oC, ID = 75A, VDD = 10V
.
Table 2.
Symbol
Thermal data
Parameter
Value
Unit
RthJC Thermal resistance junction-case Max
RthJA Thermal resistance junction-ambient Max
1.2
°C/W
°C/W
100
Maximum lead temperature for soldering
purpose
Tl
275
°C
3/16
Electrical characteristics
STD150NH02L
2
Electrical characteristics
(T
=25°C unless otherwise specified)
CASE
(1)
Table 3.
Symbol
On /off states
Parameter
Test conditions
Min.
Typ.
Max. Unit
Drain-source breakdown
voltage
V(BR)DSS
ID = 25mA, VGS = 0
24
V
V
DS = 20V
1
µA
µA
Zero gate voltage drain
current (VGS = 0)
IDSS
VDS = 20V, TC = 125°C
10
Gate body leakage current
(VDS = 0)
IGSS
VGS = 20V
100
nA
V
VGS(th)
RDS(on)
VDS= VGS, ID = 250µA
Gate threshold voltage
1
1.8
VGS = 10V, ID = 75A
VGS = 5V, ID = 37.5A
0.003
0.004
Ω
Ω
Static drain-source on
resistance
0.0035
0.0065
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Table 4.
Symbol
Dynamic
Parameter
Test conditions
Min. Typ. Max. Unit
(1)
Forward transconductance VDS = 10 V I = 75A
60
S
gfs
, D
Ciss
Coss
Crss
Input capacitance
4450
1126
141
pF
pF
pF
VDS = 15V, f = 1 MHz,
VGS = 0
Output capacitance
Reverse transfer
capacitance
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
69
13
9
93
nC
nC
nC
VDD = 16V, ID = 150A
VGS = 10V
(2)
Qoss
Output charge
VDS = 16V, VGS = 0V
27
64
nC
nC
(3)
Qgls
Third-quadrant gate charge VDS < 0V, VGS = 10V
f = 1MHz gate DC Bias = 0
RG
Gate input resistance
Test signal level = 20mV
Open drain
1.6
Ω
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
2. Qoss = Coss*∆ Vin , Coss = Cgd + Cds . See Appendix A
3. Gate charge for synchronous operation
4/16
STD150NH02L
Electrical characteristics
Table 5.
Switching times
Parameter
Symbol
Test conditions
Min.
Typ. Max. Unit
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
14
224
69
ns
ns
ns
ns
VDD = 10V, ID = 75A,
RG = 4.7Ω, VGS = 10V
Figure 13 on page 8
Turn-off delay time
Fall time
40
54
Table 6.
Symbol
Source drain diode
Parameter
Test conditions
Min
Typ. Max Unit
ISD
Source-drain current
150
600
1.15
A
A
V
ISDM
Source-drain current (pulsed)
Forward on voltage
(1)
ISD = 75A, VGS = 0
ISD = 150A,
VSD
trr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
47
58
ns
µC
A
di/dt = 100A/µs,
Qrr
VDD = 15V, TJ = 150°C
2.5
IRRM
Figure 15 on page 8
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
5/16
Electrical characteristics
STD150NH02L
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
Figure 2. Thermal impedance
Figure 3. Output characterisics
Figure 4. Transfer characteristics
Figure 5. Transconductance
Figure 6. Static drain-source on resistance
6/16
STD150NH02L
Electrical characteristics
Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage Figure 10. Normalized on resistance vs
vs temperature
temperature
Figure 11. Source-drain diode forward
characteristics
Figure 12. Normalized breakdown voltage vs
temperature
7/16
Test circuit
STD150NH02L
3
Test circuit
Figure 13. Switching times test circuit for
resistive load
Figure 14. Gate charge test circuit
Figure 15. Test circuit for inductive load
switching and diode recovery times
Figure 16. Unclamped Inductive load test
circuit
Figure 17. Unclamped inductive waveform
8/16
STD150NH02L
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
9/16
Package mechanical data
STD150NH02L
TO-251 (IPAK) MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
2.2
TYP.
MAX.
2.4
MIN.
0.086
0.035
0.027
0.025
0.204
MAX.
0.094
0.043
0.051
0.031
0.212
0.033
A
A1
A3
B
0.9
1.1
0.7
1.3
0.64
5.2
0.9
B2
B3
B5
B6
C
5.4
0.85
0.3
0.012
0.95
0.6
0.6
6.2
6.6
4.6
16.3
9.4
1.2
1
0.037
0.023
0.023
0.244
0.260
0.181
0.641
0.370
0.047
0.039
0.45
0.48
6
0.017
0.019
0.236
0.252
0.173
0.626
0.354
0.031
C2
D
E
6.4
4.4
15.9
9
G
H
L
L1
L2
0.8
0.8
0.031
H
L
D
L2
L1
0068771-E
10/16
STD150NH02L
Package mechanical data
11/16
Packaging mechanical data
STD150NH02L
5
Packaging mechanical data
DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
mm
MIN. MAX. MIN. MAX.
330 12.992
inch
DIM.
A
B
C
D
G
N
T
1.5
12.8
20.2
16.4
50
0.059
13.2 0.504 0.520
0.795
18.4 0.645 0.724
1.968
22.4
0.881
BASE QTY
BULK QTY
2500
TAPE MECHANICAL DATA
2500
mm
MIN. MAX. MIN. MAX.
6.8 0.267 0.275
10.4 10.6 0.409 0.417
12.1 0.476
inch
DIM.
A0
B0
B1
D
7
1.5
1.5
1.6 0.059 0.063
0.059
D1
E
1.65 1.85 0.065 0.073
7.4 7.6 0.291 0.299
2.55 2.75 0.100 0.108
F
K0
P0
P1
P2
R
3.9
7.9
1.9
40
4.1 0.153 0.161
8.1 0.311 0.319
2.1 0.075 0.082
1.574
W
15.7
16.3 0.618 0.641
12/16
STD150NH02L
Buck converter - power losses estimation
Appendix A
Buck converter - power losses estimation
Figure 18. Buck converter: power losses estimation
The power losses associated with the FETs in a synchronous buck converter can be
estimated using the equations shown in the table below. The formulas give a good
approximation, for the sake of performance comparison, of how different pairs of devices
affect the converter efficiency. However a very important parameter, the working
temperature, is not considered. The real device behavior is really dependent on how the
heat generated inside the devices is removed to allow for a safer working junction
temperature.
●
●
●
●
●
●
●
●
●
The low side (SW2) device requires:
Very low R to reduce conduction losses
DS(on)
Small Qgls to reduce the gate charge losses
Small Coss to reduce losses due to output capacitance
Small Qrr to reduce losses on SW1 during its turn-on
The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source
voltage to avoid the cross conduction phenomenon;
The high side (SW1) device requires:
Small Rg and Ls to allow higher gate current peak and to limit the voltage feedback on
the gate
●
●
Small Qg to have a faster commutation and to reduce gate charge losses
Low R
to reduce the conduction losses.
DS(on)
13/16
Buck converter - power losses estimation
STD150NH02L
Table 7.
Power losses calculation
High side switching (SW1)
Low side switch (SW2)
Pconduction
RDS(on)SW2 *I2L *(1−δ )
RDS(on)SW1 *I2L *δ
IL
Ig
Pswitching
Zero Voltage Switching
V *(Qgsth(SW1) + Qgd(SW1) )*f *
in
Recovery
Not applicable
Not applicable
(1)
V *Qrr(SW2) *f
in
Pdiode
Conductio
n
Vf(SW2) *IL *tdeadtime *f
Pgate(QG)
Qg(SW1) *Vgg *f
Qgls(SW2) *Vgg *f
V *Qoss(SW1) *f
V *Qoss(SW2) *f
PQoss
in
in
2
2
1. Dissipated by SW1 during turn-on
Table 8.
Paramiters meaning
Parameter
Meaning
d
Duty-cycle
Qgsth
Qgls
Post threshold gate charge
Third quadrant gate charge
On state losses
Pconduction
Pswitching
Pdiode
On-off transition losses
Conduction and reverse recovery diode losses
Gate drive losses
Pgate
PQoss
Output capacitance losses
14/16
STD150NH02L
Revision history
6
Revision history
Table 9.
Date
Revision history
Revision
Changes
09-Sep-2004
21-Jun-2005
28-Jul-2006
20-Dec-2006
6
7
8
9
Preliminary data
Complete version with curves
The document has been reformatted
Typo mistake on Table 3.
15/16
STD150NH02L
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