STD90N03L [STMICROELECTRONICS]
N-channel 30V - 0.005ヘ - 80A - DPAK/IPAK STripFET⑩ III Power MOSFET; N沟道30V - 0.005ヘ - 80A - DPAK / IPAK STripFET⑩ III功率MOSFET
| 型号： | STD90N03L |
| 厂家： | 
ST |
| 描述： | N-channel 30V - 0.005ヘ - 80A - DPAK/IPAK STripFET⑩ III Power MOSFET |
| 文件： | 总16页 (文件大小：314K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STD90N03L
STD90N03L-1
N-channel 30V - 0.005Ω - 80A - DPAK/IPAK
STripFET™ III Power MOSFET
General features
Type
VDSS
RDS(on)
ID
STD90N03L
30V
30V
0.0057Ω
0.0057Ω
80A (1)
80A (1)
STD90N03L-1
3
3
2
1
1. Pulse width limited by safe operating area
■ R
1
*Q industry’s benchmark
DS(on)
g
■ Conduction losses reduced
■ Switching losses reduced
■ Low threshold device
IPAK
DPAK
Description
This device utilizes the latest advanced design
rules of ST’s proprietary STripFET™ technology.
This is suitable for the most demanding DC-DC
converter application where high efficiency is to
be achieved.
Internal schematic diagram
Applications
■ Switching applications
Order codes
Part number
Marking
Package
Packaging
STD90N03L
D90N03L
DPAK
IPAK
Tape & reel
Tube
STD90N03L-1
D90N03L-1
October 2006
Rev1
1/16
www.st.com
16
Content
STD90N03L - STD90N03L-1
Content
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
5
6
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16
STD90N03L - STD90N03L-1
Electrical ratings
1
Electrical ratings
Table 1.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VDS
VGS
Drain-source voltage (VGS = 0)
Gate-source voltage
30
±20
80
V
V
(1)
ID
Drain current (continuous) at TC = 25°C
Drain current (continuous) at TC=100°C
Drain current (pulsed)
A
ID
64
A
(2)
IDM
320
95
A
PTOT
Total dissipation at TC = 25°C
Derating factor
W
0.63
350
W/°C
mJ
(3)
EAS
Single pulse avalanche energy
TJ
Operating junction temperature
Storage temperature
-55 to 175
°C
Tstg
1. Value limited by wire bonding
2. Pulse width limited by safe operating area
3. Starting Tj = 25°C, ID =40A, VDD =15V
Table 2.
Symbol
Thermal data
Parameter
Value
Unit
Rthj-case
Rthj-amb
Thermal resistance junction-case max
Thermal resistance junction-ambient max
1.58
100
°C/W
°C/W
Maximum lead temperature for soldering
purpose
Tj
275
°C
3/16
Electrical characteristics
STD90N03L - STD90N03L-1
2
Electrical characteristics
(T
=25°C unless otherwise specified)
CASE
Table 3.
Symbol
On/off states
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Drain-source breakdown
voltage
V(BR)DSS
ID = 250µA, VGS= 0
30
V
V
DS = 30V
1
µA
µA
Zero gate voltage drain
current (VGS = 0)
IDSS
VDS = 30V, Tc=125°C
10
Gate body leakage current
(VDS = 0)
IGSS
VGS = ±20V
±100
nA
V
VGS(th)
RDS(on)
VDS= VGS, ID = 250µA
Gate threshold voltage
1
VGS= 10V, ID= 40A
VGS= 5V, ID= 40A
0.005 0.0057
0.007 0.0011
Ω
Ω
Static drain-source on
resistance
Table 4.
Symbol
Dynamic
Parameter
Test conditions
Min.
Typ. Max.
Unit
Input capacitance
Ciss
Coss
Crss
2805
549
76
pF
pF
pF
VDS =25V, f=1MHz,
Output capacitance
VGS=0
Reverse transfer
capacitance
Qg
Qgs
Qgd
VDD=15V, ID = 80A
VGS =5V
Total gate charge
Gate-source charge
Gate-drain charge
22
10
7
32
nC
nC
nC
(see Figure 13)
f=1MHz Gate Bias
Bias=0 Test Signal
Level=20mV
RG
Gate input resistance
1.2
Ω
open drain
Table 5.
Symbol
Switching times
Parameter
Test conditions
Min. Typ. Max. Unit
V
DD=15V, ID=40A,
td(on)
tr
Turn-on delay time
Rise time
19
ns
ns
RG=4.7Ω, VGS=5V
135
(see Figure 12)
VDD=15V, ID=40A,
RG=4.7Ω, VGS=5V
(see Figure 12)
td(off)
tf
Turn-off delay time
Fall time
24
33
ns
ns
4/16
STD90N03L - STD90N03L-1
Electrical characteristics
Min. Typ. Max. Unit
Table 6.
Symbol
Source drain diode
Parameter
Test conditions
Source-drain current
ISD
80
A
A
Source-drain current
(pulsed)
(1)
320
ISDM
(2)
ISD=40A, VGS=0
Forward on voltage
1.3
V
VSD
trr
ISD=80A, di/dt = 100A/µs,
VDD=19 V, Tj= 150°C
Reverse recovery time
Reverse recovery charge
Reverse recovery current
36
32
ns
µC
A
Qrr
1.8
(see Figure 15)
IRRM
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
5/16
Electrical characteristics
STD90N03L - STD90N03L-1
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
Figure 2. Thermal impedance
Figure 3. Output characteristics
Figure 5. Static drain-source on resistance
6/16
Figure 4. Transfer characteristics
Figure 6. Normalized B
vs temperature
VDSS
STD90N03L - STD90N03L-1
Electrical characteristics
Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage Figure 10. Normlaized on resistance vs
vs temperature
temperature
Figure 11. Source-drain diode forward
characteristics
7/16
Test circuit
STD90N03L - STD90N03L-1
3
Test circuit
Figure 12. Switching times test circuit for
resistive load
Figure 13. Gate charge test circuit
Figure 14. Test circuit for inductive load
switching and diode recovery times
Figure 15. Unclamped Inductive load test
circuit
8/16
STD90N03L - STD90N03L-1
Appendix A
Figure 16. Buck Converter: Power Losses Estimation
The power losses associated with the FETs in a Synchronous Buck converter can be
estimated using the equations shown in the table below. The formulas give a good
approximation, for the sake of performance comparison, of how different pairs of devices
affect the converter efficiency. However a very important parameter, the working
temperature, is not considered. The real device behavior is really dependent on how the
heat generated inside the devices is removed to allow for a safer working junction
temperature.
The low side (SW2) device requires:
■ Very low R
to reduce conduction losses
DS(on)
■ Small Qgls to reduce the gate charge losses
■ Small Coss to reduce losses due to output capacitance
■ Small Qrr to reduce losses on SW1 during its turn-on
■ The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source
■ voltage to avoid the cross conduction phenomenon;
The high side (SW1) device requires:
■ Small Rg and Ls to allow higher gate current peak and to limit the voltage feedback on the
gate
■ Small Qg to have a faster commutation and to reduce gate charge losses
■ Low R
to reduce the conduction losses.
DS(on)
9/16
STD90N03L - STD90N03L-1
Table 7.
Power losses calculation
High Side Switching (SW1)
Low Side Switch (SW2)
Pconduction
RDS(on)SW2 *I2L *(1−δ )
RDS(on)SW1 *I2L *δ
IL
Ig
Pswitching
Zero voltage switching
V *(Qgsth(SW1) + Qgd(SW1) )*f *
in
Recovery
Not applicable
Not applicable
(1)
V *Qrr(SW2) *f
in
Pdiode
Conduction
Vf(SW2) *IL *tdeadtime *f
Pgate(QG)
Qg(SW1) *Vgg *f
Qgls(SW2) *Vgg *f
V *Qoss(SW1) *f
V *Qoss(SW2) *f
PQoss
in
in
2
2
1. Dissipated by SW1 during turn-on
Table 8.
Paramiters meaning
Parameter
Meaning
d
Duty-cycle
Qgsth
Qgls
Post threshold gate charge
Third quadrant gate charge
On state losses
Pconduction
Pswitching
Pdiode
On-off transition losses
Conduction and reverse recovery diode losses
Gate drive losses
Pgate
PQoss
Output capacitance losses
10/16
STD90N03L - STD90N03L-1
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/16
Package mechanical data
STD90N03L - STD90N03L-1
TO-251 (IPAK) MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
2.2
TYP.
MAX.
2.4
MIN.
0.086
0.035
0.027
0.025
0.204
MAX.
0.094
0.043
0.051
0.031
0.212
0.033
A
A1
A3
B
0.9
1.1
0.7
1.3
0.64
5.2
0.9
B2
B3
B5
B6
C
5.4
0.85
0.3
0.012
0.95
0.6
0.6
6.2
6.6
4.6
16.3
9.4
1.2
1
0.037
0.023
0.023
0.244
0.260
0.181
0.641
0.370
0.047
0.039
0.45
0.48
6
0.017
0.019
0.236
0.252
0.173
0.626
0.354
0.031
C2
D
E
6.4
4.4
15.9
9
G
H
L
L1
L2
0.8
0.8
0.031
H
L
D
L2
L1
0068771-E
12/16
STD90N03L - STD90N03L-1
Package mechanical data
DPAK MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
A1
A2
B
2.2
0.9
2.4
1.1
0.23
0.9
5.4
0.6
0.6
6.2
0.086
0.035
0.001
0.025
0.204
0.017
0.019
0.236
0.094
0.043
0.009
0.035
0.212
0.023
0.023
0.244
0.03
0.64
5.2
b4
C
0.45
0.48
6
C2
D
D1
E
5.1
0.200
6.4
6.6
0.252
0.260
E1
e
4.7
0.185
0.090
2.28
e1
H
4.4
9.35
1
4.6
0.173
0.368
0.039
0.181
0.397
10.1
L
(L1)
L2
L4
R
2.8
0.8
0.110
0.031
0.6
0°
1
0.023
0°
0.039
8°
0.2
0.008
V2
8°
0068772-F
13/16
Packaging mechanical data
STD90N03L - STD90N03L-1
5
Packaging mechanical data
DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
mm
MIN. MAX. MIN. MAX.
330 12.992
inch
DIM.
A
B
C
D
G
N
T
1.5
12.8
20.2
16.4
50
0.059
13.2 0.504 0.520
0.795
18.4 0.645 0.724
1.968
22.4
0.881
BASE QTY
BULK QTY
2500
TAPE MECHANICAL DATA
2500
mm
MIN. MAX. MIN. MAX.
6.8 0.267 0.275
10.4 10.6 0.409 0.417
12.1 0.476
inch
DIM.
A0
B0
B1
D
7
1.5
1.5
1.6 0.059 0.063
0.059
D1
E
1.65 1.85 0.065 0.073
7.4 7.6 0.291 0.299
2.55 2.75 0.100 0.108
F
K0
P0
P1
P2
R
3.9
7.9
1.9
40
4.1 0.153 0.161
8.1 0.311 0.319
2.1 0.075 0.082
1.574
W
15.7
16.3 0.618 0.641
14/16
STD90N03L - STD90N03L-1
Revision history
6
Revision history
Table 9.
Date
20-Oct-2006
Revision history
Revision
Changes
1
Initial release.
15/16
Revision history
STD90N03L - STD90N03L-1
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