STL6NK55Z [STMICROELECTRONICS]
N-CHANNEL 550V - 1.2ohm- 5.2A PowerFLAT⑩ Zener-Protected SuperMESH⑩Power MOSFET; N沟道550V - 1.2ohm- 5.2A PowerFLAT⑩齐纳保护SuperMESH⑩Power MOSFET
| 型号： | STL6NK55Z |
| 厂家： | 
ST |
| 描述： | N-CHANNEL 550V - 1.2ohm- 5.2A PowerFLAT⑩ Zener-Protected SuperMESH⑩Power MOSFET |
| 文件： | 总8页 (文件大小：218K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STL6NK55Z
N-CHANNEL 550V - 1.2Ω - 5.2A PowerFLAT™
Zener-Protected SuperMESH™Power MOSFET
TYPE
V
DSS
R
I (1)
D
Pw (1)
DS(on)
STL6NK55Z
550 V
< 1.4 Ω
5.2 A
75 W
■
■
■
■
■
■
■
TYPICAL R (on) = 1.2 Ω
DS
EXTREMELY HIGH dv/dt CAPABILITY
IMPROVED ESD CAPABILITY
100% AVALANCHE RATED
GATE CHARGE MINIMIZED
VERY LOW INTRINSIC CAPACITANCES
VERY GOOD MANUFACTURING
REPEATIBILITY
PowerFLAT™(5x5)
(Chip Scale Package)
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established strip-
based PowerMESH™ layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmesh™ products.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■
LIGHTING
■
IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
ORDERING INFORMATION
SALES TYPE
MARKING
PACKAGE
PACKAGING
STL6NK55Z
L6NK55Z
PowerFLAT™ (5x5)
TAPE & REEL
July 2002
1/8
STL6NK55Z
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
550
Unit
V
V
Drain-source Voltage (V = 0)
DS
GS
V
Drain-gate Voltage (R = 20 kΩ)
550
V
DGR
GS
V
GS
Gate- source Voltage
± 30
V
I (2)
D
Drain Current (continuous) at T = 25°C (Steady State)
A
A
0.86
0.54
C
Drain Current (continuous) at T = 100°C
C
I
P
P
(2)
Drain Current (pulsed)
3.44
2.5
A
W
DM
(2)
(1)
Total Dissipation at T = 25°C (Steady State)
TOT
TOT
C
Total Dissipation at T = 25°C (Steady State)
75
W
C
Derating Factor (2)
0.02
3000
4.5
W/°C
V/ns
V/ns
V
Gate source ESD(HBM-C=100pF, R=1.5KΩ)
Peak Diode Recovery voltage slope
Storage Temperature
ESD(G-S)
dv/dt (4)
T
stg
–55 to 150
°C
T
Max. Operating Junction Temperature
j
THERMAL DATA
Symbol
Parameter
Max.
1.67
50
Unit
°C/W
°C/W
Rthj-F
Thermal Resistance Junction-Foot (Drain)
Rthj-amb (2) Thermal Resistance Junction-ambient
Note: 1. The value is rated according to R
.
thj-F
2
2. When Mounted on FR-4 Board of 1inch , 2 oz Cu
3. Pulse width limited by safe operating area
4. I <5.7A, di/dt<300A/µs, V <V
, T <T
J JMAX
SD
DD
(BR)DSS
AVALANCHE CHARACTERISTICS
Symbol
Parameter
Max Value
Unit
I
Avalanche Current, Repetitive or Not-Repetitive
5.2
A
AR
(pulse width limited by T max)
j
E
AS
Single Pulse Avalanche Energy
160
mJ
(starting T = 25 °C, I = I , V = 50 V)
j
D
AR
DD
GATE-SOURCE ZENER DIODE
Symbol
BV
Parameter
Test Conditions
Igs=± 1mA (Open Drain)
Min.
30
Typ.
Max.
Unit
Gate-Source Breakdown
Voltage
V
GSO
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
2/8
STL6NK55Z
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
Symbol
Parameter
Drain-source
Test Conditions
Min.
Typ.
Max.
Unit
V
I
D
= 1 mA, V = 0
550
V
(BR)DSS
GS
Breakdown Voltage
I
Zero Gate Voltage
V
V
= Max Rating
= Max Rating, T = 125 °C
1
50
µA
µA
DSS
DS
Drain Current (V = 0)
GS
DS
C
I
Gate-body Leakage
V
GS
= ± 20V
±10
µA
GSS
Current (V = 0)
DS
V
V
V
= V , I = 50µA
Gate Threshold Voltage
3
3.75
1.2
4.5
1.4
V
GS(th)
DS
GS
D
R
Static Drain-source On
Resistance
= 10V, I = 2.6 A
Ω
DS(on)
GS
D
DYNAMIC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
(1)
Forward Transconductance
V
V
= 10 V I = 2.6 A
3.5
S
fs
DS
, D
C
C
C
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
= 25V, f = 1 MHz, V = 0
695
88
20
pF
pF
pF
iss
DS
GS
oss
rss
C
(3) Equivalent Output
Capacitance
= 0V, V = 0V to 440 V
48
3
pF
oss eq.
GS
DS
R
Gate Input Resistance
f=1 MHz Gate DC Bias = 0
Test Signal Level = 20mV
Open Drain
Ω
G
SWITCHING
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
Turn-on Delay Time
Rise time
Turn-off Delay Time
V
= 275 V, I = 2.6 A
14
20
31.5
ns
ns
ns
ns
d(on)
DD
D
t
r
R = 4.7Ω V = 10 V
G GS
(Resistive Load see, Figure 3)
t
d(off)
Fall Time
18
t
f
Q
V
V
= 440V, I = 5.2 A,
= 10V
35
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
25
4.5
14
nC
nC
nC
g
DD
D
Q
gs
Q
gd
GS
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
0.86
3.44
A
A
Source-drain Current
Source-drain Current (pulsed)
SD
(2)
I
SDM
V
SD
(1)
I
=5.2 A, V = 0
Forward On Voltage
1.6
V
SD
GS
t
I
= 5.2 A, di/dt = 100A/µs
=40V, T = 150°C
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
350
2.2
12.5
ns
µC
A
rr
SD
Q
rr
RRM
V
DD
j
I
(see test circuit, Figure 5)
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
V
is defined as a constant equivalent capacitance giving the same charging time as C
when V increases from 0 to 80%
oss eq.
oss
DS
.
DSS
3/8
STL6NK55Z
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/8
STL6NK55Z
Normalized Gate Thereshold Voltage vs Temp.
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
Normalized BVDSS vs Temperature
5/8
STL6NK55Z
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For
Fig. 4: Gate Charge test Circuit
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
STL6NK55Z
PowerFLAT™(5x5) MECHANICAL DATA
mm.
TYP
0.90
0.02
0.51
0.71
5.00
5.00
2.57
1.27
inch
TYP.
DIM.
MIN.
MAX.
1.00
0.05
0.58
0.79
MIN.
MAX.
0.039
0.002
0.023
0.031
A
A1
b
0.035
0.001
0.020
0.028
0.197
0.197
0.101
0.050
0.43
0.64
0.017
0.025
c
D
E
E2
e
2.49
2.64
0.098
0.104
7/8
STL6NK55Z
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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© 2002 STMicroelectronics - Printed in Italy - All Rights Reserved
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