STM706 [STMICROELECTRONICS]
5V Supervisor; 5V主管
| 型号： | STM706 |
| 厂家： | 
ST |
| 描述： | 5V Supervisor |
| 文件： | 总27页 (文件大小：533K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STM705, STM706,
STM707, STM708, STM813L
5V Supervisor
FEATURES SUMMARY
■
5V OPERATING VOLTAGE
Figure 1. Packages
■
PRECISION V MONITOR
CC
–
–
STM705/707/813L
4.50V ≤ V
≤ 4.75V
RST
STM706/708
4.25 ≤ V
8
≤ 4.50V
RST
1
■
■
■
■
■
■
■
RST AND RST OUTPUTS
200ms (TYP) t
WATCHDOG TIMER - 1.6sec (TYP)
MANUAL RESET INPUT (MR)
POWER-FAIL COMPARATOR (PFI/PFO)
LOW SUPPLY CURRENT - 40µA (TYP)
GUARANTEED RST (RST) ASSERTION
SO8 (M)
rec
TSSOP8 3x3 (DS)
DOWN TO V = 1.0V
CC
■
OPERATING TEMPERATURE:
–40°C to 85°C (Industrial Grade)
Table 1. Device Options
Active-Low
Active-High
Watchdog
Watchdog
Output
Manual
Reset Input
Power-fail
Comparator
(1)
(1)
Input
RST
RST
STM705
STM706
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
STM707
■
■
■
STM708
STM813L
■
■
Note: 1. Push-pull Output
March 2005
1/27
STM705/706/707/708/813L
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 1. Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 1. Device Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 2. Logic Diagram (STM705/706/813L). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3. Logic Diagram (STM707/708) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 4. STM705/706/813L SO8 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 5. STM705/706/813L TSSOP8 Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 6. STM707/708 SO8 Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 7. STM707/708 TSSOP8 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 8. Block Diagram (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 9. Block Diagram (STM707/708) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 10.Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Reset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Push-button Reset Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Watchdog Input (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Watchdog Output (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Power-fail Input/Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Ensuring a Valid Reset Output Down to V = 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
CC
Figure 11.Reset Output Valid to Ground Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Interfacing to Microprocessors with Bi-directional Reset Pins . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 12.Interfacing to Microprocessors with Bi-directional Reset I/O. . . . . . . . . . . . . . . . . . . . . . 10
TYPICAL OPERATING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 13.Supply Current vs. Temperature (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 14.V
Threshold vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PFI
Figure 15.Reset Comparator Propagation Delay vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 16.Power-up t vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
rec
Figure 17.Normalized Reset Threshold vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 18.Watchdog Time-out Period vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 19.PFI to PFO Propagation Delay vs. Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 20.Output Voltage vs. Load Current (V = 5V; V
= 2.8V; T = 25°C). . . . . . . . . . . . . . 14
A
CC
BAT
BAT
Figure 21.Output Voltage vs. Load Current (V = 0V; V
= 2.8V; T = 25°C). . . . . . . . . . . . . . 15
A
CC
Figure 22.RST Output Voltage vs. Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23.RST Output Voltage vs. Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 24.RST Response Time (Assertion). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 25.RST Response Time (Assertion). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/27
STM705/706/707/708/813L
Figure 26.Power-fail Comparator Response Time (Assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 27.Power-fail Comparator Response Time (De-Assertion) . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 28.Maximum Transient Duration vs. Reset Threshold Overdrive. . . . . . . . . . . . . . . . . . . . . 18
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 4. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 5. Operating and AC Measurement Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 29.AC Testing Input/Output Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 30.Power-fail Comparator Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 31.MR Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 32.Watchdog Timing (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 6. DC and AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 33.SO8 – 8-lead Plastic Small Outline, 150 mils body width, Package Mechanical. . . . . . . 23
Table 7. SO8 – 8-lead Plastic Small Outline, 150 mils body width, Package Mechanical Data . . 23
Figure 34.TSSOP8 – 8-lead, Thin Shrink Small Outline, 3x3mm body size, Outline . . . . . . . . . . . 24
Table 8. TSSOP8 – 8-lead, Thin Shrink Small Outline, 3x3mm body size, Mechanical Data . . . . 24
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 9. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 10. Marking Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 11. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3/27
STM705/706/707/708/813L
SUMMARY DESCRIPTION
The STM705/706/707/708/813L Supervisors are
self-contained devices which provide micropro-
cessor supervisory functions. A precision voltage
These devices also offer a watchdog timer (except
for STM707/708) as well as a power-fail compara-
tor to provide the system with an early warning of
impending power failure.
reference and comparator monitors the V
input
CC
for an out-of-tolerance condition. When an invalid
These devices are available in a standard 8-pin
SOIC package or a space-saving 8-pin TSSOP
package.
V
condition occurs, the reset output (RST) is
forced low (or high in the case of RST).
CC
Figure 2. Logic Diagram (STM705/706/813L)
Figure 3. Logic Diagram (STM707/708)
V
V
CC
CC
WDO
RST
WDI
(1)
RST
MR
PFI
STM705/706;
STM813L
MR
RST
PFO
STM707/708
(2)
RST
PFI
PFO
V
V
SS
SS
AI08825
AI08826
Note: 1. For STM705/706 only.
2. For STM813L only.
Table 2. Signal Names
MR
WDI
WDO
RST
Push-button Reset Input
Watchdog Input
Watchdog Output
Active-Low Reset Output
(1)
Active-High Reset Output
RST
V
Supply Voltage
Power-fail Input
Power-fail Output
Ground
CC
PFI
PFO
V
SS
NC
No Connect
Note: 1. For STM813L only.
4/27
STM705/706/707/708/813L
Figure 4. STM705/706/813L SO8 Connections
Figure 6. STM707/708 SO8 Connections
SO8
SO8
MR
1
2
3
4
8
7
6
5
WDO
MR
V
CC
RST
RST
NC
1
2
3
4
8
7
6
5
(1)
V
RST(RST)
WDI
CC
V
V
SS
SS
PFI
PFO
PFI
PFO
AI08827a
AI08828a
Note: 1. For STM813L, reset output is active-high.
Figure 5. STM705/706/813L TSSOP8
Connections
Figure 7. STM707/708 TSSOP8 Connections
TSSOP8
TSSOP8
(1)
RST
RST
MR
NC
1
2
3
4
8
7
6
5
WDI
PFO
PFI
1
2
3
4
8
7
6
5
(RST)RST
WDO
MR
PFO
PFI
V
V
V
V
SS
CC
SS
CC
AI09115
AI09114
Note: 1. For STM813L, reset output is active-high.
5/27
STM705/706/707/708/813L
Pin Descriptions
MR. A logic low on MR asserts the reset output.
Reset remains asserted as long as MR is low and
RST. Pulses low when triggered, and stays low
whenever V is below the reset threshold or
CC
for t after MR returns high. This active-low input
when MR is a logic low. It remains low for t after
rec
rec
has an internal pull-up. It can be driven from a TTL
or CMOS logic line, or shorted to ground with a
switch. Leave open if unused.
either V rises above the reset threshold, or MR
CC
goes from low to high.
RST. Goes high with triggered, and stays high
WDI. If WDI remains high or low for 1.6sec, the in-
ternal watchdog timer runs out and reset (or WDO)
is triggered. The internal watchdog timer clears
while reset is asserted or when WDI sees a rising
or falling edge.
whenever V
when MR is a logic high. It stays high for t after
is above the reset threshold or
CC
rec
either V
falls below the reset threshold, or MR
CC
goes from high to low.
PFI. When PFI is less than V , PFO goes low;
PFI
The watchdog function can be disabled by allow-
ing the WDI pin to float.
otherwise, PFO remains high. Connect to ground
if unused.
WDO. It goes low when a transition does not oc-
cur on WDI within 1.6sec, and remains low until a
transition occurs on WDI (indicating the watchdog
interrupt has been serviced). WDO also goes low
PFO. When PFI is less than V , PFO goes low;
otherwise, PFO remains high. Leave open if un-
used.
PFI
when V
falls below the reset threshold; howev-
CC
er, unlike the reset output, WDO goes high as
soon as V exceeds the reset threshold.
CC
Note: For those devices with a WDO output, a
watchdog timeout will not trigger reset unless
WDO is connected to MR.
Table 3. Pin Description
Pin
Name
Function
STM707
STM708
STM705
STM706
STM813L
1
6
8
–
7
2
4
5
3
–
1
–
–
7
8
2
4
5
3
6
1
6
8
7
–
2
4
5
3
–
MR
Push-button Reset Input
WDI Watchdog Input
WDO Watchdog Output
RST Active-Low Reset Output
RST Active-High Reset Output
V
CC
Supply Voltage
PFI
PFI Power-fail Input
PFO PFO Power-fail Output
V
SS
Ground
NC
No Connect
6/27
STM705/706/707/708/813L
Figure 8. Block Diagram (STM705/706/813L)
WDI
Transitional
Detector
WATCHDOG
TIMER
WDI
VCC
WDO
VRST
COMPARE
VCC
trec
Generator
RST(RST)(1)
MR
PFI
VPFI
COMPARE
PFO
AI08829
Note: 1. For STM813L only.
Figure 9. Block Diagram (STM707/708)
VCC
COMPARE
VRST
RST
VCC
trec
Generator
RST
MR
PFI
VPFI
COMPARE
PFO
AI08830
7/27
STM705/706/707/708/813L
Figure 10. Hardware Hookup
Regulator
VIN VCC
Unregulated
Voltage
VCC
STM705/706/
707/708;
0.1µF
STM813L
WDI(1)
To Microprocessor IRQ
WDO(1)
PFO
R1
R2
From Microprocessor
PFI
MR
To Microprocessor NMI
To Microprocessor Reset
RST
Push-button
AI08831
Note: 1. For STM705/706/813L.
8/27
STM705/706/707/708/813L
OPERATION
Reset Output
Watchdog Input (STM705/706/813L)
The STM705/706/707/708/813L Supervisor as-
The watchdog timer can be used to detect an out-
of-control MCU. If the MCU does not toggle the
serts a reset signal to the MCU whenever V
CC
goes below the reset threshold (V
), a watch-
Watchdog Input (WDI) within t
set is asserted. The internal 1.6sec timer is
cleared by either:
(1.6sec), the re-
RST
WD
dog time-out occurs (if WDO is tied to MR), or
when the Push-button Reset Input (MR) is taken
low. RST is guaranteed to be a logic low (logic
1. a reset pulse, or
high for STM707/708/813L) for V < V
down
CC
RST
2. by toggling WDI (high-to-low or low-to-high),
which can detect pulses as short as 50ns. If
WDI is tied high or low, a reset pulse is
to V =1V for T = 0°C to 85°C.
CC
A
During power-up, once V
exceeds the reset
CC
threshold an internal timer keeps RST low for the
triggered every 1.8sec (t
connected to MR.
+ t ), if WDO is
WD
rec
reset time-out period, t . After this interval RST
rec
returns high.
See Figure 32., page 21 for STM705/706/813L.
If V drops below the reset threshold, RST goes
CC
The timer remains cleared and does not count for
as long as reset is asserted. As soon as reset is re-
leased, the timer starts counting.
low. Each time RST is asserted, it stays low for at
least the reset time-out period (t ). Any time V
rec
CC
goes below the reset threshold the internal timer
Note: The watchdog function may be disabled by
floating WDI or tri-stating the driver connected to
WDI. When tri-stated or disconnected, the maxi-
mum allowable leakage current is 10uA and the
maximum allowable load capacitance is 200pF.
clears. The reset timer starts when V
above the reset threshold.
returns
CC
Push-button Reset Input
A logic low on MR asserts reset. Reset remains
asserted while MR is low, and for t (see Figure
rec
Watchdog Output (STM705/706/813L)
31., page 21) after it returns high. The MR input
has an internal 40kΩ pull-up resistor, allowing it to
be left open if not used. This input can be driven
with TTL/CMOS-logic levels or with open-drain/
collector outputs. Connect a normally open mo-
mentary switch from MR to GND to create a man-
ual reset function; external debounce circuitry is
not required. If MR is driven from long cables or
the device is used in a noisy environment, connect
a 0.1µF capacitor from MR to GND to provide ad-
ditional noise immunity. MR may float, or be tied to
When V drops below the reset threshold, WDO
CC
will go low even if the watchdog timer has not yet
timed out. However, unlike the reset output, WDO
goes high as soon as V
exceeds the reset
CC
threshold. WDO may be used to generate a reset
pulse by connecting it to the MR input.
Power-fail Input/Output
The Power-fail Input (PFI) is compared to an inter-
nal reference voltage (independent from the V
RST
comparator). If PFI is less than the power-fail
V
when not used.
CC
threshold (V ), the Power-Fail Output (PFO) will
PFI
go low. This function is intended for use as an un-
dervoltage detector to signal a failing power sup-
ply. Typically PFI is connected through an external
voltage divider (see Figure 10., page 8) to either
the unregulated DC input (if it is available) or the
regulated output of the V regulator. The voltage
CC
divider can be set up such that the voltage at PFI
falls below V
several milliseconds before the
input to the STM705/706/707/708/
PFI
regulated V
CC
813L or the microprocessor drops below the mini-
mum operating voltage.
If the comparator is unused, PFI should be con-
nected to V
and PFO left unconnected. PFO
SS
may be connected to MR on the STM703/704/818
so that a low voltage on PFI will generate a reset
output.
9/27
STM705/706/707/708/813L
Ensuring a Valid Reset Output Down to
Interfacing to Microprocessors with Bi-
directional Reset Pins
V
= 0V
CC
When V falls below 1V, the state of the RST out-
Microprocessors with bi-directional reset pins can
contend with the STM705-708 reset output. For
example, if the reset output is driven high and the
micro wants to pull it low, signal contention will re-
sult. To prevent this from occurring, connect a
4.7kΩ resistor between the reset output and the
micro’s reset I/O as in Figure 12.
CC
put can no longer be guaranteed, and becomes
essentially an open circuit. If a high value pull-
down resistor is added to the RST pin, the output
will be held low during this condition. A resistor val-
ue of approximately 100kΩ will be large enough to
not load the output under operating conditions, but
still sufficient to pull RST to ground during this low
voltage condition (see Figure 11).
Figure 12. Interfacing to Microprocessors with
Bi-directional Reset I/O
Figure 11. Reset Output Valid to Ground
Circuit
Buffered Reset to other
System Components
STMXXX
RST
VCC
VCC
R1
STMXXX
Microprocessor
4.7k
RST
RST
AI08835
GND
GND
AI08836
10/27
STM705/706/707/708/813L
TYPICAL OPERATING CHARACTERISTICS
Note: Typical values are at T = 25°C.
A
Figure 13. Supply Current vs. Temperature (no load)
30
25
20
15
10
5
V
V
V
V
V
= 2.7V
= 3.0V
= 3.6V
= 4.5V
= 5.5V
CC
CC
CC
CC
CC
0
–40
–20
0
20
40
60
80
100
120
Temperature (°C)
AI09141b
Figure 14. V
Threshold vs. Temperature
PFI
1.270
1.265
1.260
1.255
1.250
1.245
1.240
1.235
1.230
1.225
V
V
V
V
= 3.0V
= 4.5V
= 4.75V
= 5.5V
CC
CC
CC
CC
–40
–20
0
20
40
60
80
100
120
Temperature (°C)
AI09142b
11/27
STM705/706/707/708/813L
Figure 15. Reset Comparator Propagation Delay vs. Temperature
30
28
26
24
22
20
18
16
14
12
10
–40
–20
0
20
40
60
80
100
120
Temperature (°C)
AI09143b
Figure 16. Power-up t
vs. Temperature
rec
240
235
230
225
220
215
210
V
= 3.0V
= 4.5V
= 5.5V
CC
V
CC
V
CC
–40
–20
0
20
40
60
80
100
120
Temperature (°C)
AI09144b
12/27
STM705/706/707/708/813L
Figure 17. Normalized Reset Threshold vs. Temperature
1.004
1.002
1.000
0.998
0.996
–40
–20
0
20
40
60
80
100
120
Temperature (°C)
AI09145b
Figure 18. Watchdog Time-out Period vs. Temperature
1.90
1.85
1.80
1.75
1.70
1.65
1.60
V
V
V
= 3.0V
CC
= 4.5V
= 5.5V
CC
CC
–40
–20
0
20
40
60
80
100
120
Temperature (°C)
AI09146b
13/27
STM705/706/707/708/813L
Figure 19. PFI to PFO Propagation Delay vs. Temperature
4.0
V
V
V
V
= 3.0V
= 3.6V
= 4.5V
= 5.5V
CC
CC
CC
CC
3.0
2.0
1.0
0.0
–40
–20
0
20
40
60
80
100
120
Temperature (°C)
AI09148b
Figure 20. Output Voltage vs. Load Current (V = 5V; V
= 2.8V; T = 25°C)
A
CC
BAT
5.00
4.98
4.96
4.94
0
10
20
30
40
50
I
(mA)
OUT
AI10496
14/27
STM705/706/707/708/813L
Figure 21. Output Voltage vs. Load Current (V = 0V; V
= 2.8V; T = 25°C)
A
CC
BAT
2.80
2.78
2.76
2.74
2.72
2.70
2.68
2.66
0.0
0.2
0.4
0.6
0.8
1.0
I
(mA)
OUT
AI10497
Figure 22. RST Output Voltage vs. Supply Voltage
5
5
4
3
2
1
0
V
V
RST
CC
4
3
2
1
0
500ms/div
AI09149b
15/27
STM705/706/707/708/813L
Figure 23. RST Output Voltage vs. Supply Voltage
5
4
3
2
1
5
V
V
RST
CC
4
3
2
1
0
0
500ms/div
AI09150b
Figure 24. RST Response Time (Assertion)
5V
1V/div
V
CC
5V
4V
4V
RST
1V/div
0V
5µs/div
AI09151b
Note: V
= 4.603V at 25°C.
RST
16/27
STM705/706/707/708/813L
Figure 25. RST Response Time (Assertion)
5V
4V
V
CC
1V/div
4V
RST
1V/div
0V
5µs/div
AI09152b
Note: V
= 4.603V at 25°C.
RST
Figure 26. Power-fail Comparator Response Time (Assertion)
5V
1V/div
PFO
0V
1.3V
PFI
500mV/div
0V
500ns/div
AI09153b
17/27
STM705/706/707/708/813L
Figure 27. Power-fail Comparator Response Time (De-Assertion)
5V
1V/div
PFO
0V
1.3V
PFI
500mV/div
0V
500ns/div
AI09154b
Figure 28. Maximum Transient Duration vs. Reset Threshold Overdrive
6000
5000
4000
Reset occurs
above the curve.
3000
2000
1000
0
0.001
0.01
0.1
1
10
Reset Comparator Overdrive, V
– V (V)
CC
RST
AI09156b
18/27
STM705/706/707/708/813L
MAXIMUM RATING
Stressing the device above the rating listed in the
Absolute Maximum Ratings” table may cause per-
manent damage to the device. These are stress
ratings only and operation of the device at these or
any other conditions above those indicated in the
Operating sections of this specification is not im-
plied. Exposure to Absolute Maximum Rating con-
ditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics
SURE Program and other relevant quality docu-
ments.
Table 4. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
T
Storage Temperature (V Off)
–55 to 150
°C
STG
CC
Lead Solder Temperature for 10 seconds
Input or Output Voltage
Supply Voltage
(1)
260
°C
V
T
SLD
V
–0.3 to V +0.3
IO
CC
V
–0.3 to 7.0
20
V
CC
I
O
Output Current
mA
mW
P
Power Dissipation
320
D
Note: 1. Reflow at peak temperature of 255°C to 260°C for < 30 seconds (total thermal budget not to exceed 180°C for between 90 to 150
seconds).
19/27
STM705/706/707/708/813L
DC AND AC PARAMETERS
This section summarizes the operating measure-
ment conditions, and the DC and AC characteris-
tics of the device. The parameters in the DC and
AC characteristics Tables that follow, are derived
from tests performed under the Measurement
Conditions summarized in Table 5, Operating and
AC Measurement Conditions. Designers should
check that the operating conditions in their circuit
match the operating conditions when relying on
the quoted parameters.
Table 5. Operating and AC Measurement Conditions
Parameter
STM705/706/707/708;
Unit
STM813L
V
Supply Voltage
1.0 to 5.5
–40 to 85
≤ 5
V
°C
ns
V
CC
Ambient Operating Temperature (T )
A
Input Rise and Fall Times
0.2 to 0.8V
Input Pulse Voltages
CC
0.3 to 0.7V
Input and Output Timing Ref. Voltages
V
CC
Figure 29. AC Testing Input/Output Waveforms
0.8V
CC
0.7V
CC
0.3V
CC
0.2V
CC
AI02568
Figure 30. Power-fail Comparator Waveform
VCC
VRST
trec
PFO
RST
AI08834b
20/27
STM705/706/707/708/813L
Figure 31. MR Timing Waveform
MR
tMLRL
RST (1)
trec
tMLMH
AI07837a
Note: 1. RST for STM805.
Figure 32. Watchdog Timing (STM705/706/813L)
VCC
trec
RST
tWD
WDI
WDO
AI08833
Table 6. DC and AC Characteristics
Alter-
(1)
Sym
Description
Min
Typ
Max
Unit
Test Condition
native
(2)
V
Operating Voltage
V Supply Current
CC
5.5
60
V
CC
1.2
I
25
125
2
µA
µA
nA
µA
µA
V
CC
4.5V < V < 5.5V
Input Leakage Current (MR)
Input Leakage Current (PFI)
75
300
+25
160
CC
0V = V = V
–25
IN
CC
I
LI
WDI = V , time average
120
–15
CC
Input Leakage Current (WDI)
WDI = GND, time average
–20
2.0
V
V
4.5V < V < 5.5V
Input High Voltage (MR)
Input High Voltage (WDI)
Input Low Voltage (MR)
Input Low Voltage (WDI)
IH
IH
CC
V
(max) < V < 5.5V 0.7V
CC CC
V
RST
V
V
4.5V < V < 5.5V
0.8
V
IL
IL
CC
V
(max) < V < 5.5V
0.3V
CC
V
RST
CC
21/27
STM705/706/707/708/813L
Alter-
native
(1)
Sym
Description
Min
Typ
Max
Unit
Test Condition
V
= V
(max),
Output Low Voltage (PFO, RST,
RST, WDO)
CC
I
RST
V
OL
0.3
V
= 3.2mA
SINK
I
= 50µA, V = 1.0V,
CC
T = 0°C to 85°C
A
SINK
0.3
0.3
V
V
V
V
OL
Output Low Voltage (RST)
I
= 100µA, V = 1.2V
SINK
CC
I
V
= 1mA,
Output High Voltage (RST, RST,
WDO)
SOURCE
2.4
= V
(max)
CC
RST
V
OH
V
OH
I
V
= 75µA,
SOURCE
0.8V
Output High Voltage (PFO)
V
V
V
CC
= V
(max)
CC
RST
I
= 4µA,
= 1.1V,
SOURCE
V
CC
0.8
0.9
T = 0°C to 85°C
A
Output High Voltage (RST)
I
= 4µA,
= 1.2V
SOURCE
V
CC
Power-fail Comparator
V
PFI Falling (V = 5V)
PFI Input Threshold
1.20
1.25
2
1.30
V
PFI
CC
t
PFI to PFO Propagation Delay
µs
PFD
Reset Thresholds
STM705/707/813L
STM706/708
4.50
4.25
4.65
4.40
25
4.75
4.50
V
V
(3)
V
RST
Reset Threshold
Reset Threshold Hysteresis
RST Pulse Width
mV
ms
t
140
150
200
280
rec
Push-button Reset Input
t
t
MR
MR Pulse Width
ns
ns
MLMH
t
t
MRD
MR to RST Output Delay
250
MLRL
Watchdog Timer (STM705/706/813L)
t
4.5V < V < 5.5V
Watchdog Timeout Period
WDI Pulse Width
1.12
50
1.60
2.24
s
WD
CC
4.5V < V < 5.5V
ns
CC
Note: 1. Valid for Ambient Operating Temperature: T = –40 to 85°C; V = 4.75V to 5.5V for STM705/707/813L; V = 4.5V to 5.5V for
A
CC
CC
STM706/708 (except where noted).
2. V (min) = 1.0V for T = 0°C to +85°C.
CC
A
3. For V falling.
CC
22/27
STM705/706/707/708/813L
PACKAGE MECHANICAL
Figure 33. SO8 – 8-lead Plastic Small Outline, 150 mils body width, Package Mechanical
h x 45˚
A2
A
C
B
ddd
e
D
8
1
E
H
A1
α
L
SO-A
Note: Drawing is not to scale.
Table 7. SO8 – 8-lead Plastic Small Outline, 150 mils body width, Package Mechanical Data
mm
Min
1.35
0.10
0.33
0.19
4.80
–
inches
Min
Symb
Typ
–
Max
1.75
0.25
0.51
0.25
5.00
0.10
4.00
–
Typ
Max
0.069
0.010
0.020
0.010
0.197
0.004
0.157
–
A
A1
B
–
0.053
0.004
0.013
0.007
0.189
–
–
–
–
–
C
–
–
D
–
–
ddd
E
–
–
–
3.80
–
–
0.150
–
e
1.27
–
0.050
H
5.80
0.25
0.40
0°
6.20
0.50
0.90
8°
–
–
–
–
0.228
0.010
0.016
0°
0.244
0.020
0.035
8°
h
–
L
–
α
–
N
8
8
23/27
STM705/706/707/708/813L
Figure 34. TSSOP8 – 8-lead, Thin Shrink Small Outline, 3x3mm body size, Outline
D
8
1
5
4
c
E1
E
α
A1
L
A
A2
L1
CP
b
e
TSSOP8BM
Note: Drawing is not to scale.
Table 8. TSSOP8 – 8-lead, Thin Shrink Small Outline, 3x3mm body size, Mechanical Data
mm
Min
–
inches
Min
–
Symb
Typ
–
Max
1.10
0.15
0.95
0.40
0.23
0.10
3.10
–
Typ
–
Max
0.043
0.006
0.037
0.016
0.009
0.004
0.122
–
A
A1
A2
b
–
0.05
0.75
0.25
0.13
–
–
0.002
0.030
0.010
0.005
–
0.85
–
0.034
–
c
–
–
CP
D
–
–
3.00
0.65
4.90
3.00
0.55
0.95
–
2.90
–
0.118
0.026
0.193
0.118
0.022
0.037
–
0.114
–
e
E
4.65
2.90
0.40
–
5.15
3.10
0.70
–
0.183
0.114
0.016
–
0.203
0.122
0.030
–
E1
L
L1
α
0°
6°
0°
6°
N
8
8
24/27
STM705/706/707/708/813L
PART NUMBERING
Table 9. Ordering Information Scheme
Example:
STM705
M
6
E
Device Type and Reset Threshold Voltage
STM705/707/813L = V
= 4.50V to 4.75V
RST
STM706/708 = V
= 4.25V to 4.50V
RST
Package
M = SO8
DS = TSSOP8
Temperature Range
6 = –40 to 85°C
Shipping Method
E = Tubes
F = Tape & Reel
For other options, or for more information on any aspect of this device, please contact the ST Sales Office
nearest you.
Table 10. Marking Description
Part Number
Reset Threshold
Package
SO8
Topside Marking
STM705
4.63V
705
TSSOP8
SO8
STM706
STM707
STM708
STM813L
4.38V
4.63V
4.38V
4.63V
706
707
TSSOP8
SO8
TSSOP8
SO8
708
TSSOP8
SO8
813L
TSSOP8
25/27
STM705/706/707/708/813L
REVISION HISTORY
Table 11. Document Revision History
Date
Version
1.0
Revision Details
September 2003
31-Oct-03
First Issue
1.1
Update DC Characteristics (Table 6)
Reformatted; update characteristics (Figure 1, 2, 3, 4, 6, 8, 9, 10, 31, 32, 30; Table
6, 8, 10)
12-Dec-03
16-Jan-04
2.0
2.1
Add Typical Characteristics (Figure 13, 14, 15, 16, 17, 18, 19, 22, 23, 24, 25, 26,
27, 28)
09-Apr-04
25-May-04
02-Jul-04
21-Sep-04
3.0
4.0
5.0
6.0
Reformatted; update characteristics (Figure 15, 19, 22, 23, 24, 25, 28; Table 6)
Update characteristics (Table 3, 6)
Document promoted; corrected waveform (Figure 30)
Clarify root part numbers, pin descriptions (Figure 2, 3, 10; Table 5, 6, 9)
Update Typical Characteristics (Figure 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
24, 25, 26, 27, 28)
08-Mar-05
7.0
26/27
STM705/706/707/708/813L
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2005 STMicroelectronics - All rights reserved
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27/27
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