STOD03B [STMICROELECTRONICS]
Step-up with LDO and inverter converters;
| 型号： | STOD03B |
| 厂家： | 
ST |
| 描述： | Step-up with LDO and inverter converters |
| 文件： | 总22页 (文件大小：934K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STOD03B
150 mA dual DC-DC converter with LDO
for powering AMOLED displays
Features
■ Step-up with LDO and inverter converters
■ Operating input voltage range from 2.3 V to
4.8 V
■ Synchronous rectification for both DC-DC
converters
■ Minimum 150 mA output current
■ LDO post regulator for 4.6 V fixed positive
output to provide line and load transient
response with minimum output voltage ripple
DFN12L (3 x 3 mm)
■ Programmable negative voltage by S
from
WIRE
- 2.4 V to -5.4 V at 100 mV steps
Description
■ Typical efficiency: 82%
The STOD03B is a dual DC-DC converter for
AMOLED display panels. It integrates a step-up
and an inverting DC-DC converter making it
particularly suitable for battery operated products,
in which the major concern is the overall system
efficiency. It works in pulse skipping mode during
low load conditions and PWM-MODE at 1.5 MHz
frequency for medium/high load conditions. The
high frequency allows the value and size of
external components to be reduced. The 4.6 V
output is provided by an LDO in cascade with the
step-up converter. This allows a noise and ripple
free positive output for the AMOLED panel to
provide stable picture quality. The Enable pin
allows the device to be turned off, therefore
reducing the current consumption to less than
1 µA. The negative output voltage can be
■ Pulse skipping mode in light load condition
■ 1.5 MHz PWM mode control switching
frequency
■ Enable pin for shutdown mode
■ Low quiescent current in shutdown mode
■ Soft-start with inrush current protection
■ Overtemperature protection
■ Temperature range: -40 °C to 85 °C
■ True-shutdown mode
■ Package DFN (3 x 3) 12 leads 0.6 mm height
Applications
■ Active matrix AMOLED power supply in
portable devices
programmed by an MCU through a dedicated pin
which implements single-wire protocol. Soft-start
with controlled inrush current limit and thermal
shutdown are integrated functions of the device.
■ Cellular phones
■ Camcorders and digital still cameras
■ Multimedia players
Table 1.
Device summary
Order code
Positive voltage
Negative voltage
Package
Packaging
STOD03BTPUR
December 2011
4.6V
- 2.4V to - 5.4V
DFN12L (3 x 3mm)
3000 parts per reel
Doc ID 022613 Rev 1
1/22
www.st.com
22
Contents
STOD03B
Contents
1
2
3
4
5
6
Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Detailed description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6.1
SWIRE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6.1.1
6.1.2
6.1.3
S
S
S
features and benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
basic operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
WIRE
WIRE
WIRE
6.2
6.3
Negative output voltage levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Enable and S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
WIRE
7
8
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.1
7.2
External passive components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.1.1
7.1.2
Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Input and output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Recommended PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Detailed description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8.1
General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
Multiple operation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Enable pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Soft-start and inrush current limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Undervoltage lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
10
2/22
Doc ID 022613 Rev 1
STOD03B
Schematic
1
Schematic
Figure 1.
Application schematic
L1
VBAT
CIN
VO1
VO2
CMID
CO1
S-Wire
STOD03B
EN
CO2
CREF
L2
AM10428v1
Table 2.
Typical external components
Comp. Manufacturer
Part number
Value
Size
Ratings
COILCRAFT
LPS4012-472ML
LQH3NPN4R7MJ0
CIG22B4R7MNE
LPF2810T-4R7M
LPF2807T-4R7M
4.0 x 4.0 x 1.2
3.0 x 3.0 x 1.1
20%, curr. 1.7A, res. 0.175Ω
20%, curr. 1.1A, res. 0.156Ω
20%, curr. 1.1A, res. 0.300Ω
20%, curr. 0.85A, res. 0.33Ω
20%, curr. 0.70A, res. 0.44Ω
MURATA
(1)
L1
SEMCO
ABCO
ABCO
4.7µH 2.5 x 2.0 x 1.0
2.8 x 2.8 x 1.0
2.8 x 2.8 x 0.7
LPS4012-472ML
COILCRAFT
MURATA
TOKO
4.0 x 4.0 x 1.2
20%, curr. 1.7A, res. 0.175Ω
20%, curr. 1.1A, res. 0.156Ω
30%, curr. 1.2A, res. 0.252Ω
20%, curr. 0.70A, res. 0.44Ω
LQH3NPN4R7MJ0
3.0 x 3.0 x 1.1
4.7µH
(2)
L2
DFE252012C 1239AS-H-
4R7N
2.5 x 2.0 x 1.2
ABCO
2.8 x 2.8 x 0.7
LPF2807T-4R7M
MURATA
GRM219R61A106KE44
LMK212BJ106KD-T
0805
10µF
10%, X5R, 10V
10%, X5R, 10V
CIN
TAIYO YUDEN
0805
MURATA
GRM219R61A106KE44
LMK212BJ106KD-T
0805
10µF
10%, X5R, 10V
10%, X5R, 10V
CO1
CO2
TAIYO YUDEN
0805
MURATA
GRM219R61A106KE44
LMK212BJ106KD-T
0805
10µF
10%, X5R, 10V
10%, X5R, 10V
TAIYO YUDEN
0805
Doc ID 022613 Rev 1
3/22
Schematic
Table 2.
STOD03B
Typical external components (continued)
Comp. Manufacturer
Part number
Value
Size
Ratings
MURATA
CMID
GRM219R61A106KE44
LMK212BJ106KD-T
0805
0805
10%, X5R, 10V
10%, X5R, 10V
10µF
TAIYO YUDEN
MURATA
CREF
GRM185R60J105KE26
JMK107BJ105KK-T
0805
0805
10%, X5R, 10V
10%, X5R, 10V
1µF
TAIYO YUDEN
1. A 200 mA load can be provided with inductor saturation current as a minimum of 0.6 A.
2. For VO2 in a range between - 4.9 V to -5.4 V, a load current of 150 mA to 200 mA can be provided using inductors with a
saturation current as a minimum of 1 A. See Section 7.1.1.
Note:
All the above components refer to the typical application performance characteristics.
Operation of the device is not limited to the choice of these external components. Inductor
values ranging from 3.3 µH to 6.8 µH can be used together with STOD03B.
Figure 2.
Block schematic
VINP
LX1
VINA
VMID
LDO
VO1
S-WIRE
EN
VO2
VREF
AGND
PGND
AM10429v1
LX2
4/22
Doc ID 022613 Rev 1
STOD03B
Pin configuration
2
Pin configuration
Figure 3.
Pin configuration (top view)
Table 3.
Pin description
Pin n°
Pin name
Description
Lx1
PGND
VMID
1
2
3
4
5
Boost converter switching node
Power ground pin
Step-up converter output voltage (4.9V)
4.6V fixed LDO output
VO1
AGND
Signal ground pin. This pin must be connected to the power ground layer
Voltage reference output. 1µF bypass capacitor must be connected
between this pin and AGND
VREF
SWIRE
EN
6
7
8
Negative voltage setting pin.
Enable control pin. High 1
converter on; low or floating = converter in shutdown mode (1)
VO2
Lx2
9
Inverting converter output voltage
Inverting converter switching node
Analogic input supply voltage
Power input supply voltage
10
11
12
VIN A
ViN P
Internally connected to AGND. Exposed pad must be connected to ground
layers in the PCB layout in order to guarantee proper operation of the
device
Exposed
pad
1. No pull-up/pull-down resistors are needed.
Doc ID 022613 Rev 1
5/22
Maximum ratings
STOD03B
3
Maximum ratings
Table 4.
Absolute maximum ratings
Parameter
Symbol
INA, VINP
Value
Unit
V
DC supply voltage
-0.3 to 6
-0.3 to 4.6
V
V
EN, SWIRE
ILX2
Logic input pins
Inverting converter switching current
Inverting converter switching node voltage
Inverting converter output voltage
LDO and step-up converter output voltage
Step-up converter switching node voltage
Step-up converter switching current
Reference voltage
Internally limited
-10 to VINP+0.3
-10 to AGND+0.3
-0.3 to 6
A
LX2
V
VO2
V
VO1, VMID
V
LX1
-0.3 to VMID+0.3
Internally limited
-0.3 to 3
V
ILX1
VREF
PD
A
V
Power dissipation
Internally limited
-65 to 150
mW
°C
°C
kV
kV
TSTG
TJ
Storage temperature range
Maximum junction temperature
Human Body Model Protection
Machine Body Model Protection
150
± 2
ESD
± 200
Note:
Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these condition is not implied.
Table 5.
Thermal data
Symbol
Parameter
Value
Unit
RthJA
RthJC
Thermal resistance junction-ambient
33
°C/W
°C/W
Thermal resistance junction-case (FR-4 PCB) (1)
2.12
1. The package is mounted on a 4-layer (2S2P) JEDEC board as per JESD51-7.
6/22
Doc ID 022613 Rev 1
STOD03B
Electrical characteristics
4
Electrical characteristics
T = 25 °C, V
= V
= 3.7 V, I
= 30 mA, C = 2 x10 µF, C
= 2 x10 µF, C = 10 µF,
MID O1
J
INA
INP
O1,2
IN
C
V
= 2 x10 µF, C
= -4.9 V unless otherwise specified.
= 1 µF, L1 = L2 = 4.7 µH, V = 2 V, V
= 4.9 V, V = 4.6 V,
O2
O2
REF
EN
MID O1
Table 6.
Symbol
Electrical characteristics
Parameter
Test conditions
Min.
Typ.
Max.
Unit
General section
INA, VINP Supply input voltage
V
2.3
1.9
4.8
V
V
V
UVLO_H
UVLO_L
Undervoltage lockout HIGH
Undervoltage lockout LOW
VINA rising
INA falling
No load condition (sum of
2.22
2.18
2.25
V
I_VI
Input current
1.3
1.7
1
mA
µA
VINA and VINP
)
VEN=GND (sum of VINA and
VINP); TJ=-40°C to +85°C;
IQ_SH
Shutdown current
V
EN H
Enable high threshold
Enable low threshold
1.2
V
INA=2.3V to 4.8V,
V
TJ=-40°C to +85°C;
VEN
IEN
fS
L
0.4
1
VEN=VINA=4.8V;
TJ=-40°C to +85°C;
Enable input current
Switching frequency
µA
PWM mode
1.35
1.5
87
87
1.65
MHz
%
D1MAX
D2MAX
Step-up maximum duty cycle No load
Inverting maximum duty cycle No load
%
I
O1,O2=10 to 30mA,
75
%
VO1=4.6V, VO2=-4.9V
η
Total system efficiency
IO1,O2=30 to 150mA,
82
%
V
V
O1=4.6V, VO2=-4.9V
VREF
IREF
Voltage reference
IREF=10µA
1.195
100
1.207
1.219
Voltage reference current
capability
At 98.5% of no load
reference voltage
µA
°C
°C
OTP
Overtemperature protection
140
15
Overtemperature protection
hysteresis
OTPHYST
Positive output section
VINA=VINP=2.3V to 4.8V;
VO1
Positive voltage total variation TJ=-40°C to +85°C; IO1=5mA
to 150mA, IO2 no load
4.554
4.6
4.646
V
VINA,P=3.5V to 3.0V,
Line transient
ΔVO1LT
ΔVO1T
-12
20
mV
mV
IO1=100mA; TR=TF=50µs
IO1=3 to 30mA and IO1=30 to
Load transient regulation
3mA, TR=TF=150µs
Doc ID 022613 Rev 1
7/22
Electrical characteristics
STOD03B
Table 6.
Symbol
Electrical characteristics (continued)
Parameter
Test conditions
Min.
Typ.
Max
Unit
IO1=5 to 100mA; IO2 no load
TDMA Noise TDMA noise immunity
IO1 MAX Max. output current
20
mV
mA
(1)
VINA,P=2.9V to 4.8V
150
4.8
VINA=VINP=2.9V to 4.8V;
Positive voltage total variation IMID=5mA to 150mA;
IO2 no load; TJ=25°C
4.9
5.0
0.5
V
VMID
VINA=VINP=3.7V; IMID=5mA;
Temperature accuracy
IO2 no load; TJ=-40 to
+85°C;
-05
1
%
Step-up inductor peak
current
VMID 10% below nominal
value
I-L1MAX
1.1
1.6
0.7
A
Ω
Ω
P-channel Static Drain-
source On resistance
VINA=VINP=3.7V,
ISW-P1=100mA
RDSONP1
1.0
0.4
N-channel Static Drain-
source On resistance
VINA=VINP=3.7V,
ISW-P1=100mA
RDSONN1
Negative output
Negative output voltage
31 different values set by the
SWIRE pin (see SWIRE)
-5.4
-2.4
V
V
range
VINA=VINP=2.9V to 4.8V;
TJ=25°C; IO2=5mA to
150mA, IO1 no load
Negative output voltage total
variation on default value
-4.97
-4.9
-4.83
VO2
VINA=VINP=3.7V; IO2=5mA;
Temperature accuracy
IO2 no load;
-0.5
0.5
%
TJ=-40°C to +85°C
VINA,P=3.5V to 3.0V,
IO2=100mA, TR=TF=50µs
ΔVO2LT
Line transient
+12
20
mV
mV
mV
IO2=3 to 30mA and IO2=30 to
3mA, TR=TF=150µs
Load transient regulation
Load transient regulation
ΔVO2T
IO2=10 to 100mA and IO2=100
25
25
to 10mA, TR=TF=150µs
IO2=5 to 100mA; IO1 no load
VINA,P=2.9V to 4.8V
TDMA Noise TDMA noise immunity
mV
mA
IO2 MAX
I-L2MAX
Maximum output current
Inverting peak current
-150
-1.2
VO2 below 10% of nominal
value
-0.9
0.8
0.8
A
Ω
Ω
P-channel Static Drain-
source On resistance
VINA=VINP=3.7V;
ISW-P2=100mA
RDSONP2
RDSONN2
0.42
0.43
N-channel Static Drain-
source On resistance
VINA=VINP=3.7V;
ISW-P2=100mA
1. VINA,P = 4.2 to 3.7 V, 3.7 to 3.2 V, 3.4 to 2.9 V, f = 200 Hz, tON = 3.65 ms, tOFF = 1.25 ms, TR = TF = 50 µs, pulse signal.
8/22
Doc ID 022613 Rev 1
STOD03B
Typical performance characteristics
5
Typical performance characteristics
V
= -4.9 V; T = 25 °C; See Table 1. for external components used in the tests below.
J
O2
Figure 4.
Max power output vs. V
Figure 5.
Efficiency vs. output current
IN
Figure 6.
Positive output operation
Figure 7.
Negative output operation
IO2 = 100 mA
IO1 = 100 mA
Figure 8.
Soft-start inrush current
Figure 9.
Output current vs. input voltage
VINA = VINAP = 2.3 to 4.8 V, VO1 = 4.6 V
IO = 200 mA, VO2 = - 4.9 V
Doc ID 022613 Rev 1
9/22
Detailed description
STOD03B
6
Detailed description
6.1
SWIRE
●
Protocol: to digitally communicate over a single cable with single-wire components
Single-wire’s 3 components:
●
1. An external MCU
2. Wiring and associated connectors
3. STOD03B device with a dedicated single-wire pin.
6.1.1
S
features and benefits
WIRE
●
●
●
Fully digital signal
No handshake needed
Protection against glitches and spikes though an internal low pass filter acting on falling
edge
●
●
Uses a single wire (plus analog ground) to accomplish both communication and power
control transmission
Simplify design with an interface protocol that supplies control and signaling over a
single-wire connection to set the output voltages.
6.1.2
S
protocol
WIRE
●
Single-wire protocol uses conventional CMOS/TTL logic levels (maximum 0.6 V for
logic “zero” and a minimum 1.2 V for logic “one”) with operation specified over a supply
voltage range of 2.3 V to 4.8 V
●
Both master (MCU) and slave (STOD03B) are configured to permit bit sequential data
to flow only in one direction at a time; master initiates and controls the device
●
●
●
Data is bit-sequential with a START bit and a STOP bit
Signal is transferred in real time
System clock is not required; each single-wire pulse is self-clocked by the oscillator
integrated in the master and is asserted valid within a frequency range of 250 kHz
(maximum).
6.1.3
S
basic operations
WIRE
The negative output voltage levels are selectable within a wide range (steps of 100 mV)
The device can be enabled / disabled via S in combination with the Enable pin.
●
●
WIRE
10/22
Doc ID 022613 Rev 1
STOD03B
Detailed description
6.2
Negative output voltage levels
Table 7.
Default output voltage
Pulse
VO2
Pulse
VO2
Pulse
VO2
1
2
-5.4
-5.3
-5.2
-5.1
-5.0
-4.9
-4.8
-4.7
-4.6
-4.5
11
12
13
14
15
16
17
18
19
20
-4.4
-4.3
-4.2
-4.1
-4.0
-3.9
-3.8
-3.7
-3.6
-3.5
21
22
23
24
25
26
27
28
29
30
31
-3.4
-3.3
-3.2
-3.1
-3.0
-2.9
-2.8
-2.7
-2.6
-2.5
-2.4
3
4
5
6 (1)
7
8
9
10
1. Default value.
6.3
Enable and SWIRE
(1)
Table 8.
EN and S
Enable
operation table
WIRE
SWIRE
Action
Low
Low
High
High
Low
High
Low
High
Device off
Negative output voltage set by SWIRE
Default negative output voltage
Default negative output voltage
1. The Enable pin must be set to AGND while using the SWIRE function.
Doc ID 022613 Rev 1
11/22
Application information
STOD03B
7
Application information
7.1
External passive components
7.1.1
Inductor selection
Magnetic shielded low ESR power inductors must be chosen as the key passive
components for switching converters.
For the step-up converter an inductance between 4.7 µH and 6.8 µH is recommended.
For the inverting stage the suggested inductance ranges from 3.3 µH to 4.7 µH.
It is very important to select the right inductor according to the maximum current the
inductor can handle to avoid saturation. The step-up and the inverting peak current can be
calculated as follows:
Equation 1
VMID ×IOUT VINMIN ×(VMID − VINMIN
)
IPEAK−BOOST
=
+
η1× VINMIN
2× VMID × fs×L1
Equation 2
(VINMIN − VO2MIN )xIOUT
η2 × VINMIN
VINMIN × VO2MIN
2 × (VO2MIN − VINMIN ) × fs × L2
IPEAK −INVERTING
where
=
+
V
: step-up output voltage, fixed at 4.9 V;
MID
V
: inverting output voltage including sign (minimum value is the absolute maximum
O2
value);
I : output current for both DC-DC converters;
O
V : input voltage of STOD03B;
IN
f : switching frequency. Use the minimum value of 1.35 MHz for the worst case;
s
η1: efficiency of step-up converter. Typical value is 0.70;
η2: efficiency of inverting converter. Typical value is 0.60.
The negative output voltage can be set via S
at -5.4 V. Accordingly, the inductor peak
WIRE
current, at the maximum load condition, increases. A proper inductor, with a saturation
current as a minimum of 1 A, is preferred.
STOD03B is capable of supplying a load current from 150 mA to 200 mA. Inductors with a
saturation current as a minimum of 1 A must be selected.
12/22
Doc ID 022613 Rev 1
STOD03B
Application information
7.1.2
Input and output capacitor selection
It is recommended to use X5R or X7R low ESR ceramic capacitors as input and output
capacitors in order to filter any disturbance present in the input line and to obtain stable
operation for the two switching converters. A minimum real capacitance value of 6 µF must
be guaranteed for CMID, CO1 and CO2 in all conditions. Considering tolerance, temperature
variation and DC polarization, 2 x 10 µF, 10 V 10% as CMID, a 10 µF 10V 10% capacitor
as CO1 and 2 x 10 µF 10 V 10% as CO2 can be used to achieve the needed 6 µF.
7.2
Recommended PCB layout
The STOD03B is a high frequency power switching device and therefore requires a proper
PCB layout in order to obtain the necessary stability and optimize line/load regulation and
output voltage ripple.
Analog input (VINA) and power input (VINP) must be kept separated and connected together
at the CIN pad only. The input capacitor must be as close as possible to the IC.
In order to minimize ground noise, a common ground node for power ground and a different
one for analog ground must be used. In the recommended layout, the AGND node is placed
close to CREF ground while the PGND node is centered at CIN ground. They are connected
by a separated layer routing on the bottom through vias.
The exposed pad is connected to AGND through vias.
Figure 10. Top layer and top silk-screen (top view, not to scale)
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Application information
Figure 11. Bottom layer and silk-screen (top view, not to scale)
STOD03B
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STOD03B
Detailed description
8
Detailed description
8.1
General description
The STOD03B is a high efficiency dual DC-DC converter which integrates a step-up with an
LDO and inverting power stages suitable for supplying AMOLED panels. Thanks to the high
level of integration it needs only 6 external components to operate and it achieves very high
efficiency using a synchronous rectification technique for each of the two DC-DC converters.
This topology of a boost followed by an LDO regulator offers an efficient ripple reduction
solution for loads up to 200 mA. The controller uses an average current mode technique in
order to obtain good stability and precise voltage regulation in all possible conditions of input
voltage, output voltage, and output current. In addition, the peak inductor current is
monitored in order to avoid saturation of the coils. The STOD03B implements a power
saving technique in order to maintain high efficiency at very light load and it switches to
PWM operation as the load increases, in order to guarantee the best dynamic performance
and low noise operation. The STOD03B avoids battery leakage thanks to the true-shutdown
feature and it is self protected by overtemperature. Undervoltage lockout and soft-start
guarantee proper operation during startup.
8.1.1
Multiple operation modes
Both the step-up and the inverting stage of the STOD03B operate in three different modes:
pulse skipping mode (PSM), discontinuous conduction mode (DCM), and continuous
conduction mode (CCM). It switches automatically between the three modes according to
input voltage, output current, and output voltage conditions.
Pulse skipping operation:
The STOD03B works in pulse skipping mode when the load current is below a few mA.
The load current level at which this way of operating occurs depends on input voltage only
for the step-up converter and on input voltage and negative output voltage (VO2) for the
inverting converter.
Discontinuous conduction mode:
When the load increases above some tens of mA, the STOD03B enters DCM operation.
In order to obtain this type of operation the controller must avoid the inductor current going
negative. The discontinuous mode detector (DMD) blocks sense the voltage across the
synchronous rectifiers (P1B for the step-up and N2 for the inverting) and turn off the
switches when the voltage crosses a defined threshold which, in turn, represents a certain
current in the inductor. This current can vary according to the slope of the inductor current
which depends on input voltage, inductance value, and output voltage.
Continuous conduction mode:
At medium/high output loads, the STOD03B enters full CCM at constant switching
frequency mode for each of the two DC-DC converters.
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Detailed description
STOD03B
8.1.2
Enable pin
The device operates when the EN pin is set high. If the EN pin is set low, the device stops
switching, and all the internal blocks are turned off. In this condition the current drawn from
VINP/VINA is below 1 µA in the whole temperature range. In addition, the internal switches
are in an OFF state so the load is electrically disconnected from the input, this avoids
unwanted current leakage from the input to the load.
8.1.3
Soft-start and inrush current limiting
After the EN pin is pulled high, or after a suitable voltage is applied to VINP, VINA and EN, the
device initiates the startup phase. As a first step, the CMID capacitor is charged and the P1B
switch implements a current limiting technique in order to keep the charge current below
400 mA. This avoids the battery overloading during startup. After VMID reaches the VINP
voltage level, the P1B switch is fully turned on and the soft-start procedure for the step-up is
started.
After around 2 ms the soft-start for the inverting is started. The positive and negative
voltages are under regulation by around 6 ms after the EN pin is asserted high.
8.1.4
8.1.5
Undervoltage lockout
The undervoltage lockout function avoids improper operation of the STOD03B when the
input voltage is not high enough. When the input voltage is below the UVLO threshold the
device is in shutdown mode. The hysteresis of 50 mV avoids unstable operation when the
input voltage is close to the UVLO threshold.
Overtemperature protection
An internal temperature sensor continuously monitors the IC junction temperature. If the IC
temperature exceeds 140 °C, typical, the device stops operating. As soon as the
temperature falls below 125 °C, typical, normal operation is restored.
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Package mechanical data
9
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.
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Package mechanical data
STOD03B
DFN12L (3 x 3 x 0.6 mm) mechanical data
mm.
Typ.
0.55
inch.
Typ.
Dim.
Min.
Max.
0.60
0.05
Min.
0.020
0
Max.
0.024
0.002
A
A1
A3
b
0.51
0
0.022
0.02
0.20
0.25
3
0.001
0.008
0.010
0.118
0.080
0.118
0.048
0.018
0.016
0.18
2.85
1.87
2.85
1.06
0.30
3.15
2.12
3.15
1.31
0.007
0.112
0.074
0.112
0.042
0.012
0.124
0.083
0.124
0.052
D
D2
E
2.02
3
E2
e
1.21
0.45
0.40
L
0.30
0.50
0.012
0.020
8085116/A
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STOD03B
Package mechanical data
Tape & reel QFNxx/DFNxx (3x3) mechanical data
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
99
13.2
0.504
0.795
3.898
D
N
101
3.976
T
14.4
0.567
Ao
Bo
Ko
Po
P
3.3
3.3
1.1
4
0.130
0.130
0.043
0.157
0.315
8
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Package mechanical data
Figure 12. DFN12L (3 x 3 mm) footprint recommended data
STOD03B
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Revision history
10
Revision history
Table 9.
Date
Document revision history
Revision
Changes
19-Dec-2011
1
Initial release.
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STOD03B
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