STRH100N10FSY01 [STMICROELECTRONICS]
48A, 100V, 0.035ohm, N-CHANNEL, Si, POWER, MOSFET, TO-254AA, ROHS COMPLIANT, HERMETIC SEALED PACKAGE-3;型号: | STRH100N10FSY01 |
厂家: | ST |
描述: | 48A, 100V, 0.035ohm, N-CHANNEL, Si, POWER, MOSFET, TO-254AA, ROHS COMPLIANT, HERMETIC SEALED PACKAGE-3 局域网 开关 脉冲 晶体管 |
文件: | 总17页 (文件大小:427K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
STRH100N10
N-channel 100 V, 0.030 Ω, TO-254AA
rad-hard low gate charge STripFET™ Power MOSFET
Features
VBDSS
ID
RDS(on)
Qg
100 V
48 A
30 mOhm
135 nC
■ Fast switching
■ 100% avalanche tested
■ Hermetic package
■ 70 krad TID
3
2
1
TO-254AA
■ Single event effect (SEE) hardened
2
■ SEB & SEGR with 32 Mev/cm /mg LET ions
Applications
Figure 1.
Internal schematic diagram
■ Satellite
■ High reliability
Description
This N-channel Power MOSFET is developed with
STMicroelectronics unique STripFET™ process
has specifically been designed to sustain high
TID and provide immunity to heavy ion effects. It
is also intended for any application with low gate
charge drive requirements. This Power MOSFET
is full ESCC qualified.
Table 1.
Device summary
ESCC part
Quality
level
Lead
finish
Part number (1)
Package
Mass (g)
Temp. range EPPL
number
Engineering
model
STRH100N10FSY1
-
-
Gold
STRH100N10FSY01 5205/021/01
STRH100N10FSY02 5205/021/02
TO-254AA
10
-55 to 150°C Target
-
ESCC flight
Solder
dip
1. Depending ESCC part number mentioned on the purchase order.
Note:
Contact ST sales office for information about the specific conditions for product in die form
and QML-Q versions.
October 2010
Doc ID 17486 Rev 3
1/17
www.st.com
17
Contents
STRH100N10
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
5
6
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/17
Doc ID 17486 Rev 3
STRH100N10
Electrical ratings
1
Electrical ratings
(T = 25 °C unless otherwise specified)
C
Table 2.
Absolute maximum ratings (pre-irradiation)
Symbol
Parameter
Value
100
20
Unit
V
(1)
Drain-source voltage (VGS = 0)
VDS
(2)
Gate-source voltage
V
VGS
(3)
ID
Drain current (continuous)
Drain current (continuous) at TC= 100 °C
Drain current (pulsed)
48
30
A
A
(3)
ID
(4)
IDM
192
170
2.6
A
(3)
PTOT
Total dissipation
W
dv/dt (5)
Tstg
Peak diode recovery voltage slope
Storage temperature
V/ns
°C
- 55 to 150
TJ
Operating junction temperature
°C
1. This rating is guaranteed @ TJ ≥ 25 °C (see Figure 10: Normalized BVDSS vs temperature).
2. This value is guaranteed over the full range of temperature.
3. Rated according to the Rthj-case + Rthc-s.
4. Pulse width limited by safe operating area.
5. ISD ≤48 A, di/dt ≤100 A/µs, VDD = 80% V(BR)DSS.
Table 3.
Thermal data
Symbol
Parameter
Value
Unit
Rthj-case Thermal resistance junction-case max
0.52
0.21
°C/W
°C/W
Rthc-s
Case-to-sink typ
Table 4.
Symbol
Avalanche characteristics
Parameter
Value
Unit
Avalanche current, repetitive or not-repetitive
(pulse width limited by TJ max)
IAR
24
A
Single pulse avalanche energy
(1)
EAS
954
280
mJ
mJ
(starting TJ=25 °C, ID= IAR, VDD=50 V)
Single pulse avalanche energy
EAS
(starting TJ=110 °C, ID= IAR, VDD=50 V)
Repetitive avalanche
EAR
60
mJ
(Vdd = 50 V, IAR = 24 A, f = 10 KHz, TJ = 25 °C,
duty cycle = 50%)
Doc ID 17486 Rev 3
3/17
Electrical ratings
Table 4.
STRH100N10
Avalanche characteristics (continued)
Symbol
Parameter
Value
Unit
Repetitive avalanche
(Vdd = 50 V, IAR = 24 A, f = 100 KHz, TJ = 25 °C,
duty cycle = 10%)
24
EAR
mJ
Repetitive avalanche
(Vdd = 50 V, IAR = 24 A, f = 100 KHz, TJ = 110
°C, duty cycle = 10%)
7.7
1. Maximum rating value.
4/17
Doc ID 17486 Rev 3
STRH100N10
Electrical characteristics
2
Electrical characteristics
(T = 25 °C unless otherwise specified).
C
Pre-irradiation
Table 5.
On/off states (pre-irradiation)
Symbol
Parameter
Test conditions
Min.
Typ. Max. Unit
Zero gate voltage drain
current (VGS = 0)
IDSS
80% BVDss
10
µA
Gate body leakage current
(VDS = 0)
V
GS = 20 V
100
nA
nA
IGSS
VGS = -20 V
-100
100
2
Drain-to-source breakdown
voltage
(1)
VGS = 0, ID = 1 mA
V
V
Ω
BVDSS
VGS(th)
RDS(on)
Gate threshold voltage
VDS = VGS, ID = 1 mA
VGS = 12 V; ID = 24 A
4.5
Static drain-source on
resistance
0.030 0.035
1. This rating is guaranteed @ TJ ≥ 25 °C (see Figure 10: Normalized BVDSS vs temperature).
Table 6.
Dynamic (pre-irradiation)
Symbol
Parameter
Test conditions
Min.
Typ.
Max. Unit
Input capacitance
Ciss
3940 4925 5910
pF
pF
pF
VGS = 0, VDS = 25 V,
f=1 MHz
Output capacitance
(1)
Coss
543
190
679
237
815
284
Reverse transfer
capacitance
Crss
Equivalent output
capacitance (2)
(1)
Coss eq.
VGS = 0, VDD = 80 V
480
pF
Total gate charge
Qg
Qgs
Qgd
108
22
135
27
162
32
nC
nC
nC
VDD = 50 V, ID = 48 A,
VGS=12 V
Gate-to-source charge
Gate-to-drain (“Miller”)
charge
36
45
54
(3)
RG
Gate input resistance
Gate inductance
1.2
1.7
4.5
7.5
7.5
2
Ω
f=1MHz gate DC bias=0
test signal level=20mV
open drain
LG
LS
LD
nH
nH
nH
Source inductance
Drain inductance
1. This value is guaranteed over the full range of temperature.
2. This value is defined as the ratio between the Qoss and the voltage value applied.
3. Not tested, guaranteed by process.
Doc ID 17486 Rev 3
5/17
Electrical characteristics
STRH100N10
Table 7.
Switching times (pre-irradiation)
Symbol
Parameter
Test conditions
Min. Typ.
Max
Unit
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
24
34
79
33
29.5
43
35
52
ns
ns
ns
ns
VDD = 50 V, ID = 24 A,
Turn-off-delay time
Fall time
RG = 4.7 Ω, VGS = 12 V
99.2
42
119
50
(1)
Table 8.
Source drain diode (pre-irradiation)
Symbol
Parameter
Test conditions
Min.
Typ.
Max
Unit
Source-drain current
ISD
48
A
A
Source-drain current
(pulsed)
(2)
ISDM
192
(3)
VSD
Forward on voltage
ISD = 48 A, VGS = 0
1.5
V
(4)
trr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
332
400
415
5
498
ns
µC
A
ISD = 48 A,
di/dt = 100 A/µs
(4)
Qrr
(4)
VDD= 50 V, TJ = 25 °C
IRRM
24
(4)
trr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
500
7
600
ns
µC
A
ISD = 48 A,
di/dt = 100 A/µs
(4)
Qrr
(4)
VDD= 50 V, TJ = 150 °C
IRRM
28
1. Refer to the Figure 16.
2. Pulse width limited by safe operating area.
3. Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
4. Not tested in production, guaranteed by process.
6/17
Doc ID 17486 Rev 3
STRH100N10
Radiation characteristics
3
Radiation characteristics
The technology of the STMicroelectronics rad-hard Power MOSFETs is extremely resistant
(a)
to radiative environments. Every manufacturing lot is tested for total ionizing dose using
the TO-3 package. Both pre-irradiation and post-irradiation performances are tested and
specified using the same circuitry and test conditions in order to provide a direct
comparison.
(T = 22 3 °C unless otherwise specified).
amb
Total dose radiation (TID) testing
One bias conditions using the TO-3 package:
–
V
bias: + 15 V applied and V = 0 V during irradiation
GS DS
The following parameters are measured (see Table 9, Table 10 and Table 11):
●
●
●
●
before irradiation
after irradiation
after 24 hrs @ room temperature
after 240 hrs @ 100 °C anneal
Table 9.
Post-irradiation on/off states @ T = 25 °C, (Co60 γ rays 70 K Rad(Si))
J
Symbol
Parameter
Test conditions
Drift values ∆ Unit
Zero gate voltage drain current
(VGS = 0)
IDSS
80% BVDss
+4
µA
nA
V
Gate body leakage current
(VDS = 0)
VGS = 20 V
VGS = -20 V
15
IGSS
-15
Drain-to-source breakdown
voltage
BVDSS
VGS = 0, ID = 1 mA
-25%
VGS(th)
RDS(on)
Gate threshold voltage
VDS = VGS, ID = 1 mA
-50% / + 5%
10%
V
Static drain-source on resistance VGS = 10 V; ID = 36 A
Ω
(1)
Table 10. Dynamic post-irradiation @ T = 25 °C, (Co60 γ rays 70 K Rad(Si))
J
Symbol
Parameter
Test conditions
Drift values ∆ Unit
Qg
Total gate charge
-5% / +50%
IG = 1 mA, VGS = 12 V,
VDS = 50 V, IDS = 40 A
Qgs
Gate-source charge
Gate-drain charge
35%
nC
Qgd
-5% / +130%
1. Parameter not measured after irradiation but guaranteed by the results obtained during the evaluation
phase that proves this parameter is directly correlated to the VGS(th) shift.
a. Irradiation done according to the ESCC 22900 specification, window 1).
Doc ID 17486 Rev 3
7/17
Radiation characteristics
STRH100N10
Table 11. Source drain diode post-irradiation @ T = 25 °C, (Co60 γ rays 70 K
J
(1)
Rad(Si))
Symbol
Parameter
Test conditions
Drift values ∆. Unit
10%
(2)
VSD
Forward on voltage
ISD = 50 A, VGS = 0
V
1. Refer to Figure 16.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Single event effect, SOA
The technology of the STMicroelectronics rad-hard Power MOSFETs is extremely resistant
(b)
to heavy ion environment for single event effect. SEB and SEGR tests have been
performed with a fluence of 3e+5 ions/cm².
The accept/reject criteria are:
●
●
SEB test: drain voltage checked, trigger level is set to V = - 5 V. Stop condition: as
soon as a SEB occurs or if the fluence reaches 3e+5 ions/cm².
ds
SEGR test: the gate current is monitored every 100 ms. A gate stress is performed
before and after irradiation. Stop condition: as soon as the gate current reaches 100 nA
(during irradiation or during PIGS test) or if the fluence reaches 3e+5 ions/cm².
The results are:
–
–
no SEB
SEGR test produces the following SOA (see Table 12: Single event effect (SEE),
safe operating area (SOA) and Figure 2: Single event effect, SOA)
Table 12. Single event effect (SEE), safe operating area (SOA)
Energy Range
VDS (V)
Let (Mev/(mg/cm2)
Ion
(MeV)
(µm)
@VGS=0 @VGS= -2 V @VGS= -5 V @VGS= -10 V @VGS= -20 V
100 80 60 30 10
Kr
32
768
94
b. Irradiation per MIL-STD-750E, method 1080 (bias circuit in Figure 3: Single event effect, bias circuit).
8/17
Doc ID 17486 Rev 3
STRH100N10
Figure 2.
Radiation characteristics
Single event effect, SOA
100
90
80
70
60
50
40
30
20
10
Kr (32 MeV.cm²/mg)
0
0
-20
-15
-10
-5
Vgs (V)
(c)
Figure 3.
Single event effect, bias circuit
c. Bias condition during radiation refer to Table 12: Single event effect (SEE), safe operating area (SOA) .
Doc ID 17486 Rev 3
9/17
Electrical characteristics (curves)
STRH100N10
4
Electrical characteristics (curves)
Figure 4.
Safe operating area
Figure 5.
Thermal impedance
AM04952v2
HG0K
1000
K
δ=0.5
0.2
0.1
100
10
1
100µss
1ms
10-1
10-2
0.07
0.05
0.02
0.01
Tj=150°CC
Tc=25°C
10ms
Zth=k(Rthj-c+Rthc-s)
δ=tp/τ
DC
Single ppuullssee
tp
Single pulse
τ
0
10-3
10-5
0.1
1
10
100
1000
10-2
10-4
10-1
10-3
Vds [V]
p(s)
t
Figure 6.
Output characteristics
Figure 7.
Transfer characteristics
AM01494v1
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I
D
)$
ꢇ!ꢈ
(A)
VGS=12V
6$3 ꢀ ꢁ6
200
7V
6V
ꢂꢃꢃ
ꢂꢃ
ꢂ
4* ꢀ ꢁꢆ #
150
4* ꢀ ꢂꢆꢃ #
100
50
0
4* ꢀ ꢊꢆꢆ #
5V
DS(V)
ꢄꢅꢆ
0
2.5
10
ꢉꢅꢃ 6'3ꢇ6ꢈ
5
V
ꢄꢅꢃ
ꢆꢅꢃ
ꢆꢅꢆ
7.5
12.5
Figure 8.
Gate charge vs gate-source voltage Figure 9.
Capacitance variations
!-ꢃꢂꢄꢍꢆVꢂ
AM01496v1
C
(pF)
6'3
ꢇ6ꢈ
6$$ꢀꢆꢃ6ꢌ )$ꢀꢄꢋ!ꢌ
6'3ꢀꢂꢁ6ꢌ 4*ꢀꢁꢆ #
Ciss
ꢂꢃ
ꢋ
1000
Coss
)$ꢀꢄꢋ!
100
10
1
ꢉ
Crss
ꢄ
ꢁ
)$ꢀꢂꢁ!
ꢂꢃꢃ
V
DS=25V, VGS=0
f=1MHz, T =25°C
J
)$ꢀꢁꢄ!
ꢉꢃ
ꢃ
ꢃ
0.1
ꢁꢃ
ꢄꢃ
ꢋꢃ
ꢂꢁꢃ 1GꢇN#ꢈ
1
10
VDS(V)
10/17
Doc ID 17486 Rev 3
STRH100N10
Electrical characteristics (curves)
Figure 10. Normalized BV
vs temperature Figure 11. Static drain-source on resistance
DSS
Figure 12. Normalized gate threshold voltage Figure 13. Normalized on resistance vs
vs temperature
temperature
Figure 14. Source drain-diode forward
characteristics
Doc ID 17486 Rev 3
11/17
Test circuits
STRH100N10
5
Test circuits
(1)
Figure 15. Switching times test circuit for resistive load
1. Max driver VGS slope = 1V/ns (no DUT)
Figure 16. Source drain diode
Figure 17. Unclamped inductive load test circuit (single pulse and repetitive)
12/17
Doc ID 17486 Rev 3
STRH100N10
Package mechanical data
6
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.
Doc ID 17486 Rev 3
13/17
Package mechanical data
STRH100N10
Table 13. TO-254AA mechanical data
mm
Inch
Typ.
Dim.
Min.
Typ.
Max.
Min.
Max.
A
A1
A2
b
6.32
1.02
6.20
1.27
0.249
0.040
0.260
0.050
3.81
1.02
0.150
0.040
0.89
0.89
20.07
13.59
-
1.27
1.14
20.32
13.84
-
0.035
0.035
0.790
0.535
-
0.050
0.050
0.800
0.545
-
b1
D
D1
D2
e
-
-
3.81
0.150
E
13.59
13.46
16.89
3.53
13.84
13.97
17.40
3.78
0.535
0.530
0.665
0.139
0.545
0.550
0.685
0.149
L
L1
P
Figure 18. TO-254AA mechanical drawing
14/17
Doc ID 17486 Rev 3
STRH100N10
Order codes
7
Order codes
Table 14. Ordering information
ESCC part
Order code(1)
Quality
level
Lead
finish
Package
EPPL
Marking
Packing
number
Engineering
model
STRH100N10FSY1
+ BeO
STRH100N10FSY1
-
-
Target
-
Gold
Strip
pack
STRH100N10FSY01 5205/021/01
STRH100N10FSY02 5205/021/02
TO-254AA
520502101
520502102
ESCC flight
Solder
dip
1. Depending ESCC part number mentioned on the purchase order.
Contact ST sales office for information about the specific conditions for:
●
Products in die form
Tape and reel packing
●
Doc ID 17486 Rev 3
15/17
Revision history
STRH100N10
8
Revision history
Table 15. Document revision history
Date
Revision
Changes
13-May-2010
14-Jun-2010
18-Oct-2010
1
2
3
First release.
Updated Table 1: Device summary.
Updated Table 1, 5, 9 and 14.
16/17
Doc ID 17486 Rev 3
STRH100N10
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Doc ID 17486 Rev 3
17/17
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