TDA7296S [STMICROELECTRONICS]
60V - 60W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY; 60V - 60W DMOS音频放大器,具有静音/ ST- BY型号: | TDA7296S |
厂家: | ST |
描述: | 60V - 60W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY |
文件: | 总11页 (文件大小:251K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TDA7296S
60V - 60W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY
VERY HIGH OPERATING VOLTAGE RANGE
(±30V)
MULTIPOWER BCD TECHNOLOGY
DMOS POWER STAGE
HIGH OUTPUT POWER (THD = 10%, UP TO
60W)
MUTING/STAND-BY FUNCTIONS
NO SWITCH ON/OFF NOISE
VERY LOW DISTORTION
VERY LOW NOISE
SHORT CIRCUIT PROTECTION
Multiwatt15
ORDERING NUMBER: TDA7296SV
THERMAL SHUTDOWN
CLIP DETECTOR
class TV). Thanks to the wide voltage range and
MODULARITY (MORE DEVICES CAN BE
to the high out current capability it is able to sup-
EASILY CONNECTED IN PARALLEL TO
ply the highest power into both 4Ω and 8Ω loads.
DRIVE VERY LOW IMPEDANCES)
The built in muting function with turn on delay
simplifies the remote operation avoiding switching
DESCRIPTION
on-off noises.
The TDA7296S is a monolithic integrated circuit
in Multiwatt15 package, intended for use as audio
class AB amplifier in Hi-Fi field applications
(Home Stereo, self powered loudspeakers, Top-
Parallel mode is made possible by connecting
more device through of pin11. High output power
can be delivered to very low impedance loads, so
optimizing the thermal dissipation of the system.
Figure 1: Typical Application and Test Circuit
+Vs
C7 100nF
C6 1000µF
R3 22K
BUFFER DRIVER
11
+Vs
+PWVs
13
C2
R2
7
22µF
680Ω
IN-
2
3
-
14
12
OUT
C1 470nF
IN+
+
BOOT
LOADER
R1 22K
SGND
(**)
4
C5
22µF
(*)
6
5
BOOTSTRAP
CLIP DET
VMUTE
VSTBY
R5 10K
MUTE
STBY
10
9
VCLIP
THERMAL
SHUTDOWN
S/C
PROTECTION
MUTE
STBY
R4 22K
1
8
-Vs
15
STBY-GND
-PWVs
C3 10µF
C4 10µF
C9 100nF
C8 1000µF
D97AU805A
-Vs
(*) see Application note
(**) for SLAVE function
1/11
June 2000
TDA7296S
PIN CONNECTION (Top view)
15
14
13
12
11
10
9
-VS (POWER)
OUT
+VS (POWER)
BOOTSTRAP LOADER
BUFFER DRIVER
MUTE
STAND-BY
8
-VS (SIGNAL)
7
+VS (SIGNAL)
6
BOOTSTRAP
5
CLIP AND SHORT CIRCUIT DETECTOR
SIGNAL GROUND
NON INVERTING INPUT
INVERTING INPUT
STAND-BY GND
4
3
2
1
TAB CONNECTED TO PIN 8
D97AU806
QUICK REFERENCE DATA
Symbol
VS
Parameter
Test Conditions
Min.
±12
26
Typ.
Max.
± 30
40
Unit
V
Supply Voltage Operating
Closed Loop Gain
Output Power
GLOOP
dB
W
V = 30V; RL = 8 ; THD = 10%
60
60
75
±
Ω
S
Ptot
VS = ±25V; RL = 4Ω; THD = 10%
W
SVR
Supply Voltage Rejection
dB
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Supply Voltage (No Signal)
Value
±35
60
Unit
V
VS
V1
VSTAND-BY GND Voltage Referred to -VS (pin 8)
Input Voltage (inverting) Referred to -VS
Maximum Differential Inputs
V
V2
60
V
V2 - V3
V3
±30
60
V
Input Voltage (non inverting) Referred to -VS
Signal GND Voltage Referred to -VS
Clip Detector Voltage Referred to -VS
Bootstrap Voltage Referred to -VS
Stand-by Voltage Referred to -VS
Mute Voltage Referred to -VS
V
V4
60
V
V5
60
V
V6
60
V
V9
60
V
V10
V11
V12
IO
60
V
Buffer Voltage Referred to -VS
60
V
Bootstrap Loader Voltage Referred to -VS
Output Peak Current
60
V
10
A
Ptot
Top
Tstg, Tj
Power Dissipation Tcase = 70 C
50
W
°C
°C
°
Operating Ambient Temperature Range
Storage and Junction Temperature
0 to 70
150
THERMAL DATA
Symbol
Description
Thermal Resistance Junction-case
Typ
1
Max
Unit
Rth j-case
1.5
°C/W
2/11
TDA7296S
ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit VS = ±24V, RL = 8Ω, GV = 30dB;
Rg = 50 Ω; Tamb = 25°C, f = 1 kHz; unless otherwise specified).
Symbol
VS
Parameter
Operating Supply Range
Quiescent Current
Test Condition
Min.
±10
20
Typ.
Max.
±30
60
Unit
V
Iq
30
mA
nA
mV
nA
Ib
Input Bias Current
500
±10
±100
VOS
IOS
Input Offset Voltage
Input Offset Current
PO
RMS Continuous OutputPower
d = 0.5%:
VS = ± 24V, RL = 8Ω
VS = ± 21V, RL = 6Ω
27
27
27
30
30
30
W
W
W
V = 18V, R = 4
±
Ω
S
L
Music Power (RMS) (*)
d = 10%;
∆t = 1s
RL = 8
Ω
; VS = ±30V
; VS = ±24V
60
60
60
W
W
W
RL = 6
Ω
R = 4 ; V = 23V
Ω
±
L
S
d
Total Harmonic Distortion (**)
PO = 5W; f = 1kHz
PO = 0.1 to 20W; f = 20Hz to 20kHz
0.005
%
%
0.1
0.1
VS = ±18V, RL = 4Ω:
PO = 5W; f = 1kHz
PO = 0.1 to 20W; f = 20Hz to 20kHz
0.01
%
%
SR
GV
GV
eN
Slew Rate
7
10
80
30
V/µs
dB
Open Loop Voltage Gain
Closed Loop Voltage Gain
Total Input Noise
24
40
5
dB
A = curve
f = 20Hz to 20kHz
1
2
µV
µV
fL, fH
Ri
Frequency Response (-3dB)
Input Resistance
PO = 1W
20Hz to 20kHz
100
60
kΩ
SVR
TS
Supply Voltage Rejection
Thermal Shutdown
f = 100Hz; Vripple = 0.5Vrms
75
dB
150
C
°
STAND-BY FUNCTION (Ref: -VS or GND)
VST on
VST off
Stand-by on Threshold
Stand-by off Threshold
1.5
V
3.5
70
V
ATTst-by Stand-by Attenuation
90
dB
mA
Iq st-by
Quiescent Current @ Stand-by
1
3
MUTE FUNCTION (Ref: -VS or GND)
VMon
VMoff
Mute on Threshold
Mute off Threshold
1.5
V
V
3.5
60
ATTmute Mute Attenuation
80
dB
Note (**):
MUSIC POWER is the maximal power which the amplifier is capable of producing across the rated load resistance (regardless of non linearity)
1 sec after the application of a sinusoidal input signal of frequency 1KHz.
Note (**): Tested with optimized Application Board (see fig. 2)
3/11
TDA7296S
Figure 2: Typical ApplicationP.C. Board and ComponentLayout (scale 1:1)
4/11
TDA7296S
APPLICATION SUGGESTIONS (see Test and Application Circuits of the Fig. 1)
The recommended values of the external components are those shown on the application circuit of Fig-
ure 1. Different values can be used; the following table can help the designer.
LARGER THAN
SUGGESTED
SMALLER THAN
SUGGESTED
COMPONENTS
SUGGESTED VALUE
PURPOSE
R1 (*)
22k
INPUT RESISTANCE
INCREASE INPUT
IMPEDANCE
DECREASE INPUT
IMPEDANCE
R2
R3 (*)
R4
680
CLOSED LOOP GAIN DECREASE OF GAIN INCREASE OF GAIN
SET TO 30dB (**)
Ω
22k
22k
INCREASE OF GAIN DECREASE OF GAIN
ST-BY TIME
CONSTANT
LARGER ST-BY
ON/OFF TIME
SMALLER ST-BY
ON/OFF TIME;
POP NOISE
R5
C1
10k
MUTE TIME
CONSTANT
LARGER MUTE
ON/OFF TIME
SMALLER MUTE
ON/OFF TIME
0.47 F
INPUT DC
DECOUPLING
HIGHER LOW
FREQUENCY
CUTOFF
µ
C2
22µF
FEEDBACK DC
DECOUPLING
HIGHER LOW
FREQUENCY
CUTOFF
C3
C4
10 F
MUTE TIME
CONSTANT
LARGER MUTE
ON/OFF TIME
SMALLER MUTE
ON/OFF TIME
µ
10µF
ST-BY TIME
CONSTANT
LARGER ST-BY
ON/OFF TIME
SMALLER ST-BY
ON/OFF TIME;
POP NOISE
C5
22 FXN (***)
µ
BOOTSTRAPPING
SIGNAL
DEGRADATION AT
LOW FREQUENCY
C6, C8
C7, C9
1000µF
0.1µF
SUPPLY VOLTAGE
BYPASS
SUPPLY VOLTAGE
BYPASS
DANGER OF
OSCILLATION
(*) R1 = R3 for pop optimization
(**) Closed Loop Gain has to be ≥ 26dB
(***) Multiply this value for the number of modular part connected
Slave function: pin 4 (Ref to pin 8 -VS)
Note:
If in the application, the speakers are connected
via long wires, it is a good rule to add between
the output and GND, a Boucherot Cell, in order to
avoid dangerous spurious oscillations when the
speakersterminal are shorted.
MASTER
-VS +3V
UNDEFINED
-VS +1V
The suggested Boucherot Resistor is 3.9Ω/2W
and the capacitor is 1µF.
SLAVE
-VS
D98AU821
5/11
TDA7296S
INTRODUCTION
A local linearizing feedback, provided by differen-
tial amplifier A, is used to fullfil the above require-
ments, allowing a simple and effective quiescent
current setting.
Proper biasing of the power output transistors
alone is however not enough to guaranteethe ab-
sence of crossover distortion.
While a linearization of the DC transfer charac-
teristic of the stage is obtained, the dynamic be-
haviour of the system must be taken into account.
A significant aid in keeping the distortion contrib-
uted by the final stage as low as possible is pro-
vided by the compensation scheme, which ex-
ploits the direct connection of the Miller capacitor
at the amplifier’s output to introduce a local AC
feedbackpath enclosing the output stage itself.
In consumer electronics, an increasing demand
has arisen for very high power monolithic audio
amplifiers able to match, with a low cost, the per-
formance obtained from the best discrete de-
signs.
The task of realizing this linear integrated circuit
in conventional bipolar technology is made ex-
tremely difficult by the occurence of 2nd break-
down phoenomenon. It limits the safe operating
area (SOA) of the power devices, and, as a con-
sequence, the maximum attainable output power,
especiallyin presenceof highly reactive loads.
Moreover, full exploitation of the SOA translates
into a substantial increase in circuit and layout
complexity due to the need of sophisticated pro-
tection circuits.
To overcome these substantial drawbacks, the
use of power MOS devices, which are immune
from secondarybreakdownis highly desirable.
2) Protections
In designing a power IC, particular attention must
be reserved to the circuits devoted to protection
of the device from short circuit or overload condi-
tions.
1) Output Stage
The main design task in developping a power op-
erational amplifier, independently of the technol-
ogy used, is that of realization of the output stage.
The solution shown as a principle shematic by
Fig3 represents the DMOS unity - gain output
buffer of the TDA7296S.
This large-signal, high-power buffer must be ca-
pable of handling extremely high current and volt-
age levels while maintaining acceptably low har-
monic distortion and good behaviour over
frequency response; moreover, an accurate con-
trol of quiescent current is required.
Due to the absence of the 2nd breakdown phe-
nomenon, the SOA of the power DMOS transis-
tors is delimited only by a maximum dissipation
curve dependent on the duration of the applied
stimulus.
In order to fully exploit the capabilities of the
power transistors, the protection scheme imple-
mented in this device combines a conventional
SOA protection circuit with a novel local tempera-
ture sensing technique which ” dynamically” con-
trols the maximum dissipation.
In addition to the overload protection described
Figure 3: Principle Schematic of a DMOS unity-gain buffer.
6/11
TDA7296S
Figure 4: Turn ON/OFF Suggested Sequence
+Vs
(V)
+40
-40
-Vs
V
(mV)
IN
V
ST-BY
5V
5V
PIN #9
(V)
V
MUTE
PIN #10
(V)
I
Q
(mA)
V
OUT
(V)
OFF
ST-BY
PLAY
ST-BY
OFF
MUTE
MUTE
D98AU817
above, the device features a thermal shutdown
avoid any kind of uncontrolled audible transient at
the output.
circuit which initially puts the device into a muting
o
state (@ Tj = 150 C) and then into stand-by (@
The sequence that we recommend during the
ON/OFF transients is shown by Figure 4.
The application of figure 5 shows the possibility of
using only one command for both st-by and mute
functions. On both the pins, the maximum appli-
cable range corresponds to the operating supply
voltage.
Tj = 160 oC).
Full protection against electrostatic discharges on
every pin is included.
Figure 5: Single Signal ST-BY/MUTE Control
Circuit
APPLICATION INFORMATION
BRIDGE APPLICATION
MUTE
STBY
Another application suggestion is the BRIDGE
configuration,where two TDA7296S are used.
In this application, the value of the load must not
be lower than 8 Ohm for dissipation and current
capability reasons.
20K
30K
MUTE/
ST-BY
10K
10µF
10µF
1N4148
A suitable field of application includes HI-FI/TV
subwoofersrealizations.
D93AU014
The main advantagesoffered by this solution are:
- High power performanceswith limited supply
voltage level.
- Considerablyhigh output power even with high
load values (i.e. 16 Ohm).
3) Other Features
The device is provided with both stand-by and
mute functions, independently driven by two
CMOS logic compatible input pins.
With Rl= 8 Ohm, Vs = ±23V the maximum output
power obtainableis 120W (Music Power)
The circuits dedicated to the switching on and off
of the amplifier have been carefully optimized to
7/11
TDA7296S
The slave SGND pin must be tied to the nega-
tive supply.
APPLICATION NOTE: (ref. fig. 7)
The slave ST-BY pin must be connected to
ST-BY pin.
The bootstrap lines must be connected to-
gether and the bootstrap capacitor must be in-
creased: for N devices the boostrap capacitor
must be 22µF times N.
Modular Application (more Devices in Parallel)
The use of the modular application lets very high
power be delivered to very low impedance loads.
The modular application implies one device to act
as a masterand the others as slaves.
The slave power stages are driven by the master
device and work in parallel all together, while the
input and the gain stages of the slave device are
disabled, the figure below shows the connections
required to configure two devices to work to-
gether.
The slave Mute and IN-pins must be grounded.
THE BOOTSTRAP CAPACITOR
For compatibility purpose with the previous de-
vices of the family, the boostrap capacitor can be
connectedboth between the bootstrappin (6) and
the output pin (14) or between the boostrap pin
(6) and the bootstraploader pin (12).
The master chip connections are the same as
the normal single ones.
The outputs can be connected together with-
out the need of any ballast resistance.
Figure 6: ModularApplication Circuit
+Vs
C7 100nF
C6 1000µF
R3 22K
MASTER
BUFFER
DRIVER
+Vs
+PWVs
13
C2
R2
7
11
22µF
680Ω
IN-
2
3
-
14
12
OUT
C1 470nF
IN+
C10
100nF
+
BOOT
LOADER
R1 22K
R7
2Ω
SGND
MUTE
STBY
4
C5
47µF
VMUTE
VSTBY
R5 10K
10
9
6
5
BOOTSTRAP
MUTE
THERMAL
SHUTDOWN
S/C
PROTECTION
CLIP DET
STBY
1
R4 22K
8
-Vs
15
STBY-GND
-PWVs
C4 10µF
C9 100nF
C8 1000µF
C3 10µF
-Vs
+Vs
C7 100nF
C6 1000µF
BUFFER
DRIVER
+Vs
+PWVs
13
7
11
IN-
2
3
-
14
12
OUT
IN+
+
BOOT
LOADER
SLAVE
SGND
MUTE
4
10
9
6
5
MUTE
BOOTSTRAP
THERMAL
SHUTDOWN
S/C
PROTECTION
STBY
STBY
1
8
-Vs
15
STBY-GND
-PWVs
C9 100nF
C8 1000µF
D97AU808C
-Vs
8/11
TDA7296S
Figure 7a: Modular Application P.C. Board and ComponentLayout (scale 1:1) (Component SIDE)
Figure 7b: Modular Application P.C. Board and ComponentLayout (scale 1:1) (Solder SIDE)
9/11
TDA7296S
mm
inch
DIM.
OUTLINE AND
MIN. TYP. MAX. MIN. TYP. MAX.
MECHANICAL DATA
A
B
5
0.197
0.104
0.063
2.65
1.6
C
D
1
0.039
E
0.49
0.66
1.02
0.55 0.019
0.75 0.026
0.022
0.030
F
G
1.27
1.52 0.040 0.050 0.060
G1
H1
H2
L
17.53 17.78 18.03 0.690 0.700 0.710
19.6
0.772
20.2
0.795
21.9
21.7
22.2
22.1
22.5 0.862 0.874 0.886
22.5 0.854 0.870 0.886
L1
L2
L3
L4
L7
M
17.65
18.1 0.695
0.713
17.25 17.5 17.75 0.679 0.689 0.699
10.3
2.65
4.25
4.63
1.9
10.7
10.9 0.406 0.421 0.429
2.9 0.104 0.114
4.55
5.08
4.85 0.167 0.179 0.191
5.53 0.182 0.200 0.218
M1
S
2.6
2.6
0.075
0.075
0.102
0.102
0.152
S1
Dia1
1.9
Multiwatt15 V
3.65
3.85 0.144
10/11
TDA7296S
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
2000 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -
Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
http://www.st.com
11/11
相关型号:
©2020 ICPDF网 联系我们和版权申明