TSX564AIYPT [STMICROELECTRONICS]
Micropower, wide bandwidth (900 kHz), 16 V CMOS operational amplifiers; 微功耗，高带宽（ 900千赫） ，16V CMOS运算放大器
| 型号： | TSX564AIYPT |
| 厂家： | 
ST |
| 描述： | Micropower, wide bandwidth (900 kHz), 16 V CMOS operational amplifiers |
| 文件： | 总27页 (文件大小：1362K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TSX561, TSX562, TSX564,
TSX561A, TSX562A, TSX564A
Micropower, wide bandwidth (900 kHz), 16 V CMOS
operational amplifiers
Datasheet - production data
Benefits
Single
• Power savings in power-conscious
applications
• Easy interfacing with high impedance sensors
Related products
SOT23-5
Dual
• See TSX63x series for reduced power
consumption (45 μA, 200 kHz)
• See TSX92x series for higher gain bandwidth
products (10 MHz)
Applications
DFN8 2x2
MiniSO8
• Industrial and automotive signal conditioning
• Active filtering
• Medical instrumentation
• High impedance sensors
Quad
Description
QFN16 3x3
TSSOP14
The TSX56x, TSX56xA series of operational
®
amplifiers benefits from STMicroelectronics 16 V
CMOS technology to offer state-of-the-art
accuracy and performance in the smallest
industrial packages. The TSX56x, TSX56xA have
pinouts compatible with industry standards and
offer an outstanding speed/power consumption
ratio, 900 kHz gain bandwidth product while
consuming only 250 µA at 16 V. Such features
make the TSX56x, TSX56xA ideal for sensor
interfaces and industrial signal conditioning. The
wide temperature range and high ESD tolerance
ease use in harsh automotive applications.
Features
• Low power consumption: 235 µA typ. at 5 V
• Supply voltage: 3 V to 16 V
• Gain bandwidth product: 900 kHz typ.
• Low offset voltage
– “A” version: 600 µV max.
– Standard version: 1 mV max.
• Low input bias current: 1 pA typ.
• High tolerance to ESD: 4 kV
• Wide temperature range: -40 to +125 °C
• Automotive qualification
Table 1.
Version
Device summary
Standard Vio
Enhanced Vio
Single
Dual
TSX561
TSX562
TSX564
TSX561A
TSX562A
TSX564A
• Tiny packages available
– SOT23-5
– DFN8 2 mm x 2 mm, MiniSO8
– QFN16 3 mm x 3 mm, TSSOP14
Quad
May 2013
DocID023274 Rev 3
1/27
This is information on a product in full production.
www.st.com
27
Contents
TSX56x, TSX56xA
Contents
1
2
3
4
Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1
4.2
4.3
4.4
4.5
4.6
Operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Input offset voltage drift over temperature . . . . . . . . . . . . . . . . . . . . . . . . 15
Long term input offset voltage drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
PCB layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.1
5.2
5.3
5.4
5.5
SOT23-5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
DFN8 2x2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
MiniSO8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
QFN16 3x3 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
TSSOP14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6
7
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2/27
DocID023274 Rev 3
TSX56x, TSX56xA
Pin connections
1
Pin connections
Figure 1. Pin connections for each package (top view)
Single
SOT23-5 (TSX561)
Dual
287ꢂ
,1ꢂꢁ
9&&ꢀ
287ꢃ
287ꢂ
,1ꢂꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢉ
9&&ꢀ
287ꢃ
,1ꢃꢁ
ꢈ
ꢇ
,1ꢂꢀ
9&&ꢁ
,1ꢂꢀ
,1ꢃꢁ
9&&ꢁ
,1ꢃꢀ
ꢆ
,1ꢃꢀ
DFN8 2x2 (TSX562)
MiniSO8 (TSX562)
Quad
ꢂꢇ
ꢂꢆ
ꢂꢅ
ꢂꢄ
ꢂ
ꢃ
ꢄ
ꢅ
ꢂꢃ
ꢂꢂ
ꢂꢊ
ꢋ
,1ꢂꢀ
9&&ꢀ
1&
,1ꢅꢀ
9&&ꢁ
1&
,1ꢃꢀ
,1ꢄꢀ
ꢆ
ꢇ
ꢈ
ꢉ
QFN16 3x3 (TSX564)
TSSOP14 (TSX564)
DocID023274 Rev 3
3/27
Absolute maximum ratings and operating conditions
TSX56x, TSX56xA
2
Absolute maximum ratings and operating conditions
Table 2. Absolute maximum ratings (AMR)
Parameter
Symbol
Value
Unit
VCC
Vid
Vin
Iin
Supply voltage(1)
18
±VCC
Differential input voltage(2)
Input voltage(3)
V
VCC- - 0.2 to VCC++ 0.2
10
Input current(4)
mA
°C
Tstg
Storage temperature
-65 to +150
Thermal resistance junction to ambient(5)(6)
SOT23-5
DFN8 2x2
MiniSO8
250
120
190
80
Rthja
QFN16 3x3
TSSOP14
°C/W
100
Thermal resistance junction to case
DFN8 2x2
Rthjc
33
30
QFN16 3x
Tj
Maximum junction temperature
HBM: human body model(7)
150
4
°C
kV
MM: machine model for TSX561(8)
MM: machine model for TSX562 and TSX564(8)
CDM: charged device model(9)
Latch-up immunity
200
100
1.5
200
ESD
V
kV
mA
1. All voltage values, except differential voltage, are with respect to network ground terminal.
2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal.
3. VCC - Vin must not exceed 18 V, Vin must not exceed 18 V.
4. Input current must be limited by a resistor in series with the inputs.
5. Short-circuits can cause excessive heating and destructive dissipation.
6. Rth are typical values.
7. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for
all couples of pin combinations with other pins floating.
8. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two
pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin
combinations with other pins floating.
9. Charged device model: all pins plus package are charged together to the specified voltage and then
discharged directly to ground.
Table 3. Operating conditions
Symbol
Parameter
Value
Unit
VCC
Vicm
Toper
Supply voltage
3 to 16
V
Common mode input voltage range
Operating free air temperature range
VCC- - 0.1 to VCC+ + 0.1
-40 to +125
°C
4/27
DocID023274 Rev 3
TSX56x, TSX56xA
Electrical characteristics
3
Electrical characteristics
Table 4. Electrical characteristics at V
= +3.3 V with V
= 0 V, V
= V /2, T
= 25 °C, and
CC+
CC-
icm
CC
amb
R =10 kΩ connected to V /2 (unless otherwise specified)
L
CC
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
TSX56xA, T = 25 °C
TSX56xA, -40 °C < T < 125 °C
TSX56x, T = 25 °C
TSX56x, -40 °C < T < 125 °C
-40 °C < T < 125 °C(1)
T = 25 °C
600
μV
1800
1
Vio
Offset voltage
mV
2.2
ΔVio/ΔT Input offset voltage drift
2
1
12
μV/°C
100(2)
200(2)
100(2)
200(2)
Input offset current
(Vout = VCC/2)
Iio
-40 °C < T < 125 °C
T = 25 °C
1
pA
1
Input bias current
(Vout = VCC/2)
Iib
-40 °C < T < 125 °C
T = 25 °C
1
Common mode rejection ratio
CMR = 20 log (ΔVic/ΔVio)
(Vic = -0.1 V to VCC-1.5 V,
63
59
47
45
80
CMR1
-40 °C < T < 125 °C
T = 25 °C
Vout = VCC/2, RL > 1 MΩ)
Common mode rejection ratio
CMR = 20 log (ΔVic/ΔVio)
(Vic = -0.1 V to VCC+0.1 V,
66
dB
CMR2
-40 °C < T < 125 °C
Vout = VCC/2, RL > 1 MΩ)
Large signal voltage gain
(Vout = 0.5 V to (VCC - 0.5 V),
RL > 1 MΩ)
T = 25 °C
85
83
Avd
-40 °C < T < 125 °C
T = 25 °C
70
100
70
High level output voltage
VOH
(VOH = VCC - Vout
)
-40 °C < T < 125 °C
T = 25 °C
mV
VOL
Low level output voltage
-40 °C < T < 125 °C
T = 25 °C
100
4.3
2.5
3.3
2.5
5.3
4.3
220
Isink (Vout = VCC
)
-40 °C < T < 125 °C
T = 25 °C
Iout
mA
µA
Isource (Vout = 0 V)
-40 °C < T < 125 °C
T = 25 °C
Supply current
(per channel, Vout = VCC/2,
RL > 1 MΩ)
300
350
ICC
-40 °C < T < 125 °C
DocID023274 Rev 3
5/27
Electrical characteristics
TSX56x, TSX56xA
Table 4. Electrical characteristics at V
= +3.3 V with V
= 0 V, V
= V /2, T
= 25 °C, and
CC+
CC-
icm
CC
amb
R =10 kΩ connected to V /2 (unless otherwise specified) (continued)
L
CC
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
AC performance
GBP
Fu
Gain bandwidth product
Unity gain frequency
Phase margin
600
800
690
55
kHz
RL = 10 kΩ, CL = 100 pF
Φm
Degree
dB
Gm
Gain margin
9
RL = 10 kΩ, CL = 100 pF,
SR
∫ en
en
Slew rate
1
V/μs
Vout = 0.5 V to VCC - 0.5 V
Low-frequency peak-to-peak
input noise
Bandwidth: f = 0.1 to 10 Hz
16
µVpp
Equivalent input noise voltage
density
f = 1 kHz
f = 10 kHz
55
29
nV
-----------
Hz
Follower configuration,
f
in = 1 kHz,
THD+N Total harmonic distortion + noise RL = 100 kΩ,
Vicm = (VCC -1.5 V)/2,
0.004
%
BW = 22 kHz, Vout = 1 Vpp
1. See Section 4.3: Input offset voltage drift over temperature on page 15.
2. Guaranteed by design.
6/27
DocID023274 Rev 3
TSX56x, TSX56xA
Electrical characteristics
Table 5. Electrical characteristics at V
= +5 V with V
= 0 V, V
= V /2, T
= 25 °C, and
CC+
CC-
icm
CC
amb
R = 10 kΩ connected to V /2 (unless otherwise specified)
L
CC
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
TSX56xA, T = 25 °C
600
μV
TSX56xA, -40 °C < T < 125 °C
TSX56x, T = 25 °C
1800
1
Vio
Offset voltage
mV
TSX56x, -40 °C < T < 125 °C
-40 °C < T < 125 °C(1)
2.2
12
ΔVio/ΔT Input offset voltage drift
2
5
μV/°C
nV
Long-term input offset voltage
drift
--------------------------
ΔVio
T = 25 °C(2)
month
T = 25 °C
1
1
100(3)
200(3)
100(3)
200(3)
Input offset current
(Vout = VCC/2)
Iio
-40 °C < T < 125 °C
T = 25 °C
pA
1
Input bias current
(Vout = VCC/2)
Iib
-40 °C < T < 125 °C
1
Common mode rejection ratio T = 25 °C
66
63
50
47
84
CMR = 20 log (ΔVic/ΔVio)
(Vic = -0.1 V to VCC - 1.5 V,
Vout = VCC/2, RL > 1 MΩ)
CMR1
-40 °C < T < 125 °C
Common mode rejection ratio T = 25 °C
CMR = 20 log (ΔVic/ΔVio)
69
dB
CMR2
Avd
(Vic = -0.1 V to VCC + 0.1 V,
Vout = VCC/2, RL > 1 MΩ)
-40 °C < T < 125 °C
Large signal voltage gain
(Vout = 0.5 V to (VCC - 0.5 V),
RL > 1 MΩ)
T = 25 °C
85
83
-40 °C < T < 125 °C
High level output voltage
RL = 10 kΩ, T = 25 °C
70
100
VOH
VOL
(VOH = VCC - Vout
)
RL = 10 kΩ, -40 °C < T < 125 °C
mV
RL = 10 kΩ, T = 25 °C
RL = 10 kΩ, -40 °C < T < 125 °C
70
100
Low level output voltage
Isink
Vout = VCC, T = 25 °C
Vout = VCC, -40 °C < T < 125 °C
Vout = 0 V, T = 25 °C
11
8
14
12
Iout
mA
µA
9
Isource
Vout = 0 V, -40 °C < T < 125 °C
T = 25 °C
7
Supply current
(per channel, Vout = VCC/2,
RL > 1 MΩ)
235
350
400
ICC
-40 °C < T < 125 °C
DocID023274 Rev 3
7/27
Electrical characteristics
TSX56x, TSX56xA
Table 5. Electrical characteristics at V
= +5 V with V
= 0 V, V
= V /2, T
= 25 °C, and
CC+
CC-
icm
CC
amb
R = 10 kΩ connected to V /2 (unless otherwise specified) (continued)
L
CC
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
AC performance
GBP
Fu
Gain bandwidth product
Unity gain frequency
Phase margin
700
850
730
55
kHz
RL = 10 kΩ, CL = 100 pF
Φm
Degree
dB
Gm
Gain margin
9
RL = 10 kΩ, CL = 100 pF,
SR
∫ en
en
Slew rate
1.1
15
V/μs
Vout = 0.5 V to VCC - 0.5 V
Low-frequency peak-to-peak
input noise
Bandwidth: f = 0.1 to 10 Hz
µVpp
Equivalent input noise voltage f = 1 kHz
55
29
nV
-----------
density
f = 10 kHz
Hz
Follower configuration,
fin = 1 kHz,
RL = 100 kΩ, Vicm = (VCC - 1.5 V)/2,
BW = 22 kHz, Vout = 2 Vpp
Total harmonic distortion +
noise
THD+N
0.002
%
1. See Section 4.3: Input offset voltage drift over temperature on page 15.
2. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
3. Guaranteed by design.
8/27
DocID023274 Rev 3
TSX56x, TSX56xA
Electrical characteristics
Table 6. Electrical characteristics at V
= +16 V with V
= 0 V, V
= V /2, T
= 25 °C, and
CC+
CC-
icm
CC
amb
R = 10 kΩ connected to V /2 (unless otherwise specified)
L
CC
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
DC performance
TSX56xA, T = 25 °C
600
μV
TSX56xA, -40 °C < T < 125 °C
TSX56x, T = 25 °C
1800
1
Vio
Offset voltage
mV
TSX56x, -40 °C < T < 125 °C
-40 °C < T < 125 °C(1)
2.2
12
ΔVio/ΔT Input offset voltage drift
2
μV/°C
μV
month
Long-term input offset voltage
drift
T = 25 °C(2)
1.6
--------------------------
ΔVio
T = 25 °C
1
1
100(3)
200(3)
100(3)
200(3)
Input offset current
(Vout = VCC/2)
Iio
-40 °C < T < 125 °C
T = 25 °C
pA
1
Input bias current
(Vout = VCC/2)
Iib
-40 °C < T < 125 °C
1
Common mode rejection ratio T = 25 °C
CMR = 20 log (ΔVic/ΔVio)
76
72
60
56
76
72
95
CMR1
CMR2
(Vic = -0.1 V to VCC - 1.5 V,
-40 °C < T < 125 °C
Vout = VCC/2, RL > 1 MΩ)
Common mode rejection ratio T = 25 °C
CMR = 20 log (ΔVic/ΔVio)
78
90
(Vic = -0.1 V to VCC + 0.1 V,
Vout = VCC/2, RL > 1 MΩ)
-40 °C < T < 125 °C
dB
Common mode rejection ratio T = 25 °C
20 log (ΔVCC/ΔVio)
SVR
Avd
(VCC = 3 V to 16 V,
Vout = Vicm = VCC/2)
-40 °C < T < 125 °C
Large signal voltage gain
(Vout = 0.5 V to (VCC - 0.5 V),
RL > 1 MΩ)
T = 25 °C
85
83
-40 °C < T < 125 °C
High level output voltage
RL = 10 kΩ, T = 25 °C
70
100
VOH
VOL
(VOH = VCC - Vout
)
RL = 10 kΩ, -40 °C < T < 125 °C
mV
RL = 10 kΩ, T = 25 °C
RL = 10 kΩ, -40 °C < T < 125 °C
70
100
Low level output voltage
Isink
Vout = VCC, T = 25 °C
40
35
30
25
92
90
Vout = VCC, -40 °C < T < 125 °C
Iout
mA
µA
Vout = 0 V, T = 25 °C
Vout = 0 V, -40 °C < T < 125 °C
T = 25 °C
Isource
Supply current
(per channel, Vout = VCC/2,
RL > 1 MΩ)
250
360
400
ICC
-40 °C < T < 125 °C
DocID023274 Rev 3
9/27
Electrical characteristics
TSX56x, TSX56xA
Table 6. Electrical characteristics at V
= +16 V with V
= 0 V, V
= V /2, T
= 25 °C, and
CC+
CC-
icm
CC
amb
R = 10 kΩ connected to V /2 (unless otherwise specified) (continued)
L
CC
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
AC performance
GBP Gain bandwidth product
750
900
750
55
kHz
Fu
Φm
Gm
Unity gain frequency
Phase margin
RL = 10 kΩ, CL = 100 pF
Degree
dB
Gain margin
9
RL = 10 kΩ, CL = 100 pF,
SR
∫ en
en
Slew rate
1.1
15
V/μs
Vout = 0.5 V to VCC - 0.5 V
Low-frequency peak-to-peak
input noise
Bandwidth: f = 0.1 to 10 Hz
µVpp
Equivalent input noise voltage f = 1 kHz
48
27
nV
-----------
density
f = 10 kHz
Hz
Follower configuration, fin = 1 kHz,
RL = 100 kΩ, Vicm = (VCC - 1.5 V)/2,
BW = 22 kHz, Vout = 5 Vpp
Total harmonic distortion +
noise
THD+N
0.0005
%
1. See Section 4.3: Input offset voltage drift over temperature on page 15.
2. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and
assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration.
3. Guaranteed by design.
10/27
DocID023274 Rev 3
TSX56x, TSX56xA
Electrical characteristics
Figure 2. Supply current vs. supply voltage at
Figure 3. Input offset voltage distribution
V
= V /2
at V = 16 V and V
= 8 V
icm
CC
CC
icm
Figure 4. Input offset voltage temperature
coefficient distribution at V = 16 V, V = 8 V
Figure 5. Input offset voltage vs. input common
mode voltage at V = 12 V
CC
icm
CC
Figure 6. Input offset voltage vs. temperature at V = 16 V
CC
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DocID023274 Rev 3
11/27
Electrical characteristics
TSX56x, TSX56xA
Figure 7. Output current vs. output voltage
Figure 8. Output current vs. output voltage
at V = 3.3 V
at V = 5 V
CC
CC
Figure 9. Output current vs. output voltage
Figure 10. Bode diagram at V
= 3.3 V
CC
at V = 16 V
CC
Figure 11. Bode diagram at V
= 5 V
Figure 12. Bode diagram at V
= 16 V
CC
CC
12/27
DocID023274 Rev 3
TSX56x, TSX56xA
Electrical characteristics
Figure 13. Phase margin vs. capacitive load Figure 14. GBP vs. input common mode voltage
at V = 12 V
at V = 12 V
CC
CC
Figure 15. A vs. input common mode voltage
Figure 16. Slew rate vs. supply voltage
vd
at V = 12 V
CC
Figure 17. Noise vs. frequency at V = 3.3 V
Figure 18. Noise vs. frequency at V = 5 V
CC
CC
DocID023274 Rev 3
13/27
Electrical characteristics
TSX56x, TSX56xA
Figure 19. Noise vs. frequency at V = 16 V Figure 20. Distortion + noise vs. output voltage
CC
amplitude
Figure 21. Distortion + noise vs. amplitude
at V = V /2 and V = 12 V
Figure 22. Distortion + noise vs. frequency
icm
CC
CC
14/27
DocID023274 Rev 3
TSX56x, TSX56xA
Application information
4
Application information
4.1
Operating voltages
The amplifiers of the TSX56x and TSX56xA series can operate from 3 V to 16 V. Their
parameters are fully specified at 3.3 V, 5 V and 16 V power supplies. However, the
parameters are very stable in the full V range. Additionally, the main specifications are
CC
guaranteed in extended temperature ranges from -40 to +125 ° C.
4.2
Rail-to-rail input
The TSX56x and TSX56xA devices are built with two complementary PMOS and NMOS
input differential pairs. The devices have a rail-to-rail input, and the input common mode
range is extended from V
- 0.1 V to V
+ 0.1 V.
CC-
CC+
However, the performance of these devices is clearly optimized for the PMOS differential
pairs (which means from V - 0.1 V to V - 1.5 V).
CC-
CC+
Beyond V
- 1.5 V, the operational amplifiers are still functional but with degraded
CC+
performance, as can be observed in the electrical characteristics section of this datasheet
(mainly V and GBP). These performances are suitable for a number of applications
io
needing to be rail-to-rail.
The devices are designed to prevent phase reversal.
4.3
Input offset voltage drift over temperature
The maximum input voltage drift over the temperature variation is defined as the offset
variation related to the offset value measured at 25 °C. The operational amplifier is one of
the main circuits of the signal conditioning chain, and the amplifier input offset is a major
contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated
during production at application level. The maximum input voltage drift over temperature
enables the system designer to anticipate the effects of temperature variations.
The maximum input voltage drift over temperature is computed in Equation 1.
Equation 1
ΔVio
Vio(T) – Vio(25° C)
----------- = max
ΔT
--------------------------------------------------
T – 25° C
with T = -40 °C and 125 °C.
The datasheet maximum value is guaranteed by measurement on a representative sample
size ensuring a C (process capability index) greater than 2.
pk
DocID023274 Rev 3
15/27
Application information
TSX56x, TSX56xA
4.4
Long term input offset voltage drift
To evaluate product reliability, two types of stress acceleration are used:
•
•
Voltage acceleration, by changing the applied voltage
Temperature acceleration, by changing the die temperature (below the maximum
junction temperature allowed by the technology) with the ambient temperature.
The voltage acceleration has been defined based on JEDEC results, and is defined using
Equation 2.
Equation 2
(VS – VU)
AFV = eβ ⋅
Where:
A
is the voltage acceleration factor
FV
β is the voltage acceleration constant in 1/V, constant technology parameter (β = 1)
V is the stress voltage used for the accelerated test
S
V is the voltage used for the application
U
The temperature acceleration is driven by the Arrhenius model, and is defined in Equation 3.
Equation 3
Ea
------ ⋅ ------ – ------
1
1
⎛
⎞
⎠
⎝
AFT = e k
TU TS
Where:
A
is the temperature acceleration factor
FT
E is the activation energy of the technology based on the failure rate
a
-5
-1
k is the Boltzmann constant (8.6173 x 10 eV.K )
T is the temperature of the die when V is used (K)
U
U
T is the temperature of the die under temperature stress (K)
S
The final acceleration factor, A , is the multiplication of the voltage acceleration factor and
F
the temperature acceleration factor (Equation 4).
Equation 4
AF = AFT × AFV
A is calculated using the temperature and voltage defined in the mission profile of the
F
product. The A value can then be used in Equation 5 to calculate the number of months of
F
use equivalent to 1000 hours of reliable stress duration.
16/27
DocID023274 Rev 3
TSX56x, TSX56xA
Application information
Equation 5
Months = AF × 1000 h × 12 months ⁄ (24 h × 365.25 days)
To evaluate the op-amp reliability, a follower stress condition is used where V is defined
CC
as a function of the maximum operating voltage and the absolute maximum rating (as
recommended by JEDEC rules).
The V drift (in µV) of the product after 1000 h of stress is tracked with parameters at
io
different measurement conditions (see Equation 6).
Equation 6
VCC = maxVop with Vicm = VCC ⁄ 2
The long term drift parameter (ΔV ), estimating the reliability performance of the product, is
io
obtained using the ratio of the V (input offset voltage value) drift over the square root of the
io
calculated number of months (Equation 7).
Equation 7
Viodrift
ΔVio = -----------------------------
(months)
where V drift is the measured drift value in the specified test conditions after 1000 h stress
io
duration.
4.5
4.6
PCB layouts
For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible
to the power supply pins.
Macromodel
Accurate macromodels of the TSX56x, TSX56xA devices are available on the
STMicroelectronics’ website at www.st.com. These models are a trade-off between
accuracy and complexity (that is, time simulation) of the TSX56x and TSX56xA operational
amplifiers. They emulate the nominal performance of a typical device within the specified
operating conditions mentioned in the datasheet. They also help to validate a design
approach and to select the right operational amplifier, but they do not replace on-board
measurements.
DocID023274 Rev 3
17/27
Package information
TSX56x, TSX56xA
5
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
18/27
DocID023274 Rev 3
TSX56x, TSX56xA
Package information
5.1
SOT23-5 package information
Figure 23. SOT23-5 package mechanical drawing
Table 7. SOT23-5 package mechanical data
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
A1
A2
B
0.90
1.20
1.45
0.15
1.30
0.50
0.20
3.00
0.035
0.047
0.057
0.006
0.051
0.019
0.008
0.118
0.90
0.35
0.09
2.80
1.05
0.40
0.15
2.90
1.90
0.95
2.80
1.60
0.35
0.035
0.013
0.003
0.110
0.041
0.015
0.006
0.114
0.075
0.037
0.110
0.063
0.013
C
D
D1
e
E
2.60
1.50
0.10
0 °
3.00
1.75
0.60
10 °
0.102
0.059
0.004
0 °
0.118
0.069
0.023
10 °
F
L
K
DocID023274 Rev 3
19/27
Package information
TSX56x, TSX56xA
5.2
DFN8 2x2 package information
Figure 24. DFN8 2x2 package mechanical drawing
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Table 8. DFN8 2x2 package mechanical data
Dimensions
Ref.
Millimeters
Typ.
Inches
Typ.
Min.
Max.
Min.
Max.
A
A1
b
0.70
0.00
0.15
0.75
0.02
0.20
2.00
2.00
0.50
0.55
8
0.80
0.05
0.25
0.028
0.000
0.006
0.030
0.001
0.008
0.079
0.079
0.020
0.022
8
0.031
0.002
0.010
D
E
e
L
0.045
0.65
0.018
0.026
N
20/27
DocID023274 Rev 3
TSX56x, TSX56xA
Package information
5.3
MiniSO8 package information
Figure 25. MiniSO8 package mechanical drawing
Table 9. MiniSO8 package mechanical data
Dimensions
Symbol
Millimeters
Inches
Typ.
Min.
Typ.
Max.
Min.
Max.
A
A1
A2
b
1.10
0.15
0.95
0.40
0.23
3.20
5.15
3.10
0.043
0.006
0.037
0.016
0.009
0.126
0.203
0.122
0
0
0.75
0.22
0.08
2.80
4.65
2.80
0.85
0.030
0.009
0.003
0.11
0.033
c
D
3.00
4.90
3.00
0.65
0.60
0.95
0.25
0.118
0.193
0.118
0.026
0.024
0.037
0.010
E
0.183
0.11
E1
e
L
0.40
0°
0.80
0.016
0°
0.031
L1
L2
k
8°
8°
ccc
0.10
0.004
DocID023274 Rev 3
21/27
ꢌ,1'(;ꢌ$5($
Package information
TSX56x, TSX56xA
5.4
QFN16 3x3 package information
Figure 26. QFN16 3x3 package mechanical drawing
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22/27
DocID023274 Rev 3
TSX56x, TSX56xA
Package information
Table 10. QFN16 3x3 package mechanical data
Dimensions
Ref.
Millimeters
Typ.
Inches
Typ.
Min.
Max.
Min.
Max.
A
A1
b
0.50
0
0.65
0.05
0.30
0.020
0
0.026
0.002
0.012
0.18
0.25
3.00
3.00
0.50
0.007
0.010
0.118
0.118
0.020
D
E
e
L
0.30
0.50
0.15
0.10
0.10
0.05
0.08
0.012
0.020
0.006
0.004
0.004
0.002
0.003
aaa
bbb
ccc
ddd
eee
DocID023274 Rev 3
23/27
Package information
TSX56x, TSX56xA
5.5
TSSOP14 package information
Figure 27. TSSOP14 package mechanical drawing
Table 11. TSSOP14 package mechanical data
Dimensions
Symbol
Millimeters
Typ.
Inches
Typ.
Min.
Max.
Min.
Max.
A
A1
A2
b
1.20
0.15
1.05
0.30
0.20
5.10
6.60
4.50
0.047
0.006
0.041
0.012
0.0089
0.201
0.260
0.176
0.05
0.80
0.19
0.09
4.90
6.20
4.30
0.002
0.031
0.007
0.004
0.193
0.244
0.169
0.004
0.039
1.00
c
D
5.00
6.40
4.40
0.65
0.60
1.00
0.197
0.252
E
E1
e
0.173
0.0256 BSC
L
0.45
0°
0.75
L1
k
8°
0°
8°
aaa
0.10
0.018
0.024
0.030
24/27
DocID023274 Rev 3
TSX56x, TSX56xA
Ordering information
6
Ordering information
Table 12. Order codes
Channel
Order code
Temperature range
Package
Packaging
Marking
number
TSX561ILT
1
2
2
4
4
1
2
4
1
2
4
1
2
4
SOT23-5
DFN8 2 x 2
MiniSO8
TSX562IQ2T
TSX562IST
K23
-40 to 125 °C
TSX564IQ4T
TSX564IPT
QFN16 3 x 3
TSSOP14
SOT23-5
MiniSO8
TSX564I
K116
TSX561IYLT
TSX562IYST
TSX564IYPT
TSX561AILT
TSX562AIST
TSX564AIPT
TSX561AIYLT
TSX562AIYST
TSX564AIYPT
-40 to 125 °C
automotive grade(1)
Tape and reel
TSSOP14
SOT23-5
MiniSO8
TSX564IY
K117
-40 to 125 °C
TSSOP14
SOT23-5
MiniSO8
TSX564AI
K118
-40 to 125 °C
automotive grade(1)
TSSOP14
TSX564AIY
1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC
Q001 and Q 002 or equivalent are ongoing.
DocID023274 Rev 3
25/27
Revision history
TSX56x, TSX56xA
7
Revision history
Table 13. Document revision history
Changes
Date
Revision
06-Jun-2012
1
Initial release.
Added TSX562, TSX564, TSX562A, and TSX564A devices.
Updated Features, Description, Figure 1, Table 1 (added DFN8,
MiniSO8, QFN16, and TSSOP14 package).
Updated Table 1 (updated ESD MM values).
18-Sep-2012
2
Updated Table 4 and Table 5 (added footnotes), Section 5 (added
Figure 24 to Figure 27 and Table 8 to Table 11), Table 12 (added dual
and quad devices).
Minor corrections throughout document.
Replaced the silhouette, pinout, package diagram, and mechanical
data of the DFN8 2x2 and QFN16 3x3 packages.
Added Benefits and Related products.
Table 1: updated Rthja values and added Rthjc values for DFN8 2x2 and
QFN16 3x3.
23-May-2013
3
Updated Section 4.3, Section 4.4, and Section 4.6
Replaced Figure 23: SOT23-5 package mechanical drawing and
Table 7: SOT23-5 package mechanical data.
26/27
DocID023274 Rev 3
TSX56x, TSX56xA
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