UC2844 [STMICROELECTRONICS]

CURRENTMODE PWM CONTROLLER; CURRENTMODE PWM控制器


型号：	UC2844
厂家：	ST
描述：	CURRENTMODE PWM CONTROLLER CURRENTMODE PWM控制器控制器
文件：	总11页 (文件大小：99K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

UC2842/3/4/5

UC3842/3/4/5

CURRENT MODE PWM CONTROLLER

OPTIMIZED FOR OFF-LINE AND DC TO DC

CONVERTERS

LOW START-UP CURRENT (< 1 mA)

AUTOMATIC FEED FORWARD COMPENSA-

TION

PULSE-BY-PULSECURRENT LIMITING

ENHANCED LOAD RESPONSE CHARAC-

TERISTICS

UNDER-VOLTAGELOCKOUTWITHHYSTER-

ESIS

DOUBLE PULSE SUPPRESSION

HIGH CURRENT TOTEM POLE OUTPUT

INTERNALLY TRIMMED BANDGAP REFER-

ENCE

SO14

Minidip

logicto insure latchedoperation,a PWM compara-

torwhichalsoprovidescurrentlimitcontrol,andato-

tem pole output stage designed to source or sink

high peak current. The output stage, suitable for

drivingN-ChannelMOSFETs,islow intheoff-state.

500 KHz OPERATION

LOW R ERRORAMP

Differencesbetweenmembersof this familyarethe

under-voltage lockout thresholds and maximum

duty cycle ranges. The UC3842 and UC3844 have

UVLO thresholds of 16V (on) and 10V (off), ideally

suited off-line applications The corresponding

thresholds for the UC3843 and UC3845 are 8.5 V

and 7.9 V. The UC3842 and UC3843 can operate

to duty cycles approaching 100%. A range of the

zero to < 50 % is obtained by the UC3844 and

UC3845by theadditionof aninternaltoggleflip flop

which blanksthe outputoff every otherclock cycle.

DESCRIPTION

TheUC3842/3/4/5family ofcontrolICsprovidesthe

necessary features to implement off-line or DC to

DC fixed frequency current mode controlschemes

witha minimalexternalpartscount.Internallyimple-

mentedcircuitsincludeundervoltagelockoutfeatur-

ing start-up current less than 1 mA, a precisionref-

erencetrimmed foraccuracyat theerroramp input,

BLOCK DIAGRAM (toggle flip flop used only in U3844 and UC3845)

1/11

October 1998

UC2842/3/4/5-UC3842/3/4/5

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

V_i

Supply Voltage (low impedance source)

Supply Voltage (Ii < 30mA)

Self Limiting

I_O

Output Current

E_O

Output Energy (capacitive load)

Analog Inputs (pins 2, 3)

– 0.3 to 6.3

Error Amplifier Output Sink Current

Power Dissipation at T_amb≤ 50 °C (minidip, DIP-14)

Power Dissipation at Tamb ≤ 25 °C (SO14)

Storage Temperature Range

P_tot

T_stg

T_L

725

– 65 to 150

300

°C

Lead Temperature (soldering 10s)

All voltages are withrespect to pin 5, all currents are positive into the specified terminal.

PIN CONNECTIONS (top views)

SO14

Minidip

ORDERING NUMBERS

Type

Minidip

SO14

UC2842

UC3843

UC2844

UC2845

UC2842N

UC2843N

UC2844N

UC2845N

UC2842D

UC2843D

UC2844D

UC2845D

UC3842

UC3843

UC3844

UC3845

UC3842N

UC3843N

UC3844N

UC3845N

UC3842D

UC3843D

UC3844D

UC3845D

THERMAL DATA

Symbol

Description

Thermal Resistance Junction-ambient.

Minidip

SO14

Unit

R_thj-amb

max.

100

165

2/11

UC2842/3/4/5-UC3842/3/4/5

ELECTRICAL CHARACTERISTICS

(Unless otherwise stated,these specifications apply for -25 < T_amb

85°C for UC2824X;0 < T_amb< 70°C for UC384X; V_i=15V (note 5); R_T= 10K; C_T= 3.3nF)

UC284X

UC384X

Symbol

Parameter

Test Conditions

Unit

Min. Typ. Max. Min. Typ. Max.

REFERENCE SECTION

V_REF

Output Voltage

Line Regulation

4.95 5.00 5.05 4.90 5.00 5.10

T = 25 C I = 1mA

12V

25V

∆

≤

REF

Load Regulation

20mA

≤

∆

≤

Temperature Stability

Total Output Variant

Output Noise Voltage

(Note 2)

0.2 0.4

5.1 4.82

0.2

0.4

5.18

∆V_REF/∆T

mV/°C

Line, Load, Temperature (2) 4.9

e_N

10Hz ≤ f ≤ 10KHz T_j= 25°C

µV

(2)

Long Term Stability

Output Short Circuit

T_amb= 125 C, 1000Hrs (2)

I_SC

-30 -100 -180 -30 -100 -180 mA

OSCILLATOR SECTION

f_s

Initial Accuracy

Voltage Stability

Temperature Stability

Amplitude

0.2

KHz

T = 25 C (6)

25V

≤

T_MIN

T_MAX(2)

≤

amb

V₄

V_PIN4Peak to Peak

ERROR AMP SECTION

V_PIN1= 2.5V

1.7

V₂

I_b

Input Voltage

Input Bias Current

A_VOL

2.45 2.50 2.55 2.42 2.50 2.58

-0.3

-1

-0.3

-2

0.7

MHz

≤

SVR

I_o

Unity Gain Bandwidth

Supply Voltage Rejection

Output Sink Current

Output Source Current

V_OUTHigh

(2)

12V

25V

≤

V_PIN2= 2.7V V_PIN1= 1.1V

V_PIN2= 2.3V V_PIN1= 5V

V_PIN2= 2.3V;

I_o

-0.5 -0.8

R = 15K to Ground

Ω

_OUTLow

V_PIN2= 2.7V;

0.7 1.1

0.7

1.1

R = 15K to Pin 8

Ω

CURRENT SENSE SECTION

G_V

V₃

Gain

(3 & 4)

2.85

0.9

3.15 2.8

3.2

1.1

V/V

Maximum Input Signal

Supply Voltage Rejection

Input Bias Current

V_PIN1= 5V (3)

1.1

0.9

SVR

I_b

-2

25V (3)

≤

-10

Delay to Output

150 300

OUTPUT SECTION

I_SINK= 20mA

I_OL

Output Low Level

Output High Level

0.1 0.4

1.5 2.2

0.1

1.5

0.4

2.2

I_SINK= 200mA

I_OH

ISOURCE = 20mA

13 13.5

12 13.5

13 13.5

12 13.5

_SOURCE= 200mA

t_r

t_f

Rise Time

Fall Time

150

T = 25 C C_L= 1nF (2)

T_j= 25°C C_L= 1nF (2)

3/11

UC2842/3/4/5-UC3842/3/4/5

ELECTRICAL CHARACTERISTICS

(continued)

UC284X

Min. Typ. Max. Min. Typ. Max.

UNDER-VOLTAGE LOCKOUT SECTION

UC384X

Symbol

Parameter

Test Conditions

Unit

Start Threshold

X842/4

X843/5

7.8

8.4 9.0

10 11

7.6 8.2

17 14.5 16 17.5

7.8 8.4

8.5 10 11.5

7.0 7.6

Min Operating Voltage

After Turn-on

X842/4

X843/5

7.0

8.2

PWM SECTION

X842/3

Maximum Duty Cycle

Minimum Duty Cycle

100

X844/5

TOTAL STANDBY CURRENT

I_st

I_i

Start-up Current

Operating Supply Current

Zener Voltage

0.5

V_PIN2= V_PIN3= 0V

I_i= 25mA

V_iz

Notes : 2. These parameters, although guaranteed, are not 100% tested in production.

3. Parameter measured at trip point of latch with V_PIN2= 0.

4. Gaindefined as :

∆ V_PIN1

A =

; 0

PIN3

0.8 V

≤

∆ V_PIN3

5. Adjust V_iabove the startthreshold before setting at 15 V.

6. Outputfrequency equals oscillator frequency for the UC3842 and UC3843.

Outputfrequency is one halfoscillator frequency for the UC3844 and UC3845.

4/11

UC2842/3/4/5-UC3842/3/4/5

Figure 1 : ErrorAmp Configuration.

Error amp can source or

sink up to 0.5mA

Figure 2 : UnderVoltage Lockout.

During Under-Voltage Lockout, the output driver is

biased to sink minor amounts of current. Pin 6

shouldbe shuntedto groundwitha bleederresistor

to preventactivating the powerswitchwith extrane-

ous leakage currents.

Figure 3 :

Current SenseCircuit .

Peak current (i_s) is determinedby the formula

1.0 V

I_{S max}

≈

R_S

A small RC filter may be required to suppress switch transients.

5/11

UC2842/3/4/5-UC3842/3/4/5

Figure 4.

Figure 5 : Deadtimevs. C_T(R_T> 5KΩ).

1.72

for R_T> 5KΩ f =

R_TC_T

Figure 6 : Timing Resistancevs. Frequency.

Figure 7 : OutputSaturationCharacteristics.

Figure 8 :

Error Amplifier Open-loop Frequency

Response.

6/11

UC2842/3/4/5-UC3842/3/4/5

Figure 9 : OpenLoop Test Circuit.

Highpeakcurrentsassociatedwith capacitiveloads

necessitate careful grounding techniques. Timing

and bypass capacitors should be connectedclose

to pin 5 in a singlepoint ground.The transistorand

5 KΩ potentiometerareusedtosampletheoscillator

waveformand apply an adjustableramp to pin 3.

Figure 10 : ShutdownTechniques.

Shutdownof the UC2842 can be accomplished by

two methods; eitherraise pin3 above1V orpull pin

1 below a voltage two diode drops above ground.

Either method cause the output of the PWM com-

parator to be high (refer to block diagram). The

PWM latch is reset dominant so that the output will

remain low until the next clock cycle after the shut-

downconditionatpins1 and/or3is removed.Inone

example, an externally latched shutdown may be

accomplishedby addingan SCR whichwillbe reset

bycyclingV_ibelowthelowerUVLOthreshold.Atthis

pointthe referenceturnsoff,allowingtheSCRtore-

set.

7/11

UC2842/3/4/5-UC3842/3/4/5

Figure 11 : Off-line Flyback Regulator.

Power Supply Specifications

1. InputVoltage :

95 VAC to 130 VAC

(50 Hz/60 Hz)

5. OutputVoltage:

A. + 5 V, ± 5 % : 1 A to 4 A load

Ripple voltage: 50 mV P-P Max.

B. + 12 V, ± 3 % : 0.1 A to 0.3 A load

Ripple voltage: 100 mV P-P Max.

C. – 12 V, ± 3 % : 0.1 A to 0.3 A load

Ripple voltage: 100 mV P-P Max.

2. Line Isolation :

3750V

3. Switching Frequency: 40 KHz

4. Efficiency@ Full Load : 70 %

Figure 12 : SlopeCompensation.

A fraction of the oscillator ramp can be resistively

summed with the current sense signal to provide

slope compensation for converters requiring duty

cycles over 50 %.

Note that capacitor, C, forms a filter with R₂to su-

pressthe leadingedge switch spikes.

8/11

UC2842/3/4/5-UC3842/3/4/5

inch

DIM.

OUTLINE AND

MECHANICAL DATA

MIN.. TYP. MAX.. MIN.. TYP.. MAX..

1.75

0.069

0.009

0.063

0.018

0.010

0.1

0.25 0.004

1.6

0.35

0.19

0.46 0.014

0.25 0.007

0.5

0.020

45° (typ.)

D (1) 8.55

8.75 0.336

0.344

0.244

5.8

6.2

0.228

1.27

7.62

0.050

0.300

F (1)

3.8

4.6

0.4

0.150

0.181

0.157

0.209

0.050

0.027

5.3

1.27 0.016

0.68

SO14

8° (max.)

(1) D and F do not include mold flash or protrusions. Mold flash or

potrusions shall not exceed 0.15mm (.006inch).

9/11

UC2842/3/4/5-UC3842/3/4/5

inch

DIM.

OUTLINE AND

MECHANICAL DATA

MIN. TYP. MAX. MIN. TYP. MAX.

3.3

0.130

0.7

0.028

1.65 0.055

1.04 0.036

1.39

0.91

0.065

0.041

0.5

0.020

0.38

0.5

9.8

0.015

0.020

0.386

8.8

0.346

0.100

0.300

2.54

7.62

7.1

4.8

0.280

0.189

3.3

0.130

Minidip 0.300”

0.44

1.6

0.017

0.063

10/11

UC2842/3/4/5-UC3842/3/4/5

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the conse-

quences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No

license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this

publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMi-

croelectronics products are not authorized for use as critical components in life support devices or systems without express written

approval of STMicroelectronics.

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11/11

UC2844 [STMICROELECTRONICS]

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