UC2845BN [STMICROELECTRONICS]
HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER; 高性能电流模式PWM控制器
| 型号： | UC2845BN |
| 厂家： | 
ST |
| 描述： | HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER |
| 文件： | 总15页 (文件大小：137K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UC2842B/3B/4B/5B
UC3842B/3B/4B/5B
HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER
TRIMMED OSCILLATOR FOR PRECISE FRE-
QUENCY CONTROL
OSCILLATOR FREQUENCY GUARANTEED
AT 250kHz
CURRENT MODE OPERATION TO 500kHz
AUTOMATIC FEED FORWARD COMPENSA-
TION
.
.
.
.
Minidip
SO8
LATCHING PWM FOR CYCLE-BY-CYCLE
CURRENT LIMITING
.
.
INTERNALLY TRIMMED REFERENCE WITH
UNDERVOLTAGE LOCKOUT
HIGH CURRENT TOTEM POLE OUTPUT
UNDERVOLTAGE LOCKOUT WITH HYSTER-
ESIS
comparatorwhichalsoprovidescurrentlimitcontrol,
and a totem pole output stage designed to source
orsinkhighpeakcurrent.Theoutputstage,suitable
for driving N-Channel MOSFETs, is low in the off-
state.
.
.
LOW START-UPAND OPERATINGCURRENT
.
Differencesbetween members of this family are the
under-voltagelockoutthresholdsandmaximum duty
cycle ranges. The UC3842B and UC3844B have
UVLO thresholds of 16V (on) and 10V (off), ideally
suitedoff-lineapplicationsThecorrespondingthresh-
oldsfortheUC3843BandUC3845Bare8.5Vand7.9
V. The UC3842B and UC3843B can operateto duty
cycles approaching100%. A range of the zero to <
50 % is obtainedby the UC3844Band UC3845Bby
theadditionofan internaltoggleflipflopwhichblanks
theoutputoff everyotherclock cycle.
DESCRIPTION
TheUC384xBfamilyofcontrolICsprovidesthenec-
essary features to implement off-line or DC to DC
fixedfrequencycurrent modecontrol schemes with
a minimal external parts count. Internally imple-
mentedcircuits includea trimmed oscillator for pre-
cise DUTY CYCLE CONTROL under voltagelock-
outfeaturingstart-upcurrentlessthan0.5mA,a pre-
cision reference trimmed for accuracy at the error
ampinput,logicto insurelatchedoperation,a PWM
BLOCK DIAGRAM (toggle flip flop used only in UC3844B and UC3845B)
7
Vi
UVLO
34V
8
6
5V
REF
VREF
5V 50mA
5
S/R
GROUND
INTERNAL
BIAS
2.50V
VREF GOOD
LOGIC
OUTPUT
4
RT/CT
OSC
ERROR AMP.
T
2R
+
-
S
2
1
3
VFB
R
PWM
LATCH
R
1V
COMP
CURRENT
SENSE
UC3842B
CURRENT
SENSE
COMPARATOR
D95IN331
1/15
March 1999
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Supply Voltage (low impedance source)
Supply Voltage (Ii < 30mA)
Value
30
Unit
Vi
Vi
V
Self Limiting
IO
Output Current
A
1
±
EO
Output Energy (capacitive load)
Analog Inputs (pins 2, 3)
5
J
µ
– 0.3 to 5.5
10
V
Error Amplifier Output Sink Current
mA
W
Ptot
Ptot
Tstg
TJ
1.25
Power Dissipation at Tamb 25 C (Minidip)
≤
°
800
mW
Power Dissipation at Tamb 25 C (SO8)
≤
Storage Temperature Range
Junction Operating Temperature
°
– 65 to 150
– 40 to 150
300
C
°
°C
TL
Lead Temperature (soldering 10s)
C
°
*
All voltages arewith respect to pin 5, all currents are positive into the specified terminal.
PIN CONNECTION (top view)
Minidip/SO8
COMP
VFB
1
8
7
6
5
VREF
2
3
4
Vi
ISENSE
RT/CT
OUTPUT
GROUND
D95IN332
PIN FUNCTIONS
No
Function
Description
This pin is the Error Amplifier output and is made available for loop compensation.
1
COMP
2
3
4
VFB
This is the inverting input of the Error Amplifier. It is normally connected to the switching
power supply output through a resistor divider.
ISENSE
RT/CT
A voltage proportional to inductor current is connected to this input. The PWM uses this
information to terminate the output switch conduction.
The oscillator frequency and maximum Output duty cycle are programmed by connecting
resistor RT to Vref and cpacitor CT to ground. Operation to 500kHz is possible.
5
6
GROUND This pin is the combined control circuitry and power ground.
OUTPUT This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced
and sunk by this pin.
7
8
VCC
Vref
This pin is the positive supply of the control IC.
This is the reference output. It provides charging current for capacitor CT through resistor RT.
ORDERING NUMBERS
SO8
Minidip
UC2842BD1; UC3842BD1
UC2843BD1; UC3843BD1
UC2844BD1; UC3844BD1
UC2845BD1; UC3845BD1
UC2842BN; UC3842BN
UC2843BN; UC3843BN
UC2844BN; UC3844BN
UC2845BN; UC3845BN
2/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
THERMAL DATA
Symbol
Description
Minidip
SO8
Unit
C/W
Rth j-amb Thermal Resistance Junction-ambient.
max.
100
150
°
ELECTRICAL CHARACTERISTICS
( [note 1] Unless otherwise stated, these specifications apply for
-25 < Tamb < 85°C forUC284XB;0 < Tamb < 70°C for UC384XB; Vi = 15V (note 5); RT = 10K; CT = 3.3nF)
UC284XB
UC384XB
Symbol
Parameter
Test Conditions
Unit
Min. Typ. Max. Min. Typ. Max.
REFERENCE SECTION
VREF
∆VREF
∆VREF
Output Voltage
4.95 5.00 5.05 4.90 5.00 5.10
V
Tj = 25°C Io = 1mA
12V ≤ Vi ≤ 25V
1 ≤ Io ≤ 20mA
Line Regulation
2
3
20
25
2
3
20
25
mV
mV
Load Regulation
Temperature Stability
Total Output Variation
Output Noise Voltage
(Note 2)
0.2
0.2
V
∆
/ T
mV/ C
∆
°
REF
Line, Load, Temperature
4.9
5.1 4.82
5.18
V
eN
50
5
50
5
µ
V
10Hz
f
10KHz T = 25 C
≤
≤
°
j
(note 2)
Long Term Stability
Output Short Circuit
25
25
mV
Tamb
=
125 C, 1000Hrs
°
(note 2)
ISC
-30 -100 -180 -30 -100 -180 mA
OSCILLATOR SECTION
fOSC Frequency
49
48
52
–
55
56
49
48
52
–
55
56
KHz
KHz
T = 25 C
TA = Tlow to Thigh
°
j
225 250 275 225 250 275 KHz
TJ = 25°C(RT = 6.2k, CT = 1nF)
Frequency Change with Volt. VCC = 12V to 25V
Frequency Change with Temp. TA = Tlow to Thigh
–
–
–
0.2
1
1
–
–
–
–
–
0.2
0.5
1.6
1
–
–
%
%
V
f
/ V
∆
∆
OSC
f
/ T
∆
∆
OSC
VOSC
Idischg
Oscillator Voltage Swing
(peak to peak)
1.6
Discharge Current (VOSC =2V) TJ = 25°C
7.8
7.5
8.3 8.8
8.8
7.8 8.3
7.6
8.8
8.8
mA
mA
TA = Tlow to Thigh
–
–
ERROR AMP SECTION
V2
Ib
Input Voltage
VPIN1 = 2.5V
VFB = 5V
2.45 2.50 2.55 2.42 2.50 2.58
V
Input Bias Current
AVOL
-0.1
90
1
-1
-0.1
90
1
-2
µ
A
65
0.7
60
2
65
0.7
60
2
dB
MHz
dB
2V
V
o
4V
≤
≤
BW
PSRR
Io
Unity Gain Bandwidth
Power Supply Rejec. Ratio
Output Sink Current
Output Source Current
TJ = 25°C
12V
70
12
-1
70
12
-1
V
25V
≤
≤
i
VPIN2 = 2.7V VPIN1 = 1.1V
VPIN2 = 2.3V VPIN1 = 5V
mA
mA
V
Io
-0.5
5
-0.5
5
V
OUT High
OUT Low
CURRENT SENSE SECTION
VPIN2 = 2.3V;
RL = 15KΩ to Ground
6.2
6.2
V
VPIN2 = 2.7V;
RL = 15KΩ to Pin 8
0.8 1.1
0.8
1.1
V
GV
V3
Gain
(note 3 & 4)
2.85
0.9
3
1
3.15 2.85
3
1
3.15 V/V
Maximum Input Signal
Supply Voltage Rejection
Input Bias Current
Delay to Output
VPIN1 = 5V (note 3)
12 ≤ Vi ≤ 25V (note 3)
1.1
0.9
1.1
V
SVR
Ib
70
-2
70
-2
dB
µA
ns
-10
-10
150 300
150 300
3/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
ELECTRICAL CHARACTERISTICS
(continued)
UC284XB
UC384XB
Symbol
Parameter
Test Conditions
Unit
Min. Typ. Max. Min. Typ. Max.
OUTPUT SECTION
VOL
Output Low Level
ISINK = 20mA
SINK = 200mA
0.1 0.4
1.6 2.2
0.1
1.6
0.4
2.2
V
V
I
VOH
Output High Level
ISOURCE = 20mA
13 13.5
12 13.5
0.1 1.1
13 13.5
12 13.5
0.1
V
ISOURCE = 200mA
VCC = 6V; ISINK = 1mA
V
VOLS
UVLO Saturation
Rise Time
1.1
150
150
V
tr
tf
50 150
50 150
50
ns
ns
T = 25 C CL = 1nF (2)
°
j
Fall Time
50
Tj = 25°C CL = 1nF (2)
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold
X842B/4B
X843B/5B
X842B/4B
X843B/5B
15
7.8
9
16
8.4 9.0
10 11
17 14.5 16 17.5
7.8 8.4 9.0
8.5 10 11.5
7.0 7.6
V
V
V
V
Min Operating Voltage
After Turn-on
7.0
7.6 8.2
8.2
PWM SECTION
Maximum Duty Cycle
X842B/3B
X844B/5B
94
47
96 100
94
47
96
48
100
50
0
%
%
%
48
50
0
Minimum Duty Cycle
TOTAL STANDBY CURRENT
Ist
Start-up Current
Vi = 6.5V for UCX843B/45B
Vi = 14V for UCX842B/44B
VPIN2 = VPIN3 = 0V
0.3 0.5
0.3 0.5
0.3
0.3
12
0.5
0.5
17
mA
mA
mA
V
Ii
Operating Supply Current
Zener Voltage
12
36
17
Viz
Ii = 25mA
30
30
36
Notes : 1. Max package power dissipation limitsmust be respected; low duty cyclepulse techniques are used during test maintain Tj as
close to Tamb as possible.
2. These parameters, although guaranteed, are not 100% tested in production.
3. Parameter measured at trip point of latch with VPIN2 = 0.
4. Gain definedas :
∆ VPIN1
A =
; 0
V
0.8 V
≤
≤
PIN3
∆ VPIN3
5. Adjust Vi above the start threshold before setting at 15 V.
4/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 1: OpenLoopTest Circuit.
VREF
4.7KΩ
RT
2N2222
A
Vi
VREF
0.1µF
100KΩ
COMP
VFB
8
1
7
Vi
ERROR AMP.
ADJUST
2
3
4
1W
1KΩ
1KΩ
0.1µF
UC2842B
ISENSE
RT/CT
ISENSE
4.7KΩ
OUTPUT
GROUND
ADJUST
5KΩ
6
OUTPUT
GROUND
5
CT
D95IN343
Highpeakcurrentsassociatedwithcapacitiveloads
necessitate careful grounding techniques. Timing
and bypass capacitors should be connectedclose
to pin 5 in a singlepoint ground.The transistorand
5KΩ potentiometerareusedtosampletheoscillator
waveformand apply an adjustableramp to pin 3.
Figure 2:
Figure 3:
Timing Resistor vs. Oscillator Fre-
quency
Output Dead-Time vs. Oscillator Fre-
quency
D95IN334
D95IN333
RT
%
(KΩ)
50
50
C
=2nF
T
30
20
C
T
=5nF
20
10
5
C
=5nF
T
C
=1nF
T
C
=10nF
T
C
=500pF
T
10
C
T
=200pF
5
C
=2nF
T
C
T
=100pF
C =10nF
T
3
2
2
V
=15V
i
V
=15V
T
=25°C
A
i
1
T
=25°C
A
0.8
1
10K
20K
30K
50K
100K
200K 300K
500K
f
(KHz)
OSC
10K
20K
30K
50K
100K
200K 300K
500K fOSC(KHz)
5/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 4: Oscillator Discharge Current vs. Tem-
Figure 5: Maximum Output Duty Cycle vs. Tim-
perature.
ing Resistor.
D95IN336
I
D95IN335
dischg
D
(%)
max
(mA)
V
V
=15V
i
90
=2V
OSC
I
=7.5mA
dischg
8.5
8.0
7.5
7.0
80
70
60
50
40
I
=8.8mA
dischg
V =15V
i
C =3.3nF
T
T =25°C
A
0.8
1
2
3
5
R (KΩ)
T
-55 -25
0
25
50
75 100 T (°C)
A
Figure 6: Error Amp Open-Loop Gain and
Figure 7: Current Sense Input Threshold vs. Er-
Phase vs. Frequency.
ror Amp Output Voltage.
D95IN337
D95IN338
V
(V)
th
(dB)
φ
V
=15V
i
V =15V
i
V =2V to 4V
O
R
T =25°C
A
80
60
40
20
0
30
1.0
=100K
L
Gain
T =25°C
A
60
0.8
0.6
0.4
0.2
0.0
T =125°C
A
90
Phase
120
150
180
T =-40°C
A
-20
0
2
4
6
V (V)
O
10
100
1K
10K 100K 1M f(Hz)
Figure 8:
Figure 9:
Reference Short Circuit Current vs.
Reference Voltage Change vs.
Source Current.
D95IN339
Temperature.
D95IN340
I
SC
60
50
40
30
20
10
(mA)
V =15V
i
V =15V
R ≤0.1Ω
L
i
100
T =-40°C
90
80
70
60
50
A
T =125°C
A
0
0
20
40
60
80
100 I (mA)
-55 -25
0
25
50
75 100 T (°C)
A
ref
6/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 10: Output Saturation Voltagevs. Load
Figure 11: Supply Current vs. Supply Voltage.
Current.
V
(V)
D95IN342
I
sat
D95IN341
i
(mA)
Source Saturation
(Load to Ground)
V
i
-1
-2
T =25°C
A
T =-40°C
A
20
15
V
i
=15V
80µs Pulsed Load 120Hz Rate
3
2
1
0
R
C
V
=10K
T
10
5
=3.3nF
T
T =-40°C
A
=0V
FB
I
=0V
Sense
T =25°C
A
T =25°C
A
Sink Saturation
(Load to V)
GND
i
0
0
10
20
30
V (V)
i
0
200
400
600
I (mA)
O
Figure 12: Output Waveform.
Figure 13: Output Cross Conduction
Vi =30V
CL = 15pF
TA = 25°C
Vi =15V
CL = 1.0nF
TA = 25°C
90%
VO
20V/DIV
ICC
10%
100mA/DIV
50ns/DIV
100ns/DIV
Figure 14:
Oscillator and Output Waveforms.
Vi
7
CT
8
5V REG
OUTPUT
PWM
6
RT
OUTPUT
LARGE RT/SMALL CT
CLOCK
4
OSCILLATOR
CT
ID
CT
OUTPUT
5
SMALL RT/LARGE CT
GND
D95IN344
7/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 15 : ErrorAmp Configuration.
2.5V
1mA
+
-
VFB
2
1
Zi
COMP
Zf
D95IN345
Figure 16 :
UnderVoltageLockout.
7
ON/OFF COMMAND
TO REST OF IC
Vi
ICC
<17mA
<0.5mA
UC3842B UC3843B
UC3844B UC3845B
VON
16V
10V
8.4V
7.6V
VCC
VOFF VON
VOFF
During UVLO, the Output is low
D95IN346
Figure 17 : Current SenseCircuit .
ERROR
AMPL.
2R
R
IS
1
3
1V
COMP
CURRENT
SENSE
COMPARATOR
R
CURRENT
SENSE
RS
C
5
GND
D95IN347
Peak current (is) is determinedby the formula
1.0 V
IS max
≈
RS
A small RC filter may be required to suppressswitch transients.
8/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 18 : SlopeCompensationTechniques.
VREG
VREG
8
8
RT
RT
RT/CT
RT/CT
IS
4
3
IS
4
3
UC3842B
UC3842B
RSLOPE
R1
CT
ISENSE
CT
ISENSE
RSLOPE
R1
5
5
RS
RS
GND
GND
D95IN348
Figure 19 :
IsolatedMOSFET Drive and Current Transformer Sensing.
VCC
Vin
7
+
-
ISOLATION
BOUNDARY
5.0V
ref
VGS Waveforms
Q1
+
0
+
0
+
-
6
-
-
50% DC
25% DC
S
R
Q
V
(pin 1) -1.4
NS
Ipk
=
( )
3RS
NP
-
+
R
COMP/LATCH
3
RS
NS
NP
C
D95IN349
9/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 20 :
LatchedShutdown.
4
8
OSC
BIAS
R
R
+
1mA
2R
+
-
2
1
EA
R
5
2N
3905
2N
3903
D95IN350
SCR must be selected for a holding current of less than 0.5mA at T
.
A(min)
The simple two transistor circuit can be used in place of the SCR as shown. All resistors are 10K.
Figure 21:
Error Amplifier Compensation
+
From VO
Ri
2.5V
1mA
2R
+
-
2
1
EA
R
Rd Cf
Rf
5
Error Amp compensation circuit for stabilizing any current-mode topology except
for boost and flyback converters operating with continuous inductor current.
+
From VO
RP
2.5V
1mA
2R
+
-
Ri
2
1
EA
R
CP
Rd
Cf
Rf
5
D95IN351
Error Amp compensation circuit for stabilizing current-mode boost and flyback
topologies operating with continuous inductor current.
10/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 22: External Clock Synchronization.
VREF
8
4
R
BIAS
RT
CT
R
OSC
+
EXTERNAL
SYNC INPUT
2R
0.01µF
+
-
2
1
EA
47Ω
R
5
D95IN352
The diode clamp is required if the Sync amplitude is large enough to cause
the bottom side of CT to go more than 300mV below ground
Figure 23:
External Duty Cycle Clamp and Multi Unit Synchronization.
VREF
8
RA
RB
R
R
BIAS
OSC
8
4
5K
5K
5K
6
5
+
-
3
7
4
R
S
+
Q
2R
+
-
+
-
2
2
1
EA
C
R
1
NE555
5
TO ADDITIONAL
UCX84XAs
1.44
(RA + 2RB)C
RB
RA + 2RB
f =
Dmax
=
D95IN353
11/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 24: Soft-Start Circuit
8
5Vref
R
+
-
BIAS
OSC
R
4
+
1mA
S
R
2R
+
-
Q
2
1
+
-
1MΩ
EA
R
1V
C
5
D95IN354
Figure 25: Soft-Start and Error Amplifier Output Duty Cycle Clamp.
VCC Vin
7
+
8
4
5Vref
-
R
R
+
-
BIAS
OSC
2R
7
6
Q1
+
1mA
VClamp
S
Q
R
+
-
5
-
2
1
+
EA
R
1V
R2
R1
Comp/Latch
5
RS
C
BC109
R1
VCLAMP
RS
V
CLAMP = ·
where 0 <VCLAMP <1V
Ipk(max)
=
D95IN355
R1 + R2
12/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
mm
inch
DIM.
OUTLINE AND
MECHANICAL DATA
MIN. TYP. MAX. MIN. TYP. MAX.
A
a1
a2
a3
b
1.75
0.069
0.010
0.065
0.033
0.019
0.010
0.020
0.1
0.25 0.004
1.65
0.65
0.35
0.19
0.25
0.85 0.026
0.48 0.014
0.25 0.007
b1
C
0.5
0.010
c1
D (1)
E
45° (typ.)
4.8
5.8
5.0
6.2
0.189
0.228
0.197
0.244
e
1.27
3.81
0.050
0.150
e3
F (1)
L
3.8
0.4
4.0
0.15
0.157
0.050
0.024
1.27 0.016
0.6
M
SO8
S
8° (max.)
(1) D andF do not include mold flash or protrusions. Mold flash or
potrusions shall not exceed 0.15mm (.006inch).
13/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
mm
inch
DIM.
OUTLINE AND
MECHANICAL DATA
MIN. TYP. MAX. MIN. TYP. MAX.
A
a1
B
3.32
0.131
0.51
1.15
0.020
1.65 0.045
0.55 0.014
0.304 0.008
10.92
0.065
0.022
0.012
0.430
0.384
b
0.356
0.204
b1
D
E
7.95
9.75 0.313
e
2.54
7.62
7.62
0.100
0.300
0.300
e3
e4
F
6.6
0.260
0.200
0.150
0.060
I
5.08
L
3.18
3.81 0.125
1.52
Minidip
Z
14/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
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quences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this
publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMi-
croelectronics products are not authorized for use as critical components in life support devices or systems without express written
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15/15
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