VNH7013XP-E [STMICROELECTRONICS]

Automotive integrated H-bridge; 汽车集成H桥
VNH7013XP-E
型号: VNH7013XP-E
厂家: ST    ST
描述:

Automotive integrated H-bridge
汽车集成H桥

文件: 总24页 (文件大小:768K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
VNH7013XP-E  
Automotive integrated H-bridge  
Features  
Type  
RDS(on)  
Iout  
Vccmax  
13 mΩ typ  
(per leg)  
VNH7013XP-E  
40 A  
72 V(1)  
1. Per leg: sum of the two BV  
(HSD + LSD);  
dss  
V
> 36 V whole bridge must be switched off;  
CC  
Maximum VCC voltage: 72 V  
PowerSSO-36 TP  
10 V compatible inputs  
RDS(on) per leg: 13 mΩ typical  
Embedded thermal sensor: -8.1 mV/°K  
Very low stray inductance in power line  
Description  
The VNH7013XP-E is an automotive integrated  
H-bridge intended for a wide range of automotive  
applications driving DC motors. The device  
incorporates a dual channel and two single  
channel MOSFETs. All the devices are designed  
using STMicroelectronics® well known and  
proven proprietary VIPower® M0-S7 technology  
that allows to integrate in a package four different  
channels in H-bridge topology.  
This package, specifically designed for the harsh  
automotive environment offers improved thermal  
performance thanks to exposed die pads.  
Moreover, its fully symmetrical mechanical design  
allows superior manufacturability at board level.  
Table 1.  
Device summary  
Package  
Order codes  
Tape and reel  
Tube  
PowerSSO-36 TP  
VNH7013XP-E  
VNH7013XPTR-E  
January 2012  
Doc ID 022370 Rev 3  
1/24  
www.st.com  
1
 
Contents  
VNH7013XP-E  
Contents  
1
2
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
2.1  
2.2  
Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
3
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
3.1  
PowerSSO-36 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
3.1.1  
Thermal calculation in clockwise and anti-clockwise operation in steady-  
state mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
3.1.2  
Thermal resistances definition (values according to the PCB heatsink  
area) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
3.1.3  
3.1.4  
Thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Single pulse thermal impedance definition (values according to the PCB  
heatsink area) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
4
5
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
®
4.1  
4.2  
4.3  
ECOPACK packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
PowerSSO-36 TP package information . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
PowerSSO-36 TP packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
2/24  
Doc ID 022370 Rev 3  
VNH7013XP-E  
List of tables  
List of tables  
Table 1.  
Table 2.  
Table 3.  
Table 4.  
Table 5.  
Table 6.  
Table 7.  
Table 8.  
Table 9.  
Table 10.  
Table 11.  
Table 12.  
Table 13.  
Table 14.  
Table 15.  
Table 16.  
Table 17.  
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Pin definitions and functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Power off. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Power on. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Gate resistance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Switching on HSD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Switching on LSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Switching off HSD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Switching off LSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Thermal sensor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Thermal calculation in clockwise and anti-clockwise operation in steady-state mode . . . . 16  
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
PowerSSO-36 TP mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Doc ID 022370 Rev 3  
3/24  
List of figures  
VNH7013XP-E  
List of figures  
Figure 1.  
Figure 2.  
Figure 3.  
Figure 4.  
Figure 5.  
Figure 6.  
Figure 7.  
Figure 8.  
Figure 9.  
Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Configuration diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Single pulse maximum current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Gate charge vs gate-source voltage HS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Gate charge vs gate-source voltage LS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Capacitance variations HS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Capacitance variations LS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Thermal sensor voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Gate charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Figure 10. Test circuit for inductive load switching and diode recovery times . . . . . . . . . . . . . . . . . . . 13  
Figure 11. Switching times test circuit for resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Figure 12. PowerSSO-36 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Figure 13. Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Figure 14. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . 16  
Figure 15. PowerSSO-36 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . 18  
Figure 16. PowerSSO-36 LSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . 18  
Figure 17. Thermal fitting model of an H-bridge in PowerSSO-36. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Figure 18. PowerSSO-36 TP package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Figure 19. PowerSSO-36 TP tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Figure 20. PowerSSO-36 TP tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
4/24  
Doc ID 022370 Rev 3  
VNH7013XP-E  
Block diagram and pin description  
1
Block diagram and pin description  
Figure 1.  
Block diagram  
Figure 2.  
Configuration diagram  
Gate 4  
Gate 3  
Drain3  
Drain4  
Source4  
Source3  
Source3  
Source3  
Source3  
Source3  
Drain3  
Source4  
Source4  
Source4  
Source4  
Drain4  
Source3  
Source4  
TSK-  
TSA+  
Source1  
Source1  
Drain1  
Source2  
Source2  
Drain2  
Source1  
Source1  
Source1  
Source1  
Gate 1  
Source2  
Source2  
Source2  
Drain M1,M2  
Source2  
Gate 2  
Doc ID 022370 Rev 3  
5/24  
Block diagram and pin description  
VNH7013XP-E  
Table 2.  
Pin definitions and functions  
Pin number  
Symbol  
Function  
1
2, 8  
Gate 4  
Drain 4  
Source 4  
TSA+  
Gate of the LSD 4  
Drain of the LSD 4  
Source of the LSD 4  
Thermal sensor anode  
3, 4, 5, 6, 7, 9  
10  
11, 12, 14, 15,  
16, 17  
Source 2  
Source of the HSD 2  
13  
18  
19  
Drain 2  
Gate 2  
Gate 1  
Drain of the HSD 2  
Gate of the HSD 2  
Gate of the HSD 1  
20, 21, 22, 23,  
25, 26  
Source 1  
Source of the HSD 1  
24  
27  
Drain 1  
TSK-  
Drain of the HSD 1  
Thermal sensor cathode  
28, 30, 31, 32,  
33, 34  
Source 3  
Source of the LSD 3  
29, 35  
36  
Drain 3  
Gate 3  
Drain of the LSD 3  
Gate of the LSD 3  
6/24  
Doc ID 022370 Rev 3  
VNH7013XP-E  
Electrical specifications  
2
Electrical specifications  
2.1  
Absolute maximum rating  
Table 3.  
Symbol  
VCC  
Imax  
Absolute maximum rating  
Parameter  
Value  
Unit  
Supply voltage (whole bridge switched off)  
Maximum output current (continuous)  
Maximum gate source voltage  
Maximum Single Pulse output current  
Junction operating temperature  
Case operating temperature  
72  
40  
V
A
VGS_max  
IPulse_max  
Tj  
18  
V
80(1)  
A
175  
°C  
°C  
°C  
A
Tc  
-40 to 150  
-55 to 150  
40  
TSTG  
IS  
Storage temperature  
Diode continuous forward current  
1. Pulse duration = 20 ms (seeFigure 3).  
Figure 3.  
Single pulse maximum current  
Doc ID 022370 Rev 3  
7/24  
 
Electrical specifications  
VNH7013XP-E  
2.2  
Electrical characteristics  
Tj = 25 °C, unless otherwise specified.  
Table 4.  
Symbol  
Power off  
Parameter  
Test conditions  
Min. Typ. Max. Unit  
Drain-source breakdown  
voltage  
V(BR)DSS  
ID = 10 mA, VGS = 0 V  
36  
V
VDS = 28 V;  
-40 °C < Tj < 150 °C  
100  
10  
µA  
µA  
Zero gate voltage drain  
current (VGS=0V)  
IDSS  
VDS = 28 V; Tj = 25 °C  
VGS = 10 V  
Gate-source leakage current  
(VDS=0V)  
IGSS  
100 nA  
Table 5.  
Symbol  
Power on  
Parameter  
Test conditions  
Min. Typ. Max. Unit  
VGS(th)  
Gate threshold voltage VDS = VGS; ID = 1 mA  
2
4
V
Gate threshold voltage  
VDS = VGS; ID = 1 mA  
temperature derating  
dVGS(th)/dT  
7.5  
5.7  
mV/°C  
V
GS = 10 V; ID = 5 A; Tj = 25 °C  
mΩ  
mΩ  
mΩ  
mΩ  
Static drain-source on  
resistance  
RDS(on) HS  
VGS = 10 V; ID = 5 A; Tj = 150 °C  
VGS = 10 V; ID = 5 A; Tj = 25 °C  
11.9  
15.1  
7.3  
Static drain-source on  
resistance  
RDS(on) LS  
VGS = 10 V; ID = 5 A; Tj = 150 °C  
Table 6.  
Symbol  
Dynamic  
Parameter  
Test condition  
Min. Typ. Max. Unit  
(1)  
Gfs_HS  
Forward transconductance  
Forward transconductance  
20  
17.5  
1836  
426  
55  
S
V
DS = 15 V; ID = 20 A;  
(1)  
Tj = 25 °C  
Gfs_LS  
S
Ciss_HS Input capacitance  
pF  
pF  
pF  
pF  
pF  
pF  
VDS = 25 V; f = 1 MHz;  
Coss_HS Output capacitance  
Crss_HS Reverse transfer capacitance  
Ciss_LS Input capacitance  
VGS = 0 V (see Figure 6)  
1250  
311  
49  
VDS = 25 V; f = 1 MHz;  
VGS = 0 V (see Figure 7)  
Coss_LS Output capacitance  
Crss_LS Reverse transfer capacitance  
1. Pulsed: pulse duration = 300µs, duty cycle 1.5%.  
8/24  
Doc ID 022370 Rev 3  
 
VNH7013XP-E  
Electrical specifications  
Min. Typ. Max. Unit  
Table 7.  
Symbol  
Gate resistance  
Parameter  
Test condition  
RG_HS Gate resistance HS  
20  
13  
Ω
Ω
VDD = 15 V; fgate = 1 MHz  
RG_LS  
Gate resistance LS  
Table 8.  
Symbol  
Source drain diode  
Parameter  
Test conditions  
Min.  
Typ.  
Max. Unit  
ISD = 20 A; VGS = 0 V;  
Tj = 25 °C  
(1)  
VSD  
Forward on voltage  
0.9  
1.1  
V
trr  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
50  
28  
ns  
nC  
A
ISD = 20 A; di/dt = 100 A/µs;  
Qrr  
VDD = 20 V; Tj = 150 °C  
(see Figure 10)  
IRRM  
0.8  
1. Pulse width limited by safe operating area.  
Table 9.  
Symbol  
Switching on HSD  
Parameter  
Test conditions  
Min.  
Typ.  
Max. Unit  
td(on)  
tr  
Turn on delay time  
Rise time  
53  
319  
36  
8.5  
5
ns  
ns  
V
DD = 15 V; ID = 20 A;  
RG = 4.7 Ω; VGS = 10 V  
Qg  
Total gate charge  
Gate-source charge  
Gate-drain charge  
nC  
nC  
nC  
VDD = 15 V; ID = 20 A;  
VGS = 10 V  
(see Figure 4 and Figure 9)  
Qgs  
Qgd  
Table 10. Switching on LSD  
Symbol  
Parameter  
Test conditions  
Min.  
Typ.  
Max. Unit  
td(on)  
tr  
Turn on delay time  
Rise time  
53  
430  
23  
6
ns  
ns  
V
R
DD = 15 V; ID = 20 A;  
G = 4.7 Ω; VGS = 10 V  
Qg  
Total gate charge  
Gate-source charge  
Gate-drain charge  
nC  
nC  
nC  
VDD = 15 V; ID = 20 A;  
VGS = 10 V  
(see Figure 5 and Figure 9)  
Qgs  
Qgd  
2.5  
Table 11. Switching off HSD  
Symbol  
td(off)  
tf  
Parameter  
Turn-off delay time  
Fall time  
Test conditions  
Min.  
Typ.  
253  
169  
Max. Unit  
VDD = 15 V; ID = 20 A;  
RG = 4.7 Ω; VGS = 10 V  
(see Figure 11)  
ns  
ns  
Doc ID 022370 Rev 3  
9/24  
Electrical specifications  
VNH7013XP-E  
Max. Unit  
Table 12. Switching off LSD  
Symbol  
td(off)  
tf  
Parameter  
Turn-off delay time  
Fall time  
Test conditions  
Min.  
Typ.  
124  
293  
VDD = 15 V; ID = 20 A;  
G = 4.7 Ω; VGS = 10 V  
(see Figure 11)  
ns  
ns  
R
Table 13. Thermal sensor(1)  
Symbol  
Parameter  
Test conditions  
Min.  
Typ.  
Max. Unit  
Chain diode forward  
voltage  
Tj = 25 °C; IF = 250 µA  
(see Figure 8)  
VF  
3.72  
3.88  
4.04  
V
Chain temperature  
coefficient  
SF  
-40 °C < Tj < 175 °C; IF = 250 µA  
-8.1  
mV/°K  
1. See Figure 8.  
Figure 4.  
Gate charge vs gate-source voltage HS  
ꢅꢁ  
ꢅꢀ  
6$3  ꢅꢉ6  
$  ꢁꢀ  
)
ꢅꢀ  
ꢁꢀ  
1GꢇN#ꢈ  
ꢆꢀ  
ꢂꢀ  
'!0'#&4ꢀꢀꢉꢀꢆ  
10/24  
Doc ID 022370 Rev 3  
VNH7013XP-E  
Figure 5.  
Electrical specifications  
Gate charge vs gate-source voltage LS  
ꢅꢁ  
ꢅꢀ  
6$3  ꢅꢉ6  
$  ꢁꢀ  
)
ꢅꢀ  
ꢁꢀ  
ꢆꢀ  
1GꢇN#ꢈ  
'!0'#&4ꢀꢀꢉꢀꢂ  
Figure 6.  
Capacitance variations HS  
ꢉꢀꢀꢀ  
ꢂꢉꢀꢀ  
ꢂꢀꢀꢀ  
ꢆꢉꢀꢀ  
ꢆꢀꢀꢀ  
ꢁꢉꢀꢀ  
ꢁꢀꢀꢀ  
ꢅꢉꢀꢀ  
ꢅꢀꢀꢀ  
ꢉꢀꢀ  
F ꢊꢅ-HZ  
6GS    
#ISS  
#OSS  
#RSS  
ꢅꢀ  
ꢁꢀ  
ꢆꢀ  
6DSꢇ6ꢈ  
'!0'#&4ꢀꢀꢉꢀꢉ  
Doc ID 022370 Rev 3  
11/24  
Electrical specifications  
Figure 7.  
VNH7013XP-E  
Capacitance variations LS  
ꢆꢉꢀꢀ  
ꢆꢀꢀꢀ  
ꢁꢉꢀꢀ  
ꢁꢀꢀꢀ  
ꢅꢉꢀꢀ  
ꢅꢀꢀꢀ  
ꢉꢀꢀ  
F ꢊꢅ-HZ  
6GS    
#ISS  
#OSS  
#RSS  
ꢅꢀ  
ꢁꢀ  
ꢆꢀ  
6DSꢇ6ꢈ  
'!0'#&4ꢀꢀꢉꢀꢃ  
Figure 8.  
Thermal sensor voltage vs temperature  
ꢃꢋꢀꢀꢀ  
ꢉꢋꢉꢀꢀ  
ꢉꢋꢀꢀꢀ  
ꢂꢋꢉꢀꢀ  
ꢅꢀꢀU!  
ꢁꢀꢀU!  
ꢆꢀꢀU!  
ꢂꢀꢀU!  
ꢉꢀꢀU!  
ꢂꢋꢀꢀꢀ  
ꢆꢋꢉꢀꢀ  
ꢆꢋꢀꢀꢀ  
ꢁꢋꢉꢀꢀ  
ꢁꢋꢀꢀꢀ  
6F?TH?6  
ꢌꢂꢀ #  
ꢁꢉ #  
ꢄꢉ #  
ꢅꢁꢉ #  
ꢅꢉꢀ #  
'!0'#&4ꢀꢀꢉꢁꢅ  
12/24  
Doc ID 022370 Rev 3  
VNH7013XP-E  
Figure 9.  
Electrical specifications  
Gate charge test circuit  
Figure 10. Test circuit for inductive load switching and diode recovery times  
Doc ID 022370 Rev 3  
13/24  
Electrical specifications  
Figure 11. Switching times test circuit for resistive load  
VNH7013XP-E  
14/24  
Doc ID 022370 Rev 3  
VNH7013XP-E  
Package and PCB thermal data  
3
Package and PCB thermal data  
3.1  
PowerSSO-36 thermal data  
Figure 12. PowerSSO-36 PC board  
Double layers: footprint  
2
Double layers: 2cm of Cu  
2
Double layers: 8cm of Cu  
2
2
Four layers: Cu on top layer: 16 cm ; Cu on bottom layer: 32 cm ; Cu on middle layer: total coverage  
Doc ID 022370 Rev 3  
15/24  
Package and PCB thermal data  
Figure 13. Chipset configuration  
VNH7013XP-E  
5WK$  
$IJQꢄꢅ  
5WK$%  
5WK$&  
$IJQꢄꢆ $IJQꢄꢇ  
5WK%  
5WK&  
5WK%&  
("1($'5ꢀꢀꢁꢂꢃ  
Figure 14. Auto and mutual Rthj-amb vs PCB copper area in open box free air  
condition  
ꢄꢀ  
2TH!  
2TH"  2TH#  
ꢍꢀ  
2TH!"  2TH!#  
ꢃꢀ  
ꢉꢀ  
ꢂꢀ  
ꢆꢀ  
ꢁꢀ  
ꢅꢀ  
2TH"#  
ꢅꢀ  
ꢅꢁ  
CM OF #U !REA ꢇREFER TO 0#" LAYOUTꢈ  
'!0'#&4ꢀꢀꢂꢄꢄ  
Note: Referred to double layer PCB  
3.1.1  
Thermal calculation in clockwise and anti-clockwise operation in  
steady-state mode  
Table 14. Thermal calculation in clockwise and anti-clockwise operation in steady-  
state mode  
HSA HSB LSA LSB  
TjHSAB  
TjLSA  
TjLSB  
PdHSA x RthHS + PdLSB PdHSA x RthHSLS  
+
PdHSA x RthHSLS + PdLSB  
ON OFF OFF ON  
x RthHSLS + Tamb  
PdLSB x RthLSLS + Tamb x RthLS + Tamb  
PdHSB x RthHS + PdLSA PdHSB x RthHSLS  
+
PdHSB x RthHSLS + PdLSA  
x RthLSLS + Tamb  
OFF ON ON OFF  
x RthHSLS + Tamb  
PdLSA x RthLS + Tamb  
16/24  
Doc ID 022370 Rev 3  
VNH7013XP-E  
Package and PCB thermal data  
3.1.2  
Thermal resistances definition (values according to the PCB heatsink  
area)  
R
thHS = RthHSA = RthHSB = High Side Chip Thermal Resistance Junction to Ambient (HSA or  
HSB in ON state)  
R
R
thLS = RthLSA = RthLSB = Low Side Chip Thermal Resistance Junction to Ambient  
thHSLS = RthHSALSB = RthHSBLSA = Mutual Thermal Resistance Junction to Ambient  
between High Side and Low Side Chips  
R
thLSLS = RthLSALSB = Mutual Thermal Resistance Junction to Ambient between Low Side  
Chips  
(a)  
3.1.3  
3.1.4  
Thermal calculation in transient mode  
T
T
T
jHSAB = ZthHS x PdHSAB + ZthHSLS x (PdLSA + PdLSB) + Tamb  
jLSA = ZthHSLS x PdHSAB + ZthLS x PdLSA + ZthLSLS x PdLSB + Tamb  
jLSB = ZthHSLS x PdHSAB + ZthLSLS x PdLSA + ZthLS x PdLSB + Tamb  
Single pulse thermal impedance definition (values according to the  
PCB heatsink area)  
Z
Z
Z
thHS = High Side Chip Thermal Impedance Junction to Ambient  
thLS = ZthLSA = ZthLSB = Low Side Chip Thermal Impedance Junction to Ambient  
thHSLS = ZthHSABLSA = ZthHSABLSB = Mutual Thermal Impedance Junction to Ambient  
between High Side and Low Side Chips  
Z
thLSLS = ZthLSALSB = Mutual Thermal Impedance Junction to Ambient between Low Side  
Chips  
Equation 1: pulse calculation formula  
Z
= R  
Þ δ + Z  
(1 δ)  
THtp  
THδ  
where  
TH  
δ = t T  
p
a. Calculation is valid in any dynamic operating condition. P values set by user.  
d
Doc ID 022370 Rev 3  
17/24  
Package and PCB thermal data  
VNH7013XP-E  
Figure 15. PowerSSO-36 HSD thermal impedance junction ambient single pulse  
:4( ꢌ(3$   CU AREA  
ꢅꢀꢀ  
ꢅꢀ  
(3$ꢌFOOTPRINT  
(3$ꢌꢁ CM>ꢁ #U  
(3$ꢌꢄ CM>ꢁ #U  
(3$ꢌꢂ ,AYE R  
(S,S$ ꢌFOOTPRINT  
(S,S$ ꢌꢁ CM>ꢁ #U  
(S,S$ ꢌꢄ CM>ꢁ #U  
(S,S$ ꢌꢂ ,AYE R  
:
HS  
:
HSLS  
ꢀꢋꢅ  
ꢀꢋꢀꢅ  
ꢀꢋꢅ  
ꢅꢀ  
ꢅꢀꢀ  
ꢅꢀꢀꢀ  
TIME ꢇSECꢈ  
'!0'#&4ꢀꢀꢂꢄꢏ  
Figure 16. PowerSSO-36 LSD thermal impedance junction ambient single pulse  
:4( ꢌ,3$   CU AREA  
ꢅꢀꢀ  
,3$ꢌFOOTPRINT  
,3$ꢌꢁ CM>ꢁ #U  
,3$ꢌꢄ CM>ꢁ #U  
,3$ꢌꢂ ,AYE R  
,S,S$ ꢌFOOTPRINT  
,S,S$ ꢌꢁ CM>ꢁ #U  
,S,S$ ꢌꢄ CM>ꢁ #U  
,S,S$ ꢌꢂ ,AYE R  
ꢅꢀ  
:
LS  
:
LSLS  
ꢀꢋꢅ  
ꢀꢋꢀꢅ  
ꢀꢋꢅ  
ꢅꢀ  
ꢅꢀꢀ  
ꢅꢀꢀꢀ  
TIME ꢇSECꢈ  
'!0'#&4ꢀꢀꢂꢏꢀ  
18/24  
Doc ID 022370 Rev 3  
VNH7013XP-E  
Package and PCB thermal data  
Figure 17. Thermal fitting model of an H-bridge in PowerSSO-36  
Table 15. Thermal parameters(1)  
Area/island (cm2)  
Footprint  
2
8
4L  
R1 = R7 (°C/W)  
R2 = R8 (°C/W)  
R3 (°C/W)  
0.2  
1.6  
8
R4 (°C/W)  
30  
16  
22  
28  
16  
12  
10  
10  
5
R5 (°C/W)  
40  
R6 (°C/W)  
36  
6
R9 = R15 (°C/W)  
R10 = R16 (°C/W)  
R11 = R17 (°C/W)  
R12 = R18 (°C/W)  
R13 = R19 (°C/W)  
R14 = R20 (°C/W)  
R21 = R22 (°C/W)  
R23 (°C/W)  
0.1  
2.8  
22  
14  
30  
36  
32  
60  
50  
14  
30  
28  
26  
50  
45  
14  
20  
16  
18  
40  
30  
49  
52  
50  
80  
80  
C1 = C7 = C9 = C15 (W.s/°C)  
C2 = C8 (W.s/°C)  
C3 (W.s/°C)  
0.001  
0.009  
0.09  
0.5  
0.8  
5
C4 (W.s/°C)  
0.8  
1.4  
6
0.8  
2
0.8  
3
C5 (W.s/°C)  
C6 (W.s/°C)  
8
10  
C10 = C16 (W.s/°C)  
C11 = C17 (W.s/°C)  
C12 = C18 (W.s/°C)  
C13 = C19 (W.s/°C)  
C14 = C20 (W.s/°C)  
C21 = C22 = C23 (W.s/°C)  
0.1  
0.07  
0.45  
0.8  
4
0.45  
1
0.45  
1.2  
0.6  
2.5  
5
6
8
0.01  
0.006  
0.005  
0.005  
1. The blank space means that the value is the same as the previous one.  
Doc ID 022370 Rev 3  
19/24  
Package and packing information  
VNH7013XP-E  
4
Package and packing information  
®
4.1  
ECOPACK packages  
In order to meet environmental requirements, ST offers these devices in different grades of  
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®  
specifications, grade definitions and product status are available at: www.st.com.  
ECOPACK® is an ST trademark.  
4.2  
PowerSSO-36 TP package information  
Figure 18. PowerSSO-36 TP package dimensions  
20/24  
Doc ID 022370 Rev 3  
VNH7013XP-E  
Package and packing information  
Table 16. PowerSSO-36 TP mechanical data  
Millimeters  
Typ.  
Symbol  
Min.  
2.15  
2.15  
0
Max.  
2.47  
2.40  
0.1  
A
A2  
a1  
b
0.18  
0.23  
10.10  
7.4  
0.36  
0.32  
10.50  
7.6  
c
D
E
e
0.5  
8.5  
2.3  
e3  
F
G
0.1  
10.5  
0.4  
H
10.1  
h
k
0 deg  
0.6  
8 deg  
1
L
M
N
4.3  
10 deg  
O
1.2  
0.8  
Q
S
2.9  
T
3.65  
1.0  
U
X1  
Y1  
X2  
Y2  
X3  
Y3  
Z1  
Z2  
1.85  
3
2.35  
3.5  
1.85  
3
2.35  
3.5  
4.7  
3
5.2  
3.5  
0.4  
0.4  
Doc ID 022370 Rev 3  
21/24  
Package and packing information  
VNH7013XP-E  
4.3  
PowerSSO-36 TP packing information  
Figure 19. PowerSSO-36 TP tube shipment (no suffix)  
Base Qty  
Bulk Qty  
Tube length ( 0.5)  
49  
1225  
532  
3.5  
C
B
A
B
13.8  
0.6  
C ( 0.1)  
All dimensions are in mm.  
A
Figure 20. PowerSSO-36 TP tape and reel shipment (suffix “TR”)  
Reel dimensions  
Base Qty  
Bulk Qty  
A (max)  
B (min)  
C ( 0.2)  
F
1000  
1000  
330  
1.5  
13  
20.2  
24.4  
100  
30.4  
G (+2 / -0)  
N (min)  
T (max)  
Tape dimensions  
According to Electronic Industries Association  
(EIA) Standard 481 rev. A, Feb. 1986  
Tape width  
W
24  
4
Tape Hole Spacing  
Component Spacing  
Hole Diameter  
P0 ( 0.1)  
P
12  
D ( 0.05)  
D1 (min)  
F ( 0.1)  
K (max)  
P1 ( 0.1)  
1.55  
1.5  
11.5  
2.85  
2
Hole Diameter  
Hole Position  
Compartment Depth  
Hole Spacing  
End  
All dimensions are in mm.  
Start  
Top  
cover  
tape  
No components Components  
500mm min  
No components  
500mm min  
Empty components pockets  
sealed with cover tape.  
User direction of feed  
22/24  
Doc ID 022370 Rev 3  
VNH7013XP-E  
Revision history  
5
Revision history  
Table 17. Document revision history  
Date  
Revision  
Changes  
07-Nov-2011  
18-Jan-2012  
20-Jan-2012  
1
2
3
Initial release  
Changed document status from preliminary data to datasheet.  
Updated features list.  
Doc ID 022370 Rev 3  
23/24  
VNH7013XP-E  
Please Read Carefully:  
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the  
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any  
time, without notice.  
All ST products are sold pursuant to ST’s terms and conditions of sale.  
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no  
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24/24  
Doc ID 022370 Rev 3  

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