WS57C49C-45T [STMICROELECTRONICS]
HIGH SPEED 8K x 8 CMOS PROM/RPROM; 高速8K ×8 CMOS PROM / RPROM![WS57C49C-45T](http://pdffile.icpdf.com/pdf1/p00085/img/icpdf/WS57C49C_449788_icpdf.jpg)
型号: | WS57C49C-45T |
厂家: | ![]() |
描述: | HIGH SPEED 8K x 8 CMOS PROM/RPROM |
文件: | 总7页 (文件大小:55K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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WS57C49C
HIGH SPEED 8K x 8 CMOS PROM/RPROM
KEY FEATURES
• Ultra-Fast Access Time
• Pin Compatible with Bipolar PROMs
• Immune to Latch-UP
— Up to 200 mA
— t
= 25 ns
ACC
— t = 12 ns
CS
• Low Power Consumption
• Fast Programming
• ESD Protection Exceeds 2000 V
• Available in 300 Mil DIP and PLDCC
GENERAL DESCRIPTION
The WS57C49C is a High Performance 64K UV Erasable Electrically Re-Programmable Read Only Memory
(RPROM). It is manufactured in an advanced CMOS technology which enables it to operate at Bipolar PROM
speeds while consuming only 25% of the power required by its Bipolar counterparts. A further advantage of the
WS57C49C over Bipolar PROM devices is the fact that it utilizes a proven EPROM technology. This enables the
entire memory array to be tested for switching characteristics and functionality after assembly. Unlike devices which
cannot be erased, every WS57C49C in a windowed package is 100% tested with worst case test patterns both
before and after assembly.
The WS57C49C is configured in the standard Bipolar PROM pinout which provides an easy upgrade path for
systems which are currently using Bipolar PROMs, or its predecessor, the WS57C49B.
BLOCK DIAGRAM
PIN CONFIGURATION
TOP VIEW
EPROM ARRAY
65,536 BITS
8
ROW
DECODER
Chip Carrier
CERDIP/Plastic DIP
Flatpack
A5 - A12
ROW
ADDRESSES
NC
A
A
A
V
A
A
9
5
6
7
CC
8
A
A
A
A
A
A
A
A
O
O
O
1
V
A
A
A
24
23
22
21
20
19
18
17
16
15
14
13
7
6
5
4
3
2
1
0
0
1
2
CC
8
2
4
3
2
26
25
28 27
5
1
COLUMN
DECODER
3
A
A
A
A
A
5
6
7
8
9
A
9
4
3
2
1
0
10
A0 - A4
4
24
23
22
21
20
19
10
CS1/V
COLUMN
ADDRESSES
PP
5
CS1/V
PP
A
11
6
A
11
A
12
7
A
12
SENSE
AMPLIFIERS
NC
8
O
7
NC
10
O
7
O
9
O
6
O
O
0
11
12 13 14
6
10
11
12
16
18
15
17
O
5
O
4
O
CS1/VPP
GND
3
O
O
NC O
O
4 5
1
2
3
GND
8
OUTPUTS
PRODUCT SELECTION GUIDE
PARAMETER
57C49C-25
57C49C-35
35 ns
57C49C-45
45 ns
57C49C-55
55 ns
57C49C-70
70 ns
Address Access Time (Max)
CS to Output Valid Time (Max)
25 ns
12 ns
20 ns
25 ns
25 ns
25 ns
2-39
Return to Main Menu
WS57C49C
ABSOLUTE MAXIMUM RATINGS*
MODE SELECTION
Storage Temperature............................–65° to + 150°C
PINS
CS1/V
V
OUTPUTS
PP
CC
MODE
Voltage on any Pin with
Respect to Ground ....................................–0.6V to +7V
Read
V
V
V
V
V
V
D
OUT
IL
CC
CC
CC
CC
V
with Respect to Ground...................–0.6V to + 13V
PP
Output
Disable
High Z
ESD Protection..................................................>2000V
IH
Program
V
D
*
PP
IN
NOTICE:
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of
time may affect device reliability.
Program
Verify
V
D
OUT
IL
OPERATING RANGE
RANGE
TEMPERATURE
0°C to +70°C
V
CC
Commercial
Industrial
Military
+5V ± 10%
+5V ± 10%
+5V ± 10%
–40°C to +85°C
–55°C to +125°C
DC READ CHARACTERISTICS Over Operating Range. (See Above)
SYMBOL
VIL
PARAMETER
Input Low Voltage
Input High Voltage
Output Low Voltage
TEST CONDITIONS
MIN
MAX
0.8
UNITS
V
(Note 3)
–0.1
2.0
VIH
(Note 3)
VCC + 0.3
0.4
V
VOL
IOL = 16 mA
V
VOH
Output High Voltage IOH = –4 mA
2.4
V
Comm'l
30
35
35
40
50
50
mA
mA
mA
mA
mA
mA
VCC = 5.5 V, f = 0 MHz (Note 1),
Output Not Loaded
VCC Active Current
(CMOS)
ICC1
Industrial
Military
Add 3 mA/MHz for AC Operation
Comm'l
Industrial
Military
VCC = 5.5 V, f = 0 MHz (Note 2),
Output Not Loaded
VCC Active Current
(TTL)
ICC2
Add 3 mA/MHz for AC Operation
ILI
Input Leakage
Current
VIN = 5.5V or Gnd
–10
–10
10
10
µA
µA
ILO
Output Leakage
Current
VOUT = 5.5 V or Gnd
NOTES: 1. CMOS inputs: GND ± 0.3V or VCC ± 0.3V.
2. TTL inputs: VIL ≤ 0.8V, VIH ≥ 2.0V.
3. These are absolute voltages with respect to device ground pin and include all overshoots due to system and/or tester noise.
Do not attempt to test these values without suitable equipment.
2-40
WS57C49C
AC READ CHARACTERISTICS Over Operating Range. (See Above)
57C49C-25 57C49C-35 57C49C-45 57C49C-55 57C49C-70
PARAMETER
SYMBOL
UNITS
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
Address to Output Delay
CS1 to Output Delay
t
25
12
35
20
45
25
55
25
70
25
ACC
t
CS
ns
Output Disable to
Output Float*
t
12
25
25
25
25
DF
Address to Output Hold
t
0
0
0
0
0
OH
*Sampled, Not 100% Tested.
AC READ TIMING DIAGRAM
ADDRESSES
VALID
t
t
ACC
OH
CS
t
CS
OUTPUTS
VALID
t
DF
2-41
WS57C49C
CAPACITANCE(4) T = 25°C, f = 1 MHz
A
(5)
SYMBOL
PARAMETER
Input Capacitance
Output Capacitance
CONDITIONS
= 0V
TYP
4
MAX
6
UNITS
pF
C
C
C
V
IN
IN
V
= 0V
OUT
8
12
pF
OUT
VPP
V
Capacitance
V
= 0 V
PP
18
25
pF
PP
NOTES: 4. This parameter is only sampled and is not 100% tested.
5.Typical values are for T = 25°C and nominal supply voltages.
A
TEST LOAD (High Impedance Test Systems)
A.C. TESTING INPUT/OUTPUT WAVEFORM
98 Ω
3.0
2.01 V
TEST
POINTS
1.5
1.5
0.0
D.U.T.
30 pF
(INCLUDING SCOPE
AND JIG
CAPACITANCE)
A.C. testing inputs are driven at 3.0 V for a logic "1" and 0.0 V
for a logic "0." Timing measurements are made at 1.5 V for
input and output transitions in both directions.
NOTE: 6. Provide adequate decoupling capacitance as close as possible to this device to achieve the published A.C. and D.C. parameters.
A 0.1 microfarad capacitor in parallel with a 0.01 microfarad capacitor connected between V and ground is recommended.
CC
Inadequate decoupling may result in access time degradation or other transient performance failures.
2-42
WS57C49C
NORMALIZED SUPPLY CURRENT
TYPICAL ACCESS TIME CHANGE
vs.
vs.
SUPPLY VOLTAGE
OUTPUT LOADING
1.60
1.40
40.0
35.0
30.0
25.0
20.0
15.0
10.0
5.0
1.20
1.00
0.80
0.60
0.0
4.0
4.5
5.0
5.5
6.0
0.0
200
400
600
800
1000
(
)
SUPPLY VOLTAGE V
(
)
CAPACITANCE pF
NORMALIZED T
vs.
AMBIENT TEMPERATURE
NORMALIZED SUPPLY CURRENT
vs.
aa
AMBIENT TEMPERATURE
1.6
1.4
1.2
1.0
0.8
0.6
1.2
1.1
1.0
0.9
0.8
-55 -35 -15
5
25 45 65 85 105 125
-55 -35 -15
5
25 45 65 85 105 125
(
)
AMBIENT TEMPERATURE °C
AMBIENT TEMPERATURE (°C)
2-43
WS57C49C
PROGRAMMING INFORMATION
DC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V)
SYMBOLS
PARAMETER
MIN
MAX
UNITS
Input Leakage Current
(VIN = VCC or Gnd)
ILI
–10
10
µA
VPP Supply Current During
Programming Pulse
IPP
60
35
mA
mA
V
ICC
VOL
VCC Supply Current
Output Low Voltage During Verify
(IOL = 16 mA)
0.45
Output High Voltage During Verify
(IOH = –4 mA)
VOH
2.4
V
NOTES: 7. VPP must not be greater than 13 volts including overshoot.
AC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V)
SYMBOLS
PARAMETER
Address Setup Time
Chip Disable Setup Time
Data Setup Time
MIN
TYP
MAX
30
UNITS
µs
tAS
tDF
tDS
tPW
tDH
2
ns
2
100
2
µs
Program Pulse Width
Data Hold Time
200
30
µs
µs
t
t
Chip Select Delay
ns
CS
RF
V
Rise and Fall Time
1
µs
PP
PROGRAMMING WAVEFORM
VIH
ADDRESSES
ADDRESS STABLE
V
IL
t
AS
VIH
DATA
DATA IN
DATA OUT
V
IL
t
t
t
CS
PW
DH
t
t
DS
DF
V
PP
VIH
CS1/V
PP
t
RF
V
IL
t
RF
2-44
WS57C49C
WSI
ORDERING INFORMATION
OPERATING
SPEED
PART NUMBER
(ns)
PACKAGE
TYPE
PACKAGE
DRAWING
TEMPERATURE MANUFACTURING
RANGE
PROCEDURE
WS57C49C-25D
WS57C49C-25J
25
25
25
25
35
35
35
35
35
35
35
35
35
45
45
45
45
45
45
45
45
45
45
55
55
55
55
55
55
55
70
70
70
24 Pin CERDIP, 0.6"
28 Pin PLDCC
D1
J3
Comm’l
Comm’l
Comm'l
Comm’l
Military
Comm’l
Military
Comm’l
Comm’l
Comm'l
Comm’l
Industrial
Military
Military
Comm’l
Military
Comm’l
Industrial
Comm’l
Comm'l
Comm’l
Industrial
Military
Military
Comm’l
Military
Military
Comm’l
Comm’l
Military
Military
Comm’l
Military
Standard
Standard
WS57C49C-25S
WS57C49C-25T
WS57C49C-35CMB
WS57C49C-35D
WS57C49C-35DMB
WS57C49C-35J
24 Pin Plastic DIP, 0.3"
24 Pin CERDIP, 0.3"
28 Pad CLLCC
S1
T1
C1
D1
D1
J3
Standard
Standard
MIL-STD-883C
Standard
24 Pin CERDIP, 0.6"
24 Pin CERDIP, 0.6"
28 Pin PLDCC
MIL-STD-883C
Standard
WS57C49C-35L
28 Pin CLDCC
L2
S1
T1
T1
T1
C1
D1
D1
J3
Standard
WS57C49C-35S
WS57C49C-35T
WS57C49C-35TI
WS57C49C-35TMB
WS57C49C-45CMB*
WS57C49C-45D
WS57C49C-45DMB*
WS57C49C-45J
24 Pin Plastic DIP, 0.3"
24 Pin CERDIP, 0.3"
24 Pin CERDIP, 0.3"
24 Pin CERDIP, 0.3"
28 Pad CLLCC
Standard
Standard
Standard
MIL-STD-883C
MIL-STD-883C
Standard
24 Pin CERDIP, 0.6"
24 Pin CERDIP, 0.6"
28 Pin PLDCC
MIL-STD-883C
Standard
WS57C49C-45JI
WS57C49C-45L
28 Pin PLDCC
J3
Standard
28 Pin CLDCC
L2
S1
T1
T1
T1
C1
D1
D1
F1
J3
Standard
WS57C49C-45S
WS57C49C-45T
WS57C49C-45TI
WS57C49C-45TMB*
WS57C49C-55CMB*
WS57C49C-55D
WS57C49C-55DMB*
WS57C49C-55FMB*
WS57C49C-55J
24 Pin Plastic DIP, 0.3"
24 Pin CERDIP, 0.3"
24 Pin CERDIP, 0.3"
24 Pin CERDIP, 0.3"
28 Pad CLLCC
Standard
Standard
Standard
MIL-STD-883C
MIL-STD-883C
Standard
24 Pin CERDIP, 0.6"
24 Pin CERDIP, 0.6"
24 Pin Ceramic Flatpack
28 Pin PLDCC
MIL-STD-883C
MIL-STD-883C
Standard
WS57C49C-55T
WS57C49C-55TMB*
WS57C49C-70CMB*
WS57C49C-70D
WS57C49C-70TMB*
24 Pin CERDIP, 0.3"
24 Pin CERDIP, 0.3"
28 Pad CLLCC
T1
T1
C1
D1
T1
Standard
MIL-STD-883C
MIL-STD-883C
Standard
24 Pin CERDIP, 0.6"
28 Pin CERDIP, 0.3"
MIL-STD-883C
NOTE: The actual part marking will not include the initials "WS."
*SMD product. See section 4 for SMD number.
PROGRAMMING/ALGORITHMS/ERASURE/PROGRAMMERS
REFER TO
PAGE 5-1
The WS57C49C is programmed using Algorithm D shown on page 5-9.
2-45
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