HT0440_13 [SUPERTEX]

Dual, High Voltage, Isolated MOSFET Driver;
HT0440_13
型号: HT0440_13
厂家: Supertex, Inc    Supertex, Inc
描述:

Dual, High Voltage, Isolated MOSFET Driver

文件: 总6页 (文件大小:843K)
中文:  中文翻译
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HT0440  
Supertex inc.  
Dual, High Voltage,  
Isolated MOSFET Driver  
Features  
General Description  
The Supertex HT0440 is a dual, high voltage, isolated  
MOSFET driver utilizing Supertex’s proprietary HVCMOS®  
technology. It is designed to drive discrete MOSFETs  
configured as bidirectional or unidirectional switches. It  
can drive N-channel MOSFETs as high-side switches up to  
400V. The HT0440 generates two independent DC isolated  
voltages to the outputs, VOUTA and VOUTB when logic inputs A  
and B are at logic high.  
±400V input to output isolation  
±700V isolation between outputs  
No external voltage supply required  
Dual isolated output drivers  
Option of internal or external clock  
Applications  
Telecommunications  
Modems  
The internal clock of the HT0440 can be disabled by  
applying an external clock signal to the CLK pin. This allows  
the power dissipation and AC characteristics to be tailored  
to meet specific needs. The CLK pin should be connected  
to ground when not in use. The HT0440 does not require  
any external power supplies, the internal supply voltage is  
supplied by either of the two logic inputs, A or B, when they  
are at logic high.  
Solid state relays  
High side switches  
High end audio switches  
Avionics  
ATE  
For detailed circuit application information, please refer  
to application note AN-D26.  
Block Diagram  
Barrier  
CLK  
2
R
4
3
+
VOUT  
-
1
A
A
10R  
10R  
Driver A  
Driver B  
R
Logic &  
Internal  
Clock  
R
5
6
+
8
V
OUTB  
-
B
R
7
GND  
R = 158kΩ 47ꢀ  
Doc.# DSFP-HT0440  
D040313  
Supertex inc.  
www.supertex.com  
HT0440  
Pin Configurations  
Ordering Information  
Part Number Package Options  
HT0440K6-G 10-Lead (3x4) DFN  
Packing  
1
10  
9
A
B
2
CLK  
GND  
NC  
3000/Reel  
2500/Reel  
3
8
GND  
NC  
HT0440LG-G 8-Lead SOIC (Narrow Body)  
4
5
7
-VOUT  
A
-VOUTB  
-G denotes a lead (Pb)-free / RoHS compliant package  
6
+VOUTA  
+VOUTB  
Absolute Maximum Ratings  
Parameter  
10-Lead DFN  
(top view)  
Value  
Input to output isolation voltage, VISO  
Logic input voltage, VA, VB  
Maximum junction temperature  
Storage temperature  
±400V  
-0.5 to +7.0V  
+125°C  
A
CLK  
1
8
B
2
3
4
7
6
5
GND  
-VOUTA  
+VOUTA  
-VOUTB  
+VOUTB  
-55°C to +150°C  
Absolute Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation under these conditions is not implied. Continuous operation of the device  
at the absolute rating level may affect device reliability. All voltages are referenced to device  
ground.  
8-Lead SOIC (Narrow Body)  
(top view)  
Typical Thermal Resistance  
Product Marking  
Package  
θja  
Y = Last Digit of Year Sealed  
W = Code for Week Sealed  
L = Lot Number  
0440  
YWLL  
10-Lead DFN  
40OC/W  
101OC/W  
8-Lead SOIC (Narrow Body)  
= “Green” Packaging  
Package may or may not include the following marks: Si or  
10-Lead DFN  
YY = Year Sealed  
YYWW  
WW = Week Sealed  
HT04  
L = Lot Number  
LLLL  
= “Green” Packaging  
Package may or may not include the following marks: Si or  
8-Lead SOIC (Narrow Body  
Recommended Operating Conditions  
Sym  
CLK  
VIHCLK  
VILCLK  
VIH  
Parameter  
Min  
0.5  
3.15  
0
Typ  
Max  
Units Conditions  
External clock frequency  
Clock input high voltage  
Clock input low voltage  
Logic input high voltage  
Logic input low voltage  
Operating temperature  
-
-
-
-
-
-
2.0  
5.5  
0.5  
5.5  
0.5  
+85  
MHz  
V
---  
---  
---  
---  
---  
---  
V
3.15  
0
V
VIL  
V
TA  
-40  
OC  
Doc.# DSFP-HT0440  
D040313  
Supertex inc.  
www.supertex.com  
2
HT0440  
DC Electrical Characteristics (TA = 25°C unless otherwise specified)  
Sym  
Parameter  
Min  
Typ  
Max  
300  
500  
2.0  
Units Conditions  
-
-
-
-
-
-
-
-
-
-
µA  
µA  
VA = 3.5V, VB = 3.5V, CLK = 0V  
VA = 3.5V, VB = 3.5V, CLK = 500kHz  
I
HA + IHB Total logic high input current  
mA  
mA  
mA  
VA = 3.5V, VB = 3.5V, CLK = 2.0MHz  
VA = 5.5V, VB = 5.5V, CLK = 0V  
1.0  
2.0  
VA = 5.5V, VB = 5.5V, CLK = 500kHz  
VA = 3.15V, VB = 3.15V,  
CLK = 0V, no load  
6.0  
5.0  
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
VA = 3.15V, VB = 3.15V,  
CLK = 500kHz, no load  
VOUTA  
VOUTB  
,
VA = 3.15V, VB = 3.15V,  
CLK = 2.0MHz, no load  
Output voltage  
6.0  
VA = 4.5V, VB = 4.5V,  
CLK = 0V, no load  
10.0  
8.0  
VA = 4.5V, VB = 4.5V,  
CLK = 500KHz, no load  
IILA  
IILB  
Logic low input A current  
Logic low input B current  
Quiescent current  
-
-
-
-
-
-
10  
10  
10  
-
µA  
µA  
µA  
V
VA = 0.5V, VB = high  
-
-
VA = high, VB = 0.5V  
IILQ  
VA = 0.5V, VB = 0.5V  
VISO  
VCISO  
Input to output isolation voltage  
±400  
---  
---  
Output to output isolation voltage ±700  
-
V
AC Electrical Characteristics (TA =25°C unless otherwise specified)  
Sym  
td(ON)  
tr  
Parameter  
Min  
Typ  
Max  
Units Conditions  
Turn-ON delay time  
Rise time  
-
-
-
-
-
-
-
-
50  
µs  
µs  
650  
150  
3.0  
See timing diagram and test circuit  
CLK = 0V, CL = 600pF  
td(OFF)  
tf  
Turn-OFF delay time  
Fall time  
µs  
ms  
Truth Table  
A
0
0
B
CLK  
VOUT  
OFF  
OFF  
ON  
A
VOUT  
B
Internal Clock  
0
0
0
OFF  
ON  
OFF  
ON  
0
1
0
0
OFF  
ON  
ON  
1
0
0
0
ON  
ON  
CLK  
CLK  
CLK  
CLK  
OFF  
OFF  
ON  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
0
1
OFF  
ON  
1
ON  
Doc.# DSFP-HT0440  
D040313  
Supertex inc.  
www.supertex.com  
3
HT0440  
Timing Diagram  
4.5V  
50%  
50%  
V , V  
A
B
0V  
90%  
90%  
10%  
10%  
VOUTA, VOUT  
B
td(ON)  
tr  
td(OFF)  
tf  
Test Circuit  
4.5V  
0V  
1
8
4
3
VOUT  
A
A
B
+
VOUTA  
-
CL = 600pF  
HT0440  
2
7
5
6
CLK  
GND  
+
VOUT  
B
VOUT  
B
-
CL = 600pF  
Doc.# DSFP-HT0440  
D040313  
Supertex inc.  
www.supertex.com  
4
HT0440  
10-Lead DFN Package Outline (K6)  
3.00x4.00mm body, 1.00mm height (max), 0.50mm pitch  
D2  
D
10  
10  
E
E2  
Note 1  
(Index Area  
D/2 x E/2)  
Pin #1 ID  
R = 0.20  
Note 1  
(Index Area  
D/2 x E/2)  
1
e
1
b
View B  
Top View  
Bottom View  
Note 3  
L
θ
A
Seating  
Plane  
L1  
Note 2  
A1  
Side View  
View B  
Notes:  
1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or  
a printed indicator.  
2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present.  
3. The inner tip of the lead may be either rounded or square.  
Symbol  
A
A1  
b
D
D2  
E
E2  
e
L
L1  
0.00  
-
θ
0O  
-
MIN  
NOM  
MAX  
0.80  
0.90  
1.00  
0.00  
0.02  
0.05  
0.18  
0.25  
0.30  
2.95  
3.00  
3.05  
2.20  
2.35  
2.45  
3.95  
4.00  
4.05  
2.50  
2.65  
2.75  
0.30  
0.40  
0.50  
Dimension  
(mm)  
0.50  
BSC  
0.15  
14O  
Drawings not to scale.  
Supertex Doc. #: DSPD-10DFNK63X4P050, Version A072611  
Doc.# DSFP-HT0440  
D040313  
Supertex inc.  
www.supertex.com  
5
HT0440  
8-Lead SOIC (Narrow Body) Package Outline (LG)  
4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch  
θ1  
D
8
Note 1  
(Index Area  
D/2 x E1/2)  
E1  
E
Gauge  
Plane  
L2  
Seating  
Plane  
L
θ
1
L1  
Top View  
View B  
View B  
Note 1  
h
A
h
A2  
A
Seating  
Plane  
A1  
e
b
A
Side View  
View A-A  
Note:  
1. This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier;  
an embedded metal marker; or a printed indicator.  
Symbol  
A
A1  
A2  
b
D
E
E1  
e
h
L
L1  
L2  
θ
0O  
-
θ1  
5O  
-
MIN 1.35* 0.10 1.25 0.31 4.80* 5.80* 3.80*  
NOM 4.90 6.00 3.90  
MAX 1.75 0.25 1.65* 0.51 5.00* 6.20* 4.00*  
0.25 0.40  
Dimension  
(mm)  
1.27  
BSC  
1.04 0.25  
REF BSC  
-
-
-
-
-
-
0.50 1.27  
8O  
15O  
JEDEC Registration MS-012, Variation AA, Issue E, Sept. 2005.  
* This dimension is not specified in the JEDEC drawing.  
Drawings are not to scale.  
Supertex Doc. #: DSPD-8SOLGTG, Version I041309.  
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline  
information go to http://www.supertex.com/packaging.html.)  
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives  
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability  
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and  
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)  
©2013 Supertex inc.All rights reserved. Unauthorized use or reproduction is prohibited.  
Supertex inc.  
1235 Bordeaux Drive, Sunnyvale, CA 94089  
Tel: 408-222-8888  
www.supertex.com  
Doc.# DSFP-HT0440  
D040313  
6

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