TC2320 [SUPERTEX]

N- and P- Channel Enhancement-Mode Dual MOSFET; N-和P-沟道增强型MOSFET双


型号：	TC2320
厂家：	Supertex, Inc
描述：	N- and P- Channel Enhancement-Mode Dual MOSFET N-和P-沟道增强型MOSFET双
文件：	总3页 (文件大小：436K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TC2320

N- and P- Channel Enhancement-Mode Dual MOSFET

BV_DSS/BV_DGS

R_DS(ON)(max)

Order Number/Package

SO-8

N-Channel P-Channel N-Channel P-Channel

200V

-200V

7.0

TC2320TG

Low Threshold DMOS Technology

Features

❑

Low threshold

The SupertexTC2320TG consist of a high voltage low threshold N-

channel and P-channel MOSFET in an SO-8 package. These low

threshold enhancement-mode (normally-off) transistors utilize an

advanced vertical DMOS structure and Supertex’s well-proven

silicon-gate manufacturing process. This combination produces

devices with the power handling capabilities of bipolar transistors

and with the high input impedance and positive temperature

coefficient inherent in MOS devices. Characteristic of all MOS

structures, these devices are free from thermal runaway and

thermally-induced secondary breakdown.

Low on resistance

Independent, electrically isolated N- and P-channels

Low input capacitance

Fast switching speeds

Free from secondary breakdowns

Low input and output leakage

Supertex’s vertical DMOS FETs are ideally suited to a wide range

of switching and amplifying applications where very low threshold

voltage, high breakdown voltage, high input impedance, low input

capacitance, and fast switching speeds are desired.

Application

❑

Medical Ultrasound Transmitters

High voltage pulsers

Amplifiers

Buffers

Piezoelectric transducer drivers

General purpose line drivers

Logic level interfaces

Package Option

N-Channel

P-Channel

Absolute Maximum Ratings*

Drain-to-Source Voltage

BV_DSS

BV_DGS

±20V

Drain-to-Gate Voltage

Gate-to-Source Voltage

Operating and Storage Temperature

Soldering Temperature*

-55°C to +150°C

300°C

*Distance of 1.6mm from case for 10 seconds.

SO-8 Package

(top view)

04/23/02

Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability

indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to

workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the

Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.

TC2320

N-Channel Electrical Characteristics (@ 25°C unless otherwise specified)

Symbol

BV_DSS

V_GS(th)

∆V_GS(th)

I_GSS

Parameter

Drain-to-Source Breakdown Voltage

Gate Threshold Voltage

Min

200

0.6

Typ

Max

Unit

Conditions

I_D= 100µA, V_GS= 0V

V_GS= V_DS, I_D= 1mA

I_D= 1mA, V_GS= V_DS

V_GS= ±20V, V_DS= 0V

V_GS= 0V, V_DS= 100V

2.0

-4.5

100

Change in V_GS(th)with Temperature

Gate Body Leakage

mV/°C

I_DSS

Zero Gate Voltage Drain Current

1.0

10.0

1.0

µA

V_GS= 0V, V_DS= Max Rating

_GS= 0V, V_DS= 0.8 Max Rating

T_A= 125°C

I_D(ON)

ON-State Drain Current

0.6

1.2

V_GS= 4.5V, V_DS= 25V

V_GS= 10V, V_DS= 25V

R_DS(ON)

Static Drain-to-Source

ON-State Resistance

8.0

7.0

Ω

V_GS= 4.5V, I_D= 150mA

V_GS= 10V, I_D= 1.0A

∆R_DS(ON)

Change in R_DS(ON)with Temperature

Forward Transconductance

1.0

%/°C

V_GS= 4.5V, I_D= 150mA

V_DS= 25V, I_D= 200mA

Ω

G_FS

150

C_ISS

Input Capacitance

110

C_OSS

C_RSS

Common Source Output Capacitance

Reverse Transfer Capacitance

V_GS= 0V, V_DS= 25V, f = 1MHz

t_d(ON)

Turn-ON Delay Time

Rise Time

V_DD= 25V

I_D= 150mA

R_GEN= 25Ω

t_r

t_d(OFF)

t_f

Turn-OFF Delay Time

Fall Time

V_SD

t_rr

Diode Forward Voltage Drop

Reverse Recovery Time

1.8

I_SD= 200mA, V_GS= 0V

300

Notes:

1.All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)

2.All A.C. parameters sample tested.

Switching Waveforms and Test Circuit

V_DD

R_L

10V

90%

PULSE

GENERATOR

INPUT

OUTPUT

10%

R_gen

t_(ON)

t_d(ON)

t_(OFF)

t_d(OFF)

t_r

t_F

D.U.T.

V_DD

INPUT

10%

OUTPUT

90%

TC2320

P-Channel Electrical Characteristics (@ 25°C unless otherwise specified)

Symbol

BV_DSS

V_GS(th)

∆V_GS(th)

I_GSS

Parameter

Drain-to-Source Breakdown Voltage

Gate Threshold Voltage

Min

-200

-1.0

Typ

Max

Unit

Conditions

V_GS= 0V, I_D= -2mA

V_GS= V_DS, I_D= -1mA

V_GS= ± 20V, V_DS= 0V

-2.4

4.5

Change in V_GS(th)with Temperature

Gate Body Leakage

mV/°C

-100

-10

I_DSS

Zero Gate Voltage Drain Current

µA

V_GS= 0V, V_DS= Max Rating

V_GS= 0V, V_DS= 0.8 Max Rating

-1.0

T_A= 125°C

I_D(ON)

ON-State Drain Current

-0.25

-0.75

-0.7

-2.1

V_GS= -4.5V, V_DS= -25V

V_GS= -10V, V_DS= -25V

V_GS= -4.5V, I_D= -100mA

R_DS(ON)

Static Drain-to-Source

ON-State Resistance

Ω

8.0

V_GS= -10V, I_D= -200mA

∆R_DS(ON)

G_FS

C_ISS

C_OSS

C_RSS

t_d(ON)

t_r

Change in R_DS(ON)with Temperature

Forward Transconductance

Input Capacitance

1.7

%/°C

V_GS= -10V, I_D= -200mA

V_DS= -25V, I_D= -200mA

Ω

100

250

125

V_GS= 0V, V_DS= -25V

Common Source Output Capacitance

Reverse Transfer Capacitance

Turn-ON Delay Time

f = 1 MHz

Rise Time

t_d(OFF)

t_f

Turn-OFF Delay Time

Fall Time

V_SD

t_rr

Diode Forward Voltage Drop

Reverse Recovery Time

-1.8

V_GS= 0V, I_SD= -0.5A

300

Notes:

1.All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)

2.All A.C. parameters sample tested.

Switching Waveforms and Test Circuit

10%

PULSE

GENERATOR

INPUT

90%

-10V

R_gen

t_(ON)

t_d(ON)

t_(OFF)

t_d(OFF)

t_r

t_F

D.U.T.

OUTPUT

INPUT

90%

R_L

OUTPUT

V_DD

10%

V_DD

03/23/02

1235 Bordeaux Drive, Sunnyvale, CA 94089

TEL: (408) 744-0100 • FAX: (408) 222-4895

www.supertex.com

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