U4084B [TEMIC]

Low-Voltage, Voice-Switched Circuit for Hands-Free Operation; 低电压,语音电路交换的免提操作
U4084B
型号: U4084B
厂家: TEMIC SEMICONDUCTORS    TEMIC SEMICONDUCTORS
描述:

Low-Voltage, Voice-Switched Circuit for Hands-Free Operation
低电压,语音电路交换的免提操作

电信集成电路 电信电路 电话电路 光电二极管
文件: 总26页 (文件大小:544K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
U4084B  
Low-Voltage, Voice-Switched Circuit for Hands-Free Operation  
Description  
The low-voltage, voice-switched speakerphone circuit disable, dial tone detector and mute function etc.  
U4084B incorporates the features listed below. The ver- Due to low-voltage operation, it can be operated either by  
satility of the device is further enhanced by giving access low supply voltage or via a telephone line requiring  
to internal circuit points.  
4.0 mA typ. Further features are stand-alone operation  
The block diagram shows amplifiers, level detectors, via a coupling transformer (Tip and Ring) or in  
transmit and receive attenuators operating in comple- conjunction with a handset speech network, as shown in  
mentary functions, back ground noise monitors, chip figure 2.  
Features  
Benefits  
Low-voltage operation: 3.0 to 6.5 V  
Fast channel switching enables quasi duplex  
Attenuator gain range between  
transmit and receive: 52 dB  
operation  
Low current consumption for high output volume  
Optimized U3800BM interface  
Four-point signal sensing for improved sensitivity  
Monitoring system for background-noise level  
Microphone-amplifier gain adjustable  
Mute function  
Chip disable for active/ standby operation  
Dial tone detector  
Compatible with the speaker amplifier U4083B  
Case: DIP24 or SO24  
TELEFUNKEN Semiconductors  
1 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Block Diagram  
MIC  
8
MICO TLI2  
TI  
TO  
7
14  
6
5
T attenuator  
V
B
+
9
MUTE  
V
S
24  
CPR  
AGC  
13  
Background-  
noise monitor  
Background-  
noise monitor  
CPT  
20  
22  
22  
TLI1  
RLO1  
TLO1  
15  
Level  
detectors  
Attenuator  
control  
Level  
detectors  
TLO2  
RLO2  
16  
4
Dial tone  
detector  
V
S
+
1
3
GND  
CD  
V
B
400  
R attenuator  
U4084B  
12  
11  
17  
RLI2  
19  
18 10  
RI VCI  
23  
RLI1  
12626  
V
C
RECO  
B
T
Figure 1. Block diagram  
2 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Figure 2. Block diagram with external circuit  
TELEFUNKEN Semiconductors  
3 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Pin Description  
Pin Symbol  
Function  
Pin Symbol  
Function  
Response time.  
An RC at this pin sets the response  
time for the circuit to switch modes.  
1
2
3
GND Ground  
11  
C
T
NC  
CD  
Not connected  
Chip disable.  
12  
V
B
Output voltage V  
.
S/2  
A logic LOW (< 0.8 V) sets normal  
operation. A logic HIGH (> 2.0 V)  
disables the IC to conserve power.  
The input impedance is nominally  
90 k  
It is a system AC ground, and biases  
the volume control. A filter cap is  
required.  
13  
CPT  
An RC at this pin sets the time  
constant for the transmit background  
monitor.  
4
V
S
Supply voltage 2.8 to 6.5 V,  
approximately @ 4 mA.  
The AGC circuit reduces the receive  
attenuator gain @ 25 dB.  
Receive mode @ 2.8 V.  
14  
15  
TLI2 Transmit-level detector input on the  
microphone/ speaker side.  
TLO2 Transmit-level detector output on  
the microphone/ speaker side, and  
input to the transmit background  
monitor.  
5
6
TO  
TI  
Transmit attenuator output.  
The DC level is approximately V .  
B
Transmit attenuator input.  
Max. signal level is 350 mV  
The input impedance is approxi-  
mately 10 k  
.
16  
17  
18  
RLO2 Receive-level detector output on the  
microphone/ speaker side  
rms  
RLI2 Receive-level detector input on the  
microphone/ speaker side  
7
8
MICO Microphone amplifier output.  
The gain is set by external resistors.  
RI  
Input receive attenuator and dial-  
tone detector.  
MIC  
Microphone amplifier input.  
The bias voltage is approximately  
The max. input level is 350 mV  
.
rms  
V .  
The input impedance is approxi-  
mately 10 k  
B
9
MUTE Mute input.  
A logic LOW (< 0.8 V) sets normal  
19  
20  
21  
22  
RECO Receive attenuator output.  
DC level is approximately V .  
operation. A logic HIGH (> 2.0 V)  
mutes the microphone amplifier  
without affecting the rest of the  
circuit. The input impedance is  
nominally 90 k  
B
TLI1 Transmit-level detector input on the  
line side  
TLO1 Transmit-level detector output on  
the line side  
10  
VCI  
Volume control input.  
When VCI = V , the receive attenu-  
ator is at maximum gain in the  
receive mode.  
RLO1 Receive-level detector output on the  
line side, and input to the receive  
background monitor  
B
When VCI = 0.3 V , the receive  
gain is 35 dB lower. This does not  
affect the transmit mode.  
B
23  
24  
RLI1 Receive-level detector input on the  
line side  
CPR  
An RC at this pin sets the time  
constant for the receive background  
monitor  
4 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Absolute Maximum Ratings  
Reference point Pin 1, T  
= 25°C, unless otherwise specified.  
amb  
Parameters  
Symbol  
Value  
–1.0 to +7.0  
Unit  
V
Supply voltage  
Voltages  
Pin 4  
V
S
Pins 3 and 9  
Pin 10  
–1.0 to (V + 1.0)  
S
–1.0 to (V + 0.5)  
V
S
Pins 6 and 18  
–0.5 to (V + 0.5)  
S
Storage temperature range  
Junction temperature  
Ambient temperature range  
Power dissipation  
T
T
–55 to +150  
125  
–20 to +60  
°C  
°C  
°C  
stg  
j
T
amb  
T
amb  
= 60°C  
DIP24  
SO24  
P
P
650  
520  
mW  
tot  
tot  
Maximum Thermal Resistance  
Parameters  
Symbol  
Value  
Unit  
Junction ambient  
DIP24  
SO24  
R
thJA  
R
thJA  
100  
120  
K/W  
K/W  
Operation Recommendation  
Parameters  
Supply voltage  
CD input  
Test Conditions / Pins  
Symbol  
Min.  
3.5  
0
Typ.  
Max.  
6.5  
V
S
Unit  
V
V
Pin 4  
Pin3  
V
S
MUTE input  
Pin 9  
Output current  
Volume control input  
Attenuator input signal  
voltage  
Microphone amplifier  
Load current  
Pin 12  
Pin 10  
Pins 6 and 18  
I
500  
A
V
mV  
rms  
B
VCI  
0.3  
V
B
V
B
0
0
0
0
350  
40  
dB  
@ RECO, TO Pins 5, 19  
2.0  
1.0  
+60  
@ MICO  
Pin 7  
mA  
Ambient temperature range  
T
amb  
–20  
°C  
TELEFUNKEN Semiconductors  
5 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Electrical Characteristics  
T
amb  
= +25°C, V = 5.0 V, CD 0.8 V, unless otherwise specified  
S
Parameters  
Test Conditions / Pins  
Symbol  
Min.  
50.0  
Typ.  
Max.  
Unit  
Power supply  
Supply current  
V = 6.5 V, CD = 0.8 V  
V = 6.5 V, CD = 2.0 V  
I
4.0  
600.0  
6.0  
800.0  
mA  
A
S
S
S
CD input resistance  
CD input voltage  
V = V = 6.5 V  
R
CD  
90.0  
k
S
CD  
– High  
– Low  
V
CDH  
2.0  
0.0  
V
S
V
V
CDL  
0.8  
Output voltage  
V = 3.5 V  
V = 5.0 V  
S
V
B
1.3  
2.1  
V
S
1.8  
2.4  
Output resistance  
I
= 1.0 mA  
R
400.0  
54.0  
VB  
OVB  
Power supply rejection  
ratio  
C
= 220 F, f = 1.0 kHz  
PSRR  
dB  
dB  
VB  
Attenuators  
Receive attenuator gain  
f = 1.0 kHz, V = V  
CI B  
R mode, RI = 150 mV  
G
R
4.0  
6.0  
8.0  
rms  
(V = 5.0 V)  
S
R mode, RI = 150 mV  
rms  
(V = 3.5 V)  
S
Gain change  
V = 3.5 V vs. V = 5.0 V  
G
G
–0.5  
0.0  
+0.5  
–15.0  
–17.0  
54.0  
S
S
R1  
AGC gain change  
Idle mode  
–V = 2.8 V vs. V = 5.0 V  
–25.0  
–20.0  
52.0  
S
S
R2  
RI = 150 mV  
G
RI  
–22.0  
49.0  
27.0  
dB  
rms  
Range R to T mode  
Volume control range  
RECO DC voltage  
RECO DC voltage  
RECO high voltage  
G
R3  
R mode, 0.3 V < V < V  
V
CR  
35.0  
dB  
V
B
CI  
B
R mode  
V
V
B
RECO  
R to T mode  
V
RECO  
mV  
V
10  
150.0  
I = 1.0 mA  
O
V
3.7  
RECOH  
RI = V + 1.5 V  
B
RECO low voltage  
I = 1.0 mA  
V
–1.5  
10.0  
–1.0  
14.0  
V
k
O
RECOL  
RI = V –1.0 V,  
B
output measured w.r.t. V  
B
RI input resistance  
RI < 350 mV  
R
RI  
7.0  
rms  
Transmit attenuator gain  
f = 1.0 kHz  
T mode, TI = 150 mV  
Idle mode, TI = 150 mV  
Range T to R mode  
G
4.0  
–22.0  
49.0  
6.0  
–20.0  
52.0  
8.0  
–17.0  
54.0  
rms  
T
G
TI  
G
TI  
dB  
rms  
TO DC voltage  
TO DC voltage  
TO high voltage  
T mode  
V
TO  
V
TO  
V
V
B
T to R mode  
mV  
100  
150.0  
I
= –1.0 mA  
O
TI = V + 1.5 V  
V
3.7  
7.0  
V
V
B
TOH  
TO low voltage  
I = +1.0 mA  
V
–1.5  
–1.0  
14.0  
O
TOL  
TI = V – 1.0 V,  
B
output measured w.r.t. V  
B
TI input resistance  
Gain tracking  
TI < 350 mV  
R
10.0  
0.5  
k
rms  
TI  
G
R + G  
T, @ T, Idle, R  
G
dB  
TR  
6 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Parameters  
Test Conditions / Pins  
Pin 14 – V  
Symbol  
Min.  
Typ.  
Max.  
Unit  
Attenuator control  
C voltage  
V
CT  
T
B
R mode, V = V  
Idle mode  
T mode  
240.0  
0.0  
–240.0  
CI  
B
mV  
C source current  
R mode  
T mode  
I
–85.0  
40.0  
–60.0  
60.0  
0.0  
–40.0  
85.0  
A
A
T
CTR  
C sink current  
T
I
CTT  
C slow idle current  
T
I
A
CTS  
C fast idle internal  
resistance  
R
1.5  
2.0  
3.6  
20.0  
k
T
FI  
VCI input current  
I
–60.0  
15.0  
nA  
VCI  
Dial tone detector  
threshold  
V
DT  
10.0  
mV  
Microphone amplifier V  
< 0.8 V, G  
= 31 dB  
MUTE  
VCL  
Output offset  
V
V ,  
MICO  
vos  
–50.0  
70.0  
0.0  
+50.0  
mV  
MICO –  
B
Feedback R = 180 k  
Open loop gain  
f < 100 Hz  
G
VOLM  
80.0  
1.0  
dB  
MHz  
V
Gain bandwidth  
GBW  
M
Output high voltage  
Output low voltage  
Input bias current (MIC)  
Muting ( gain)  
I = –1.0 mA, V = 5.0 V  
O
V
MICOH  
3.7  
S
I = +1.0 mA  
O
V
MICOL  
200.0  
mV  
nA  
I
–40.0  
BM  
G
f = 1.0 kHz, V  
300 Hz < f < 10 kHz  
= 2.0 V  
–55.0  
dB  
dB  
MUTE  
G
–68.0  
90.0  
MUTE input resistance  
MUTE input high  
MUTE input low  
Distortion  
V
V
= 6.5 V  
R
MUTE  
50.0  
2.0  
k
S = MUTE  
V
MUTEH  
V
S
V
V
%
V
MUTEL  
0.0  
0.8  
300 Hz < f < 10 kHz  
THD  
0.15  
1.0  
M
Level detectors and background-noise monitors  
Transmit receive switching Ratio of current  
I
0.8  
1.2  
TH  
threshold  
at RLI1 + RLI2 to 20 A  
at TLI1 + TLI2 to switch  
from T to R  
Source current  
Sink current  
at RLO1, RLO2, TLO1,  
TLO2  
I
I
–2.0  
4.0  
mA  
A
LSO  
LSK  
at RLO1, RLO2, TLO1,  
TLO2  
CPR, CPT output  
resistance  
I = 1.2 mA  
R
150  
–0.2  
O
CP  
CPR, CPT leakage current  
System distortion  
R mode  
I
A
CPLK  
From RI to RECO  
d
d
0.5  
0.8  
3.0  
3.0  
%
%
R
T mode  
From MIC to TO includes  
T attenuator  
T
TELEFUNKEN Semiconductors  
7 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Temperature Characteristics  
Parameter  
Typical Value @ 25°C  
4.0 mA  
Typical Change –20 to +60°C  
–0.3%/°C  
Supply current, CD = 0.8 V  
Supply current, CD = 2.0 V  
I
I
S
400.0 A  
2.1 V  
–0.4%/°C  
S
V output voltage, V = 5.0 V  
V
O
+0.8%/°C  
B
S
Attenuator gain (max. gain)  
+6.0 dB  
–46.0 dB  
10.0 k  
0.0008 dB/°C  
0.004 dB/°C  
+0.6%/°C  
Attenuator gain (max. attenuation)  
Attenuator input resistance (@ TI, RI)  
Dial-tone detector threshold  
15.0 mV  
60.0 A  
0.0 mV  
+20.0 V/°C  
0.15%/°C  
CT source, sink current  
Microphone, hybrid offset  
4.0 V/°C  
0.02%/°C  
10.0 nA/°C  
Transmit receive switching threshold  
Sink current at RLO1, RLO2, TLO1, TLO2  
1.0  
4.0 A  
8 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Introduction  
General  
Transmit and Receive Attenuators  
TI, TO and RI, RECO  
The fundamental difference between the operation of a  
speakerphone and a handset is that of half-duplex versus  
full-duplex. The handset is full-duplex since conversation  
can occur in both directions (transmit and receive) simul-  
taneously. A speakerphone has higher gain levels in both  
paths, and attempting to converse full-duplex results in  
oscillatory problems due to the loop that exists within the  
system. The loop is formed by the receive and transmit  
paths, the hybrid and the acoustic coupling (speaker to  
microphone).  
The attenuators are operating complementary, i.e., when  
one is at maximum gain (+6.0 dB), the other is at maxi-  
mum attenuation (–46 dB), and vice versa, i.e., both are  
never completely on or off. The sum of their gains re-  
mains constant (within a nominal error band of 0.5 dB)  
at a typical value of –40 dB (see figure 8). The attenuators  
control the transmit and receive paths to provide the half-  
duplex operation required in a speakerphone.  
The attenuators are non-inverting, and have a –3.0 dB  
(from max. gain) frequency of approximately 100 kHz.  
The input impedance of each attenuator (TI and RI) is  
nominally 10 k (see figure 3). To prevent distortion the  
Today, the only practical and economical solution is to de-  
sign the speakerphone in half-duplex mode, i.e., only one  
person speaks at a time, while the other listens. To achieve  
this, a circuit able to detect who is talking, to switch-on  
the appropriate path (transmit or receive) and to switch-  
off (attenuate) the other path is necessary. In this way, the  
loop gain is maintained less than unity. The circuit has to  
detect quickly a change from one speaker to the other and  
to switch the circuit accordingly. Due to its speech-level  
detectors, the circuit operates in a “hands-free” mode,  
eliminating the need for a “push-to-talk” switch.  
input signal should be limited to 350 mV . The maxi-  
rms  
mum recommended input signal is independent from the  
volume control setting. The diode clamp on the inputs  
limits the input swing, and therefore the maximum nega-  
tive output swing. The output impedance is less than 10  
until the output current limit (typically 2.5 mA) is  
reached.  
12627  
V
11 kΩ  
B
The handset has the same loop as the speakerphone.  
Oscillations do not occur because the gains are consider-  
ably lower, and there is almost no coupling from the  
earpiece to the mouthpiece (the receiver is normally held  
at a person’s ear).  
5 kΩ  
95 kΩ  
RI 18  
TI 6  
C
T
11  
The U4084B provides the level detectors, attenuators,  
and switching control necessary for proper operation of  
the speakerphone. The detection sensitivity and timing  
are externally controllable. Additionally, the U4084B  
provides background-noise monitors which make the  
circuit insensitive to room and line noise, hybrid  
amplifiers for interfacing to tip and ring, the microphone  
amplifier, and other associated functions.  
Figure 3. Attenuator input stage  
The attenuators are controlled by the signal output of the  
control block which is measurable at the C pin (Pin 11).  
T
When the C pin is at +240 mV w.r.t. V , the circuit is in  
T
B
receive mode (the receive attenuator is at 6.0 dB). When  
the C pin is at –240 mV w.r.t. V , the circuit is in transmit  
T
B
mode (the transmit attenuator is at 6.0 dB). The circuit is  
in idle mode when the C voltage is equal to V causing  
T
B
the attenuators’ gain to be half-way between their ful-  
ly-on and fully-off position (–20 dB each). Monitoring  
the C voltage (w.r.t. V ) is the most direct method of  
T
B
monitoring the circuit’s mode.  
The attenuator control has seven inputs: two from the  
comparators operated by the level detectors, two from the  
background noise monitors, volume control, dial-tone  
detector, and AGC. They are described as follows:  
TELEFUNKEN Semiconductors  
9 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
rator goes to the attenuator control block. Likewise,  
outputs RLO2 and TLO2 feed a second comparator which  
also goes to the attenuator control block. The truth table  
for the effects of the level detectors is given in the section  
“Attenuator Control Block.  
Level Detectors, Figure 4  
There are four level detectors, two on the receive side and  
two on the transmit side. As shown in figure 4, the terms  
in parentheses form one system, and the other terms form  
the second system. Each level detector is a high-gain  
amplifier with back-to-back diodes in the feedback path,  
resulting in a non-linear gain which permits operation  
over a wide dynamic range of speech levels. Refer to  
figures 9, 10 and 11 for their AC and DC transfer charac-  
teristics. The sensitivity of each level detector is  
determined by the external resistor and capacitor at each  
input (TLI1, TLI2, RLI1, and RLI2). Each output charges  
an external capacitor through a diode and limiting  
resistor, thus providing a DC representation of the input  
AC signal level. The outputs have a quick rise time (deter-  
mined by the capacitor and an internal 350- resistor),  
and a slow decay time set by an internal current source  
and the capacitor. The capacitors on the four outputs  
should have the same value ( 10%) to prevent timing  
problems.  
Background-Noise Monitors  
The background-noise monitiors distinguish speech  
(which consists of bursts) from background noise (a rela-  
tively constant signal level). There are two  
background-noise monitors – one for the receive path and  
the other for the transmit path. Referring to figure 4, the  
receive background-noise monitor is operated by the  
TLI2–TLO2 level detector.  
Background-noise monitoring is carried out by storing a  
DC voltage representative of the respective noise levels  
in capacitors at CPR and CPT. The voltages at these pins  
have slow rise times (determined by the external RC), but  
fast decay times. If the signal at RLI1 (or TLI2) changes  
slowly, the voltage at CPR (or CPT) will remain being  
On the receive side, one level detector (RLI1) is at the more positive than the voltage at the non-inverting input  
receive input receiving the same signal as at tip and ring, of the monitor’s output comparator. When speech is  
and the other (RLI2) is at the output of the speaker ampli- present, the voltage on the non-inverting input of the  
fier (see figure 2). On the transmit side, one level detector comparator will rise quicker than the voltage at the  
(TLI2) is at the output of the microphone amplifier while inverting input (due to the burst characteristic of speech),  
the other (TLI1) is at the hybrid output. Outputs RLO1 causing its output to change. This output is sensed by the  
and TLO1 feed a comparator. The output of this compa- attenuator control block”.  
VS  
Level detector  
Background-noise monitor  
100k  
24  
A  
(13)  
CPR  
(CPT)  
23  
RLI1 (14)  
(TLI2)  
+
+
+
350Ω  
47µF  
VB  
+
22 (15)  
5.1kΩ  
RLO1  
(TLO2)  
56kΩ  
36 mV  
0.1µF  
33kΩ  
F  
12  
VB  
Signal  
input  
Level detector  
C4 (C3)  
A  
VB  
C2 (C1)  
+
+
20  
350Ω  
F  
to  
Comparator  
(17)  
TLI1  
(RLI2)  
21 (16)  
attenuator  
control  
block  
TLO1  
(RLO2)  
5.1kΩ  
0.1µF  
12673  
Signal input  
Figure 4. Level detectors  
10 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
The 36-mV offset at the comparator’s input keeps the  
comparator from changing state unless the speech level  
exceeds the background noise by approximately 4.0 dB.  
The time constant of the external RC (approximately  
4.5 s) determines the response time to background-noise  
variations.  
to R attenuator  
RI  
18  
to attenuator  
control  
C4  
Volume Control  
V
B
12674  
The volume control input at VCI (Pin 10) is sensed as a  
voltage w.r.t. V . It affects the attenuators only in receive  
mode and has no effect in the idle or transmit modes.  
B
Figure 5. Dial-tone detector  
AGC  
In receive mode, the receive attenuator gain, G , is  
R
6.0 dB, and the transmit attenuator gain, G , is –46 dB  
The AGC circuit affects the circuit only in receive mode,  
T
under the condition that VCI = V . When VCI < V , the  
and only when the supply voltage is less than 3.5 V. As V  
B
B
S
receive attenuator gain is reduced (figure 10), whereas the  
transmit attenuator gain is increased. Their sum,  
however, remains constant. A voltage deviation at VCI  
< 3.5 V, the gain of the receive attenuator is reduced (see  
figure 13). The transmit path attenuation changes such  
that the sum of the transmit and receive gains remains  
constant.  
changes the voltage at C , which in turn controls the  
T
attenuators (see “Attenuator Control Block”).  
The purpose of this feature is to reduce the power (and the  
current) used by the speaker when a line-powered  
speakerphone is connected to a long line where the  
available power is limited. By reducing the speaker  
The volume control setting does not affect the maximum  
attenuator input signal at which noticeable distortion  
occurs.  
power, the voltage sag at V is controlled, preventing  
S
possible erratic operation.  
The bias current at VCI is typically –60 nA. It does not  
vary significantly with the VCI voltage or supply voltage  
V .  
S
Attenuator Control Block  
The attenuator control block has seven inputs:  
Dial-Tone Detector  
The output of the comparator operated by RLO2 and  
TLO2 (microphone/speaker side) – designated C1  
The dial-tone detector is a comparator with one side  
connected to the receive input (RI) and the other to V  
with a 15-mV offset (see figure 5). If the circuit is in idle  
mode, and the incoming signal is greater than 15 mV (10  
B
The output of the comparator operated by RLO1 and  
TLO1 (Tip/Ring side) – designated C2  
The output of the transmit background-noise monitor  
– designated C3  
mV ), the comparator’s output will change, disabling  
rms  
the receive idle mode. The receive attenuator will then be  
at a setting determined mainly by the volume control.  
The output of the receive background-noise monitor  
– designated C4  
This circuit prevents the dial tone (which would be  
considered as continuous noise) from fading away as the  
circuit would have the tendency to switch to the idle  
mode. By disabling receive idle mode, the dial tone  
remains at the normally expected full level.  
The volume control  
The dial-tone detector  
The AGC circuit  
TELEFUNKEN Semiconductors  
11 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
The single output of the control block controls the two  
attenuators. The effect of C1–C4 is as follows:  
b) the transmit background-noise monitor indicates  
the presence of speech  
2. The circuit will switch to receive mode if:  
Inputs  
Output  
Mode  
C1  
T
C2  
T
C3  
1
C4  
X
Y
Y
1
a) both receive level detectors sense higher signal  
levels relative to the respective transmit level  
detectors, and  
Transmit  
Fast idle  
Fast idle  
Receive  
Slow idle  
Slow idle  
Slow idle  
Slow idle  
T
R
T
Y
Y
X
0
R
R
T
b) the receive background-noise monitor indicates  
the presence of speech  
R
T
X
0
3. The circuit will switch to fast idle mode if the level  
detectors disagree on the relative strengths of the  
signal levels, and at least one of the background-  
noise monitors indicates speech. If, e.g., there is a  
signal at the microphone amp output (TLI2) to over-  
ride the speaker signal (RLI2) and there is sufficient  
signal at the receive input (RLI1) to override the  
signal at the hybrid output (TLI1), and either one or  
both background monitors indicate speech, then the  
circuit switches to fast idle mode.  
T
R
T
0
R
R
0
0
R
X
0
X = don’t care; Y = C3 and C4 are not both 0.  
Terms Definition  
11. “Transmit” means the transmit attenuator is fully on  
(+ 6.0 dB), and the receive attenuator is at max. atten-  
uation (– 46 dB).  
Undesired switching to idle mode may occur if one  
of the following conditions is met:  
12. “Receive” means both attenuators are controlled by  
the volume control. At max. volume, the receive  
attenuator is fully on (+ 6.0 dB), and the transmit  
attenuator is at max. attenuation (– 46 dB).  
a) when both persons speaking try to talk at the  
same time, and  
b) when one of the persons speaking is in a very  
noisy environment, forcing the other one to con-  
tinually override that noise level.  
13. “Fast Idle” means both transmit and receive speech  
are present in approximately equal levels. The  
attenuators are quickly switched (30 ms) to idle until  
one speech level dominates the other.  
In general, fast idle mode occurs rarely.  
4. The circuit will switch to slow idle mode when  
14. “Slow Idle” means speech has ceased in both transmit  
and receive paths. The attenuators are then slowly  
switched (1 s) to idle mode.  
a) both persons at the phone are quiet (no speech  
present), or  
15. Switching to the full transmit of receive modes from  
any other mode is at the fast rate ( 30 ms).  
b) when the speech levelof one of the persons  
talking is continuously overriden by noise at the  
other speaker’s location.  
Summary  
The time required to switch the circuit between  
transmit, receive, fast idle and slow idle mode is  
deter-mined in part by the components at Pin 11,  
(see the section “Switching Times” for a more  
1. The circuit will switch to transmit mode if:  
a) both transmit level detectors sense higher signal  
levels relative to the respective receive level  
detectors (TLI1 versus RLI1, TLI2 versus RLI2),  
and  
detailed explanation). A schematic of the C  
circuitry is shown in figure 6.  
T
12 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
V
R
B
12  
11  
to attenuators  
T
+
2kΩ  
C
T
I
1
4
Attenuator  
control  
C
C1 ... C4  
T
I
2
Volume control  
Dial-tone detector  
AGC  
60µA  
12675  
Figure 6. CT attenuator control block circuit  
Operation of the CT Circuitry  
Microphone Amplifier, Pins 7, 8 and 9  
The non-inverting input of the microphone amplifier  
R is typ. 120 k and C is typ. 5.0 F.  
T T  
(Pins 7 and 8) is connected to V , while the inverting in-  
B
To switch to receive mode, I is turned on (I is  
1
2
put and the output are pinned out.  
off), charging the external capacitor to + 240 mV  
Unlike most op amps, the amplifier has an all NPN output  
stage which maximizes phase margin and gain band-  
width. This feature ensures stability at gains less than  
unity, as well with a wide range of reactive loads.  
above V (An internal clamp prevents further  
B.  
charging of the capacitor).  
To switch to transmit mode, I is turned on (I is  
2
1
off) bringing down the voltage on the capacitor  
The open loop gain is typically 80 dB (f < 100 Hz), and  
the gain-bandwidth is typ. 1.0 MHz (see figure 4). The  
to – 240 mV with respect to V .  
B
maximum p-p output swing is typ. (V – 1 V) with an out-  
S
To switch to idle mode quickly (fast idle), the  
current sources are turned off, and the internal  
2.0-k resistor is switched on, discharging the  
put impedance of < 10 until current limiting is reached  
(typ. 1.5 mA). The input bias current at MIC is typically  
– 40 nA.  
capacitor to V with a time constant = 2.0 k  
B
C .  
T
To switch to idle slowly (slow idle), the current  
sources are turned off, the switch at the 2.0-k  
resistor is open, and the capacitor discharges to  
V
R
S
MF  
7
+
V
R
B
MI  
8
9
V with a time constant = R  
C .  
T
B
T
MICO  
MIC  
from  
Mike  
V
S
90kΩ  
MUTE  
75kΩ  
12676  
Figure 7. Microphone amplifier and mute  
TELEFUNKEN Semiconductors  
13 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
When activated, the muting function (Pin 9) reduces the  
gain of the amplifier to approximately – 39 dB (with RMI  
= 5.1 k ) by shorting the output to the inverting input (see  
10  
0
figure 7). The mute input has  
a threshold of  
approximately 1.5 V, and the voltage at this pin must be  
– 10  
– 20  
– 30  
– 40  
– 50  
kept within the range of ground and V (see figure 15). If  
R attenuator  
S
T attenuator  
the mute function is not used, the pin should be grounded.  
Power Supply, VB, and Chip Disable  
The power supply voltage at Pin 4 (V ) is between 3.5 and  
S
6.5 V for normal operation. Reduced operation at 2.8 V  
is, however, also possible (see figure 13 and the AGC  
section). The power supply current is shown in figure 16  
for both operations, power-up and power-down mode.  
– 320  
– 160  
0
160  
320  
V
– V (mV)  
CT  
B
93 7767 e  
The output voltage at V (Pin 12) is approximately  
B
(V –0.7)/2. and provides the AC ground for the system.  
Figure 8. Attenuator gain versus VCT (Pin 11)  
S
The output impedance at V is approximately 400 (see  
B
figure 17), and forms together with the external capaci-  
500  
tor at V  
a low-pass filter for power supply rejection.  
B
Figure 18 indicates the amount of rejection for different  
capacitors. The capacitor values depend on whether the  
circuit is powered by the telephone line or a power supply.  
400  
300  
200  
100  
0
Since V biases the microphone amplifier, the amount of  
B
supply rejection at its output is directly related to the  
rejection at V , as well as its gain. Figure 19 depicts this  
B
graphically.  
The chip disable (Pin 3) permits powering down the IC to  
conserve power and/or for muting purposes. With CD  
< 0.8 V, normal operation is in effect.  
0
– 20  
– 40  
– 60  
– 80  
– 100  
With CD > 2.0 V and < V , the IC is powered down. In  
I ( A)  
S
I
93 7768 e  
the power-down mode, the microphone amplifier is  
disabled, and its output goes to a high impedance state.  
Additionally, the bias is removed from the level detectors.  
Figure 9. Level-detector DC transfer characteristics  
300  
The bias is not removed from the attenuators (Pins 5, 6,  
18 and 19), or from Pins 10, 11 and 12 (the attenuators are  
disabled, however, and will not pass a signal). The input  
impedance at CD is typically 90 k and has a threshold  
of approximately 1.5 V. The voltage at this pin must be  
R = 5.1 k  
C = 0.1  
F
250  
R = 10 k  
200  
150  
100  
C = 0.047 F or 0.1  
F
kept within the range of ground and V (see figure 15). If  
S
CD is not used, the pin should be grounded.  
f = 1 kHz  
50  
0
4
60  
80  
100  
0
20  
V (mVrms)  
i
93 7769 e  
Figure 10. Level-detector AC transfer characteristics  
14 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
10  
0
20  
10  
0
v = 10 mV  
– 10  
– 20  
– 30  
– 40  
i
– 10  
v = 40 mV  
i
– 20  
– 30  
– 40  
100  
1000  
f (Hz)  
10000  
3.6  
2.8  
3
3.2  
V (V)  
3.4  
93 7772 e  
S
93 7770 e  
Figure 11. Level-detector AC transfer characteristics  
versus frequency  
Figure 13. Receive attenuation gain versus VS  
10  
120  
100  
80  
120  
0
100  
80  
– 10  
60  
60  
– 20  
Receive mode  
40  
40  
Gain  
– 30  
20  
0
20  
0
Minimum recommended level  
– 40  
1000  
0.1  
0.3  
0.5  
VCI/V  
0.7  
0.9  
1.2  
0
1
10  
100  
94 7871 e  
93 7771 e  
f (kHz)  
B
Figure 12. Receive attenuator versus volume control  
Figure 14. Microphone amplifier open loop gain and phase  
versus frequency  
TELEFUNKEN Semiconductors  
15 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
120  
100  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
V
= 6 V  
S
Valid for 0 CD, MUTE  
V →  
S
80  
60  
40  
20  
0
V
= 3.5 V  
S
8
2
4
6 6.5  
0
0
0.5  
1.0  
1.5  
2.0  
2.5  
93 7774 e  
93 7776 e  
Input Voltage (V)  
–I (mA) (Load Current)  
B
Figure 15. Input characteristics @ CD, MUTE  
6
Figure 17. VB output characteristics  
80  
60  
C
VB  
= 1000  
F
500  
200  
100  
50  
F
F
F
F
4
CD 0.8V  
2
40  
20  
2V CD  
V
S
0
8
0
2
4
6
2
0.3  
1
3
f (kHz)  
93 7778 e  
94 7880 e  
V ( V )  
S
Figure 16. Supply current versus supply voltage  
Figure 18. VB power-supply rejection versus frequency  
characteristics and VB capacitor  
16 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Design Hints  
of the level detectors’ outputs to new speech is quick by  
comparison (approximately 1.0 ms), determined by the  
Switching Time, Figure 6  
The switching time of the U4084B circuit is determined  
internal 350  
resistor and the external capacitor  
by C (Pin 11, refer to figure 6), and the capacitors at the  
(typically 2.0 F). The output’s decay time is determined  
by the external capacitor, and an internal 4.0- A current  
source giving a decay rate of 60 ms for a 120 mV  
excursion at RLO or TLO. The total response time of the  
circuit is not constant as it depends on the relative strength  
of the signals at the different level detectors and the  
timing of the signals with respect to each other. The  
capacitors at the four outputs (RLO1, RLO2, TLO1,  
TLO2) must have equal values ( 10%) to prevent  
problems in timing and level response.  
T
level-detector outputs (RLO1, RLO2, TLO1, TLO2), see  
figure 2.  
The switching time from idle to receive or transmit mode  
is determined by the capacitor at C , together with the  
T
internal current sources. The switching time is:  
V
CT  
5
T
I
240  
20.0 ms  
60  
The rise time of the level detector’s outputs is too short  
to be of significant. The decay time, however provides a  
significant part of the “hold time” necessary to hold the  
circuit during the normal pauses in speech.  
where:  
V
T
=
=
=
240 mV  
5 F  
60 A  
C
I
The components at the inputs of the level detectors (RLI1,  
RLI2, TLI1, TLI2) do not affect the switching time but  
rather affect the relative signal levels required to switch  
the circuit and the frequency response of the detectors.  
If the circuit switches directly from receive to transmit  
mode (or vice-versa), the total switching time is 40 ms.  
The switching time depends on the mode selection. If the  
circuit is switching to “fast idle”, the time constant is Design Equations  
determined by the C capacitor, and the internal 2.0-k  
T
Following definitions are used @ 1.0 kHz with reference  
to figures 2 and 21 whereas coupling capacitors are  
omitted for the sake of simplicity:  
resistor. With C = 5.0 F, the time constant is  
T
approximately 10 ms, resulting in a switching time of  
approximately 30 ms (for 95% change). Fast idle is mode  
may occur if both persons are talking at the same time,  
thus trying to get control of the circuit. The switching  
time from idle back to either transmit or receive mode is  
described above.  
G
MA  
is the gain of the microphone amplifier  
measured from the microphone output to TI  
(typically 35 V/V, or 31 dB);  
G
is the gain of the transmit attenuator,  
T
By switching to “slow idle”, the time constant is  
measured from TI to TO;  
determined by the C capacitor and R , the external  
T
T
G
EXT  
is the gain of an external transmit amplifier  
resistor (see figure 6). With C = 5.0 F, and R = 120 k ,  
T
T
(typically 10.2 V/V, or 20.1 dB)  
the time constant is approximately 600 ms, resulting a  
switching time of approximately 1.8 seconds (for 95%  
change). The switching to slow idle starts when both  
speakers have stopped talking. The switching time back  
to the original mode depends on how fast that person  
starts talking again. The sooner the speaking starts during  
the 1.8-second period, the faster the switching time since  
a smaller voltage excursion is required. The switching  
time is determined by the internal current source as  
described above.  
G
G
is the side-tone gain;  
ST  
is the gain of an external receive amplifier;  
EXR  
G is the gain of the receive attenuator measured  
R
from RI to RECO;  
G
is the gain of the speaker amplifier, mea-  
SA  
sured from RECO to the differential output of the  
speaker amplifier (typically 22 V/V or 26.8 dB);  
The above switching times occur after the level detectors  
have detected the appropriate signal levels, since their  
outputs operate the attenuator control block. The rise time  
G
AC  
is the acoustic coupling, measured from the  
speaker differential voltage to the microphone  
output voltage.  
TELEFUNKEN Semiconductors  
17 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
6
5
60  
40  
20  
MICO  
MICO,  
4
3
2
C
VB  
= 1000  
F
TO,RO  
TO  
RO  
= 220  
F
1
0
0
0
10  
1
3
4
5
6
94 7870 e  
94 7872 e  
f (kHz)  
V
(V)  
S
Figure 19. Power supply rejection of the microphone amplifier  
Figure 20. Typical output swing versus VS  
MIC amp.  
MICO  
ext. Transmit. amp.  
TI  
TO  
12677  
T attenuator  
I1  
R1  
R2  
I2  
TLI1  
Comparator  
C1  
Comparator  
C2  
Tip  
+
+
Acoustic  
coupling  
Attenuator  
control  
GST  
Hybrid  
+
+
Ring  
RLI2  
I3  
RLI1  
I4  
R3  
R4  
R attenuator  
SAO  
RECO  
RI  
Speaker amp.  
ext. Receive amp.  
Figure 21. Basic block diagram for design purposes  
18 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
I) Loop Gain  
The total loop gain (of figure 21) must add up to a value  
< 0 dB to obtain a stable circuit. This can be expressed as:  
VM  
R2  
GEXT  
2
I2  
GMA  
GT  
. . . . . . 7  
GMA + GT + GEXT + GST + GEXR + GR + GSA + GAC < 0  
. . . . . . 1  
Since G  
is the differential gain of the external transmit  
EXT  
amplifiers, it is divided by two to obtain the voltage V  
2
applied to R . Comparator C2 switches when I = I . I is  
defined by:  
2
4
2
4
Using the typical numbers mentioned above, and using  
the equation G + G = –40dB, the required acoustic cou-  
T
R
VL  
R4  
pling can be determined:  
I4  
[GEXR  
]
. . . . . . 8  
G
AC  
<–[31 + 20.1 + (–15) + 0 + (–40) + 26.8] + –22.9  
Setting I = I , and combining the above equations results  
in:  
4
2
. . . . . . 2  
An acoustic loss of at least 23 dB is necessary to prevent  
instability and oscillations, commonly referred to as  
“singing”. However, the following equations show that  
greater values of acoustic loss are necessary to obtain  
proper level detection and switching.  
R4  
R2  
[GMA  
GT  
GEXR  
GEXT  
]
VL  
VM  
. . . 9  
2
This equation defines the line voltage at Tip/Ring neces-  
sary to switch comparator C2 in the presence of a  
microphone voltage. The highest V occurs when the  
L
II) Switching Thresholds  
circuit is in transmit mode (G = + 6.0 dB). Using the  
T
typical values for equation 9 yields:  
To switch comparator C1, the currents I and I have to  
1
3
be determined. When a receive signal V is applied to  
L
V = 840 V (or V = 0.0019 V ) . . . . . . 10  
L
M
M
L
Tip/Ring, a current I flows through R3 into RLI2 (see  
3
At idle mode, where the gain of the two attenuators is –20  
dB (0.1 V/V), equations 6 and 10 yield the same result:  
figure 21) according to the following equation:  
VL  
R3  
GSA  
2
V
= 0.024 V . . . . . . 11  
L
M
I3  
GEXR  
GR  
. . . . . . 3  
Equations 6, 10, and 11 define the thresholds for switch-  
ing, and are represented in figure 22.  
where the terms in the brackets are in V/V gain terms. The  
speaker amplifier gain is divided by two since G is the  
differential gain of the amplifier, and V is obtained from  
one side of that output. The current I , coming from the  
microphone circuit, is defined by:  
SA  
The “M” terms are the slopes of the lines (0.52, 0.024, and  
0.0019) which are the coefficients of the three equations.  
The M line represents the receive to transmit threshold  
in that it defines the microphone signal level necessary to  
switch to transmit in the presence of a given receive signal  
level. The M line represents the transmit to receive  
3
1
R
VM  
GMA  
I1  
. . . . . . 4  
T
R
1
threshold. The M line represents the idle condition, and  
I
defines the threshold level on one side (transmit or  
receive) necessary to overcome noise on the other.  
where V is the microphone voltage. Since the switching  
M
threshold occurs when I = I , combining the above two  
1
3
equations yields:  
MR  
R1  
R3  
[GEXR  
GR  
GMA  
GSA]  
VM  
VL  
. . . 5  
VM  
2
MI  
This is the general equation defining the microphone volt-  
age necessary to switch comparator C1 when a receive  
signal V is present. The highest V occurs when the  
L
M
receive attenuator is at maximum gain (+ 6.0 dB). Using  
the typical values of equation 5 results in:  
MT  
V
M
= 0.52 V  
. . . . . . 6  
L
To switch comparator C2, the currents I and I need to  
2
4
be determined. When sound is applied to the microphone,  
VL  
12678  
a voltage V is created by the microphone, resulting in  
M
a current I into TLI1:  
Figure 22. Switching thresholds  
2
TELEFUNKEN Semiconductors  
19 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Some comments on the graph (figure 22):  
threshold can be reduced by connecting a resistor from RI  
to ground. The resistor value is calculated from:  
Acousting coupling and side-tone coupling were not  
included in equations 6 and 11. Those couplings will  
affect the actual performance of the final speaker-  
phone due to their interaction with speech at the  
microphone, and the receive signal coming in at Tip/  
Ring. The effects of those couplings are difficult to  
predict due to their associated phase shifts and fre-  
quency response. In some cases, the coupling signal  
will add, and other times substract from the incoming  
signal. The physical design of the speakerphone en-  
closure, as well as the specific phone line to which it  
is connected, will affect the acoustic and side-tone  
couplings, respectively.  
VB  
V
R
10 k  
– 1  
where V is the voltage at Pin 12, and V the amount of  
threshold reduction. By connecting a resistor from V to  
RI, the threshold can be increased. The resistor value is  
calculated from:  
B
S
VS–V  
R
10 k  
B – 1  
V
where V is the amount of the threshold increase.  
Background-Noise Monitors  
For testing or circuit analysis purposes, the transmit or  
receive attenuators can be set to the “on” position by  
disabling the background noise monitors, and applying a  
signal so as activate the level detectors. Grounding the  
CPR pin will disable the receive background-noise  
monitor, thereby indicating the “presence of speech” to  
the attenuator control block. Grounding CPT does the  
same for the transmit part.  
The M line helps define the maximum acoustic  
coupling permissible in a system, which can be found  
from the following equation:  
R
R1  
GAC(MAX(  
. . . . . 12  
2
R3 GMA  
Equation 12 is independent of the volume control setting.  
Conversely, the acoustic coupling of a designed system  
helps determine the minimum slope of that line. Using the  
component values of figure 2 in equation 12 yields a  
Additionally, the receive background-noise monitor is  
automatically disabled by the dial-tone detector when-  
ever the receive signal exceeds the detector’s threshold.  
G
of –37 dB. Experience has shown, however,  
AC(MAX)  
that an acoustic coupling loss of >40 dB is desirable.  
Transmit/Receive Detection Priority  
The M line helps define the maximum sidetone cou-  
T
pling (G ) permissible in the system, which can be  
ST  
Although the U4084B was designed to have an idle mode  
such that the attenuators are halfway between their full-on  
and full-off positions, the idle mode can be biased towards  
the transmit or the receive side. By doing so, gaining  
control of the circuit from idle will be easier for that side  
towards which it is biased since that path will have less  
attenuation at idle.  
found from the following equation:  
R1  
R2  
GST  
. . . . . 13  
2
Using the component values of figure 2 in equation 13  
yields a maximum side-tone of 0 dB. Experience has  
shown, however, that a minimum of 6.0-dB loss is prefer-  
able.  
By connecting a resistor from C (Pin 11) to ground, the  
T
circuit will be biased towards the transmit side. The resis-  
tor value is calculated from:  
The above equations can be used to determine the resistor  
values for the level detector inputs. Equation 5 can be  
used to determine the R , 3 ratio and equation 9 can be  
VB  
V
1
R
RT  
– 1  
used to determine the R –R ratio. In figure 21, R –R  
1
2
1
4
each represent the combined impedance of the resistor  
and coupling capacitor at each level detector input. The  
magnitude of each RC’s impedance should be kept within  
the range of 2.0 to 15 k in the voiceband (due to the typi-  
cal signal levels present) to obtain the best performance  
from the level detectors. The specific R and C at each  
location will determine the frequency response of that  
level detector.  
where:  
R = 120 k (typ.) connected between Pin 11 and 12.  
T
V = V – V11 (see figure 8).  
B
By connecting a resistor from C (Pin 11) to V , the cir-  
cuit will be biased towards the receive side. The resistor  
value is calculated from:  
T
S
VS – VB  
R
RT  
– 1  
V
Application Information  
The switching time will be somewhat affected in each  
case due to the different voltage excursions required to get  
Dial-Tone Detector  
The threshold for the dial-tone detector is internally set at to transmit and receive from idle. For practical consider-  
15 mV (10 mV ) below V (see figure 5). That ations, the V shift should not exceed 100 mV.  
rms  
B
20 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Applications  
TELEFUNKEN Semiconductors  
21 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
22 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
TELEFUNKEN Semiconductors  
23 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
0.05µF  
36kΩ  
0.05µF  
6.2kΩ  
0.1µF  
5.1kΩ  
0.1µF  
5.1kΩ  
2µF  
300kΩ  
300kΩ  
15µF  
15µF  
2µF  
0.1µF 0.1µF  
2µF  
2µF  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
U4084B  
1
2
3
5
6
4
7
8
9
10  
11  
12  
220µF  
0.1µF  
120kΩ  
620Ω  
20µF  
5µF  
220pF  
0.1µF  
180kΩ  
1.5MΩ  
1kΩ  
0.2µF  
5.1kΩ  
0.02µF  
12682  
24 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Package Information  
Package DIP24 (CEI)  
Dimensions in mm  
15.49  
14.99  
32.26  
31.24  
4.06  
3.56  
0.89  
0.38  
13.97  
12.70  
3.81  
3.18  
0.38  
0.20  
17.02  
15.24  
1.65  
1.02  
0.58  
0.38  
2.54  
27.94  
24  
13  
technical drawings  
according to DIN  
specifications  
13041  
1
12  
9.15  
8.65  
Package SO24  
Dimensions in mm  
15.55  
15.30  
7.5  
7.3  
2.35  
0.25  
0.10  
0.25  
0.4  
10.50  
10.20  
1.27  
13.97  
24  
13  
technical drawings  
according to DIN  
specifications  
13037  
1
12  
TELEFUNKEN Semiconductors  
25 (26)  
Rev. A1, 31-Jan-97  
Preliminary Information  
U4084B  
Ozone Depleting Substances Policy Statement  
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to  
1. Meet all present and future national and international statutory requirements.  
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems  
with respect to their impact on the health and safety of our employees and the public, as well as their impact on  
the environment.  
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as  
ozone depleting substances (ODSs).  
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and  
forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban  
on these substances.  
TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of  
continuous improvements to eliminate the use of ODSs listed in the following documents.  
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively  
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental  
Protection Agency (EPA) in the USA  
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.  
TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain  
such substances.  
We reserve the right to make changes to improve technical design and may do so without further notice.  
Parameters can vary in different applications. All operating parameters must be validated for each customer  
application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized  
application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of,  
directly or indirectly, any claim of personal damage, injury or death associated with such unintended or  
unauthorized use.  
TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany  
Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423  
26 (26)  
TELEFUNKEN Semiconductors  
Rev. A1, 31-Jan-97  
Preliminary Information  

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