U6084B [TEMIC]
PWM Power Control with Automatic Duty Cycle Reduction; PWM功率控制，具有自动占空比降低
| 型号： | U6084B |
| 厂家： | 
TEMIC SEMICONDUCTORS |
| 描述： | PWM Power Control with Automatic Duty Cycle Reduction |
| 文件： | 总8页 (文件大小：142K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
U6084B
PWM Power Control with Automatic Duty Cycle Reduction
Description
The U6084B is a bipolar technology PWM-IC designed applications. For a constant brightness the preselected
for the control of an N-channel power MOSFET used as duty cycle can be reduced automatically as a function of
a high-side switch. The IC is ideal for use in the brightness the supply voltage.
control (dimming) of lamps such as, in dashboard
Features
Pulse width modulation up to 2 kHz clock frequency
Interference and damage protection according to
VDE 0839 and ISO/TR 7637/1.
Protection against short circuit, load-dump
overvoltage and reverse V
S
Charge pump noise suppressed
Ground wire breakage protection
Duty cycle 0 to 100 % continuously
Output stage for power MOSFET
Ordering Information
Extended Type Number
U6084B–FP
Package
SO16
Remarks
Block Diagram
V
Batt
C
5
V
S
R
sh
16
11
9
12
13
14
Short circuit
Current monitoring
latch monitoring
+ short circuit detection
5
6
Charge
pump
RC oscillator
C
47 nF
PWM
Logic
C
1
3
47 k
Control input
Output
3
C
2
Duty cycle
range
0–100%
Voltage
monitoring
Enable/
disable
Duty cycle
reduction
2
4
1
95 9751
C
6
R
3
150
Ground
Figure 1. Block diagram with external circuit
TELEFUNKEN Semiconductors
1 (8)
Rev. A1, 14-Feb-97
U6084B
Pin Description
Pin
1
Symbol
GND
Function
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
S
IC ground
2
En / Dis Enable/disable
Control input (duty cycle)
Reduct Duty cycle reduction
En / Dis
NC
3
V
I
4
V
I
Output
5
NC
Osc
Attenuation
6
Oscillator
7
NC
Not connected
Not connected
Status short circuit latch
Not connected
Short circuit protection delay
Current sensing
Voltage doubler
Output
Reduct
2 V
S
8
NC
9
Latch
NC
Attenuation
Osc
Sense
Delay
10
11
12
13
14
15
16
Delay
Sense
2V
NC
S
NC
NC
Output
NC
Not connected
Latch
V
S
Supply voltage V
S
95 9754
Pin 4, Duty Cycle Reduction
Functional Description
With Pin 4 connected according to figure 2, the set duty
cycle is reduced as from V 12.5 V. This causes a
power reduction in the FET and in the lamps. In addition,
the brightness of the lamps is largely independent of the
Pin1, GND
Batt
Ground-Wire Breakage
supply voltage range, V
= 12.5 to 16 V.
Batt
To protect the FET in the case of ground-wire breakage,
a 820 k resistor between gate and source it is recom-
mended to provide proper switch-off conditions.
Output Slope Control
The rise and fall time (t , t ) of the lamp voltage can be
r
f
limited to reduce radio interference. This is done with an
integrator which controls a power MOSFET as source fol-
lower. The slope time is controlled by an external
capacitor C4 and the oscillator current (see figure 2).
Pin 2, Enable/Disable
The dimmer can be switched on or off with pin 2 indepen-
dently of the set duty cycle.
Calculation:
C4
tf
tr
VBatt
V
Function
Disable
Iosc
2
Approx. >0.7 V or open
With V
Batt
= 12 V, C = 470 pF and I = 40 A,we thus
4
osc
obtain a controlled slope of
< 0.7 V or connected to Pin 1 Enable
470 pF
tf
tr
12 V
141 s
Pin 3, Control Input
40
A
Pin 5, Attenuation
The pulse width is controlled by means of an external po-
tentiometer (47 k ). The characteristic (angle of
rotation/duty cycle) is linear. The duty cycle can be varied
from 0 to 100%. It is possible to further restrict the duty
Capacitor C connected to Pin 5 damps oscillation
4
tendencies.
Pin 6, Oscillator
cycle with the resistors R and R (see figure 2).
1
2
Pin 3 is protected against short-circuit to V
and ground
The oscillator determines the frequency of the output
Batt
GND (V
16.5 V).
voltage. This is defined by an external capacitor, C . It is
Batt
2
2 (8)
TELEFUNKEN Semiconductors
Rev. A1, 14-Feb-97
U6084B
charged with a constant current, I, until the upper switch- A selection of different values of C and C , provides a
2
4
ing threshold is reached. A second current source is then range of oscillator frequency, f, from 10 to 2000 Hz.
activated which taps a double current, 2 I, from the
charging current. The capacitor, C , is thus discharged by
2
Pins 7, 8, 10 and 15
the current, I, until the lower switching threshold is
reached. The second source is then switched off again and
the procedure starts once more.
Not connected.
Example for Oscillator Frequency Calculation
Pin 9, Status Short Circuit Latch
(
)
R3
VT100
VT
VS
VS
VBatt
IS
IS
1
1
(
)
R3
VBatt
VBatt
100
2
2
The status of the short-circuit latch can be monitored via
Pin 9 (open collector output).
(
)
R3
VTL
VS
IS
3
3
where
VT100
Pin 9
L
H
Function
Short-circuit detected
No short-circuit detected
High switching threshold (100% duty cycle)
High switching threshold ( 100% duty cycle)
Low switching threshold
VT
100
VTL
Pins 11 and 12, Short-Circuit Protection
and Current Sensing
,
and are fixed constant.
3
1
2
The above mentioned threshold voltages are calculated
for the following values given in the data sheet.
1. Short-Circuit Detection and Time Delay, t
d
V
Batt
= 12 V, I = 4 mA, R = 150
,
S
3
= 0.7, = 0.67 and = 0.28.
1
2
3
The lamp current is monitored by means of an external
shunt resistor. If the lamp current exceeds the threshold
(
)
VT100
VT
12 V 4 mA 150
11.4 V 0.67
11.4 V 0.28
0.7
8 V
for the short-circuit detection circuit (V
90 mV), the
T2
7.6 V
3.2 V
duty cycle is switched over to 100% and the capacitor C
100
5
is charged by a current source of 20 A (I – I ). The
ch
dis
VTL
external FET is switched off after the cut-off threshold
(V ) is reached. Renewed switching on the FET is pos-
T11
For a duty cycle of 100%, an oscillator frequency, f, is
as follows:
sible only after a power-on reset. The current source, I
dis,
ensures that the capacitor C is not charged by parasitic
5
Iosc
currents. The capacitor C is discharged by I to typ.
0.7 V.
5
dis
f
, where C2
and Iosc
22 nF
A
(
)
2
VT100 VTL
C2
40
Therefore:
f
Time delay, t , is as follows:
d
40
A
189 Hz
(
)
2
8 V 3.2 V
22 nF
(
) ( )
td
C5 VT11 0.7 V Ich Idis
For a duty cycle of less than 100%, the oscillator fre-
quency, f, is as follows:
With C = 330 nF and V
= 12 V, we have
Iosc
5
Batt
f
(
)
2
VT
VTL
C2
4
VBatt C4
100
( )
330 nF 9.8 V 0.7 V 20 A
td
whereas
C = 470 pF
4
40
A
2
7.6 V 3.2 V
22 nF
4
12 V 470 pF
150 ms.
185 Hz
TELEFUNKEN Semiconductors
3 (8)
Rev. A1, 14-Feb-97
U6084B
2. Current Limitation
Pin 16, Supply Voltage, Vs or VBatt
Undervoltage Detection:
The lamp current is limited by a control amplifier that
protects the external power transistor. The voltage drop
across an external shunt resistor acts as the measured vari-
able. Current limitation takes place for a voltage drop of
In the event of voltages of approx. V
ternal FET is switched off and the latch for short-circuit
detection is reset.
< 5.0 V, the ex-
Batt
V
V
100 mV.
Owing
to
the
difference
T1
A hysteresis ensures that the FET is switched on again at
–V
10 mV, current limitation occurs only when
T1
T2
approximately V
5.4 V.
Batt
the short-circuit detection circuit has responded.
After a power-on reset, the output is inactive for half an
oscillator cycle. During this time , the supply voltage ca-
pacitor can be charged so that current limitation is
guaranteed in the event of a short circuit when the IC is
switched on for the first time.
Overvoltage Detection
Stage 1
If overvoltages V
> 20 V (typ.) occur, the external
Batt
transistor is switched off and switched on again at
< 18.5 V (hysteresis).
V
Batt
Stage 2
Pins 13 and 14, Charge Pump and Output
If V
> 28.5 V (typ.), the voltage limitation of the IC
Batt
is reduced from 26 V to 20 V. The gate of the external
transistor remains at the potential of the IC ground, thus
producing voltage sharing between FET and lamps in the
event of overvoltage pulses occuring (e.g., load-dump).
The short-circuit protection is not in operation. At
Output, Pin 14, is suitable for controlling a power MOS-
FET. During the active integration phase, the supply
current of the operational amplifier is mainly supplied by
the capacitor C (bootstrapping). Additionally, a trickle
3
V
Batt
< 23 V, the overvoltage detection stage 2 is
charge is generated by an integrated oscillator
switched off.
(f
400 kHz) and a voltage doubler circuit. This per-
13
mits a gate voltage supply at a duty cycle of 100%.
Absolute Maximum Ratings
Parameters
Junction temperature
Symbol
Value
150
Unit
°C
T
j
Ambient temperature range
Storage temperature range
T
–40 to +110
–55 to +125
°C
amb
T
°C
stg
Thermal Resistance
Parameters
Symbol
Value
120
Unit
K/W
Junction ambient
R
thJA
Electrical Characteristics
T
amb
= –40 to +110°C, V
= 9 to 16.5 V, (basic function is guaranteed between 6.0 V to 9.0 V) reference point ground,
Batt
unless otherwise specified (see figure 1). All other values refer to Pin GND (Pin 1).
Parameters
Current consumption
Supply voltage
Test Conditions / Pins
Pin 16
Overvoltage detection,
stage 1
Symbol
Min.
Typ.
Max.
6.8
25
Unit
mA
V
I
S
V
Batt
Stabilized voltage
Battery undervoltage
detection
I = 10 mA
– on
– off
Pin 16
V
24.5
4.4
4.8
27.0
5.6
6.0
V
V
S
S
V
Batt
5.0
5.4
4 (8)
TELEFUNKEN Semiconductors
Rev. A1, 14-Feb-97
U6084B
Parameters
Test Conditions / Pins
Symbol
Min.
Typ.
Max.
Unit
Battery overvoltage detection
Pin 2
Stage 1:
– on
– off
– on
– off
V
V
18.3
16.7
25.5
19.5
20.0
18.5
28.5
23.0
21.7
20.3
32.5
26.5
V
V
V
Batt
Stage 2:
Batt
Stabilized voltage
Short-circuit protection
I = 30 mA
S
Pin 16
Pin 12
V
18.5
20.0
21.5
Z
Short-circuit current limita-
tion
Short-circuit detection
V
V
= V – V
V
85
100
120
mV
T1
S
12
T1
= V – V
V
T2
75
3
90
10
105
30
mV
mV
T2
S
12
VT1 – VT2
Delay timer short circuit detection
Pin 11
Switched off threshold
Charge current
Dicharge current
Capacitance current
Output short-circuit latch
Saturation voltage
Voltage doubler
V
= V – V
V
T11
9.5
13
9.8
23
3
10.1
V
A
A
T11
S
11
I
ch
I
dis
I = I – I
5
I
20
27
mA
ch
dis
5
Pin 9
I = 100 A
9
V
sat
150
350
mV
Pin 13
Voltage
Oscillator frequency
Internal voltage limitation
Duty cycle 100%
= 5 mA
V
2 V
S
280
26
13
f
400
27.5
520
30.0
kHz
V
13
I
V
V
13
13
(whichever is lower)
(V
)
(V
)
(V
)
13
S+14
S+15
S+16
Gate output
Pin 14
Voltage
Low level
V
14
0.35
0.70
0.95
V
V
Batt
= 16.5 V,
1.5 *)
T
amb
= 110 °C, R = 150
3
High level,
duty cycle 100%
V
V
13
14
14
Current
V
14
= Low level
I
1.0
mA
V14 = High level, I13 > | I14
Pin 2
|
–1.0
Enable/ Disable
Current
Duty cycle reduction
Z-voltage
Oscillator
Frequency
V = 0 V
I
–20
6.9
–40
7.4
–60
8.0
A
V
2
2
Pin 4
Pin6
I = 500 A
4
V
4
f
10
2000
0.72
Hz
Threshold cycle
Upper
0.68
0.7
VT100
VS
1
V14
V14
3
High,
Low,
1
0.65
0.26
0.67
0.28
0.69
0.3
VT
2
100
2
VS
VTL
VS
3
Lower
Oscillator current
V
Batt
= 12 V
I
26
40
54
A
osc
Frequency tolerance
C open, C = 470 nF,
f
6.0
9.9
13.5
Hz
4
2
duty cycle = 50%
*)
Reference point is battery ground.
TELEFUNKEN Semiconductors
5 (8)
Rev. A1, 14-Feb-97
U6084B
Application
Figure 2.
6 (8)
TELEFUNKEN Semiconductors
Rev. A1, 14-Feb-97
U6084B
Dimensions in mm
Package SO16
Dimensions in mm
5.2
4.8
10.0
9.85
3.7
1.4
0.2
0.25
0.10
0.4
3.8
1.27
6.15
5.85
8.89
16
9
technical drawings
according to DIN
specifications
13036
1
8
TELEFUNKEN Semiconductors
7 (8)
Rev. A1, 14-Feb-97
U6084B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to
1. Meet all present and future national and international statutory requirements.
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems
with respect to their impact on the health and safety of our employees and the public, as well as their impact on
the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as
ozone depleting substances (ODSs).
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and
forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban
on these substances.
TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of
continuous improvements to eliminate the use of ODSs listed in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency (EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.
TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain
such substances.
We reserve the right to make changes to improve technical design and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each customer
application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized
application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of,
directly or indirectly, any claim of personal damage, injury or death associated with such unintended or
unauthorized use.
TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423
8 (8)
TELEFUNKEN Semiconductors
Rev. A1, 14-Feb-97
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