74AC11241NT [TI]
OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS;
| 型号： | 74AC11241NT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS 驱动 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总7页 (文件大小：95K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
54AC11241, 74AC11241
OCTAL BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS032A – JULY 1987 – REVISED APRIL 1993
54AC11241 . . . JT PACKAGE
74AC11241 . . . DB, DW OR NT PACKAGE
• 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
(TOP VIEW)
• Flow-Through Architecture Optimizes
PCB Layout
1Y1
1Y2
1Y3
1
24
23
22
21
20
19
18
17
16
15
14
13
1G
• Center-Pin V
and GND Configurations
Minimize High-Speed Switching Noise
CC
2
1A1
1A2
1A3
1A4
3
• EPIC (Enhanced-Performance Implanted
4
1Y4
CMOS) 1- m Process
5
GND
GND
GND
GND
2Y1
2Y2
2Y3
2Y4
6
V
• 500-mA Typical Latch-Up Immunity
at 125°C
CC
7
V
CC
8
2A1
2A2
2A3
2A4
2G
• Package Options Include Plastic Small-
Outline Packages, Plastic Shrink
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
9
10
11
12
description
54AC11241 . . . FK PACKAGE
(TOP VIEW)
This octal buffer or line driver is designed
specifically to improve both the performance
and density of three-state memory address
drivers, clock drivers, and bus-oriented receivers
4
3
2 1 28 27 26
5
25
24
23
22
21
20
2A3
2A4
2G
NC
2Y4
2Y3
1A2
1A1
1G
and transmitters.
Taken together with the
6
AC11240 and AC11244, these devices provide
the choice of selected combinations of inverting
and noninverting outputs, symmetrical G (active-
low output control) inputs, and complementary
G and G inputs. This device features a high
fan-out.
7
8
NC
9
1Y1
1Y2
1Y3
10
11
19 2Y2
12 13 14 15 16 17 18
The 54AC11241 is characterized for operation
over the full military temperature range of – 55°C
to 125°C. The 74AC11241 is characterized for
operation from – 40°C to 85°C.
NC – No internal connection
FUNCTION TABLE
OUTPUT
CONTROL INPUT
DATA
OUTPUT
CONTROL INPUT
DATA
OUTPUT
1Y
OUTPUT
2Y
1G
H
L
1A
X
2G
2A
Z
L
L
X
Z
L
L
H
L
L
H
H
H
H
H
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54AC11241, 74AC11241
OCTAL BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS032A – JULY 1987 – REVISED APRIL 1993
†
logic symbol
logic diagram (positive logic)
24
24
1G
EN
1G
23
22
21
20
1
2
3
4
1Y1
1A1
1A2
1A3
1A4
23
1
2
3
4
1A1
1Y1
1Y2
1Y3
1Y4
1Y2
1Y3
1Y4
22
1A2
21
1A3
13
2G
EN
20
1A4
17
16
15
14
9
10
11
12
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
13
2G
17
9
10
11
2A1
2Y1
2Y2
2Y3
2Y4
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
16
2A2
15
2A3
14
12
2A4
Pin numbers shown are for the DW, JT, and NT packages.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous current through V
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 200 mA
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54AC11241, 74AC11241
OCTAL BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS032A – JULY 1987 – REVISED APRIL 1993
recommended operating conditions
54AC11241
MIN NOM
74AC11241
MIN NOM
UNIT
MAX
MAX
V
V
Supply voltage
3
2.1
5
5.5
3
2.1
5
5.5
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
High-level input voltage
V
V
= 4.5 V
= 5.5 V
= 3 V
3.15
3.85
3.15
3.85
IH
0.9
1.35
1.65
9.9
1.35
1.65
V
IL
Low-level input voltage
= 4.5 V
= 5.5 V
V
V
Input voltage
0
0
V
0
0
V
V
V
I
CC
CC
Output voltage
V
CC
–4
V
CC
–4
O
V
V
V
V
V
V
= 3 V
CC
CC
CC
CC
CC
CC
I
High-level output current
Low-level output current
mA
mA
= 4.5 V
= 5.5 V
= 3 V
–24
–24
12
–24
–24
12
24
24
10
5
OH
I
= 4.5 V
= 5.5 V
24
OL
24
Data
G
0
0
10
0
0
t/ v
Input transition rise or fall rate
Operating free-air temperature
ns/V
5
T
A
–55
125
–40
85
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
54AC11241
74AC11241
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
2.9
TYP
MAX
MIN
2.9
4.7
5.4
2.4
3.7
4.7
3.85
MAX
MIN
2.9
MAX
3 V
4.5 V
5.5 V
3 V
I
= – 50
A
4.4
4.4
OH
5.4
5.4
I
I
= – 4 mA
2.58
3.94
4.94
2.48
3.8
OH
V
OH
V
4.5 V
5.5 V
5.5 V
5.5 V
3 V
= – 24 mA
OH
4.8
I
I
= – 50 mA
= – 75 mA
OH
3.85
OH
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50
A
4.5 V
5.5 V
3 V
OL
0.1
0.1
0.1
I
I
= 12 mA
= 24 mA
0.36
0.36
0.36
0.5
0.44
0.44
0.44
OL
V
OL
V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5 V
0.5
OL
0.5
I
I
= 50 mA
= 75 mA
1.65
OL
1.65
± 5
± 1
80
OL
I
I
I
V
= V or GND
CC
± 0.5
± 0.1
8
± 10
± 1
A
A
OZ
O
V = V
or GND
I
I
CC
CC
CC
V = V
or GND, I = 0
O
160
A
CC
I
C
C
V = V
or GND
4
pF
pF
i
I
V
= V or GND
CC
5 V
10
o
O
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54AC11241, 74AC11241
OCTAL BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS032A – JULY 1987 – REVISED APRIL 1993
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
7
54AC11241
74AC11241
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
10
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
t
t
12.2
10.2
13.8
12.6
8.2
11.4
9.2
PLH
PHL
PZH
A
Y
Y
Y
6.2
8.4
t
7.8
11.4
10.6
7.6
12.9
11.7
7.9
ns
G or G
G or G
t
7.7
PZL
t
5.8
PHZ
ns
t
7.1
9.3
10.3
9.9
PLZ
switching characteristics over recommended operating free-air temperature range,
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
4.9
54AC11241
74AC11241
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
7.1
6.3
8
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
8
t
t
8.5
7.2
9.7
9
PLH
PHL
PZH
A
Y
Y
Y
4.5
6.8
9
t
5.4
ns
G or G
G or G
t
5.3
7.6
6.6
7.5
8.4
6.9
8
PZL
t
4.9
7.2
8.3
PHZ
ns
t
5.6
PLZ
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
26
UNIT
Outputs enabled
Outputs disabled
C
Power dissipation capacitance per buffer
C
pF
pd
10
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54AC11241, 74AC11241
OCTAL BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS032A – JULY 1987 – REVISED APRIL 1993
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
Open
GND
TEST
S1
S1
t
/t
Open
500 Ω
PLH PHL
From Output
Under Test
t
/t
2 × V
CC
GND
PLZ PZL
t
/t
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
LOAD CIRCUIT
Output
Control
(low-level
enabling)
V
CC
50%
50%
0 V
t
PZL
V
t
CC
PLZ
Input
(see Note B)
Output
Waveform 1
V
CC
50%
50%
50% V
CC
0 V
20% V
S1 at 2 × V
(see Note C)
CC
CC
CC
V
V
OL
t
PLH
t
PHZ
t
PHL
t
PZH
Output
Waveform 2
S1 at GND
V
OH
OH
80% V
50% V
50% V
Output
CC
CC
V
50% V
CC
0 V
OL
(see Note C)
VOLTAGE WAVEFORMS
NOTES: A. C includes probe and jig capacitance.
VOLTAGE WAVEFORMS
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
2–5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–6
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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