74AC11379D [TI]

QUAD D- TYPE FLIP FLOP WITH DATA ENABLE;
74AC11379D
型号: 74AC11379D
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

QUAD D- TYPE FLIP FLOP WITH DATA ENABLE

逻辑集成电路
文件: 总7页 (文件大小:100K)
中文:  中文翻译
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ꢇ ꢈꢂꢉꢊ ꢉꢋꢌ ꢍꢎꢏ ꢊꢐ ꢑꢒ ꢎ ꢋꢐ ꢑꢓ  
SCAS104 − MARCH 1990 − REVISED APRIL 1993  
DW OR N PACKAGE  
(TOP VIEW)  
Contains Four Flip-Flops with Double-Rail  
Outputs  
Clock Enable Latched to Avoid False  
1Q  
2Q  
1Q  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Clocking  
CLKEN  
1D  
Applications Include: Buffer/Storage  
Registers, Shift Registers, Pattern  
Generators  
2Q  
GND  
GND  
GND  
GND  
3Q  
2D  
V
V
CC  
CC  
Flow-Through Architecture Optimizes PCB  
Layout  
3D  
Center-Pin V  
and GND Pin  
Configurations Minimize High-Speed  
Switching Noise  
4D  
CC  
3Q  
CLK  
4Q  
4Q  
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
500-mA Typical Latch-Up Immunity at  
125°C  
Package Options Include Plastic  
Small-Outline Packages and Standard  
Plastic 300-mil DIPs  
description  
These circuits are positive-edge-triggered D-type flip-flops with a clock-enable input.  
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the  
positive-going edge of the clock pulse if the clock-enable input (CLKEN) is low. Clock triggering occurs at a  
particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock  
input is at either the high or low level, the data (D) input signal has no effect at the output. The circuits are  
designed to prevent false clocking by transitions at the clock-enable (CLKEN) input.  
The 74AC11379 is characterized for operation from − 40°C to 85°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUTS  
CLKEN  
CLK  
X
D
X
H
L
Q
Q
H
L
Q
Q
0
0
H
L
L
L
H
X
L
X
Q
Q
0
0
EPIC is a trademark of Texas Instruments Incorporated.  
ꢌꢥ  
Copyright 1993, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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ꢇꢈ ꢂ ꢉꢊ ꢉ ꢋꢌ ꢍꢎ ꢏꢊ ꢐꢑꢒ ꢎ ꢋꢐ ꢑ ꢓ ꢎ  
ꢔꢒ ꢌ ꢕ ꢊꢃ ꢑ ꢓꢃ ꢖꢊ ꢏ ꢗꢂ ꢘꢑ ꢏ  
SCAS104 − MARCH 1990 − REVISED APRIL 1993  
logic diagram (positive logic)  
logic symbol  
19  
19  
CLKEN  
G1  
1C2  
CLKEN  
CLK  
12  
20  
1
18  
1Q  
1Q  
2Q  
2Q  
3Q  
3Q  
4Q  
4Q  
1D  
2D  
3D  
4D  
2D  
12  
2
17  
14  
13  
CLK  
3
8
9
20  
1
C1  
1D  
C1  
1D  
C1  
1D  
C1  
1D  
1Q  
1Q  
2Q  
2Q  
3Q  
3Q  
4Q  
4Q  
18  
10  
11  
1D  
2D  
3D  
4D  
2
17  
14  
13  
3
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
8
9
10  
11  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V  
+ 0.5 V  
+ 0.5 V  
I
CC  
CC  
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V  
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
I
CC  
Output clamp current, I  
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
Continuous current through V  
O
O
CC  
CC  
or GND pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 mA  
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2
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ꢔ ꢒꢌ ꢕꢊ ꢃꢑꢓ ꢃꢖꢊ ꢏ ꢗꢂ ꢘ ꢑ  
SCAS104 − MARCH 1990 − REVISED APRIL 1993  
recommended operating conditions  
MIN NOM  
MAX  
UNIT  
V
Supply voltage  
3
2.1  
5
5.5  
V
CC  
IH  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 3 V  
= 4.5 V  
= 5.5 V  
= 3 V  
3.15  
3.85  
V
High-level input voltage  
V
V
0.9  
1.35  
1.65  
= 4.5 V  
= 5.5 V  
V
Low-level input voltage  
IL  
V
V
Input voltage  
0
0
V
V
V
I
CC  
Output voltage  
V
CC  
−4  
O
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 3 V  
= 4.5 V  
= 5.5 V  
= 3 V  
−24  
−24  
12  
I
High-level output current  
Low-level output current  
mA  
mA  
OH  
= 4.5 V  
= 5.5 V  
24  
I
OL  
24  
t/v  
Input transition rise or fall rate  
Operating free-air temperature  
0
10  
ns/V  
T
A
40  
85  
°C  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
TA = 25°C  
PARAMETER  
TEST CONDITIONS  
V
MIN  
MAX  
UNIT  
CC  
MIN  
2.9  
TYP  
MAX  
3 V  
2.9  
4.4  
4.5 V  
5.5 V  
3 V  
4.4  
I
I
= − 50 µA  
OH  
5.4  
5.4  
= − 4 mA  
2.58  
3.94  
4.94  
2.48  
3.8  
V
V
OH  
OH  
4.5 V  
5.5 V  
5.5 V  
3 V  
I
I
= − 24 mA  
= 75 mA  
OL  
4.8  
3.85  
OH  
0.1  
0.1  
0.1  
0.1  
4.5 V  
5.5 V  
3 V  
I
I
= 50 µA  
OL  
0.1  
0.1  
= 12 mA  
= 24 mA  
0.36  
0.36  
0.36  
0.44  
0.44  
0.44  
1.65  
1
V
OL  
V
OL  
4.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5 V  
I
I
OL  
= 75 mA  
OL  
I
I
V = V  
or GND  
or GND,  
or GND  
0.1  
8
µA  
µA  
pF  
I
I
CC  
CC  
CC  
V = V  
I = 0  
O
80  
CC  
I
C
V = V  
4
i
I
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.  
3
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ꢇꢈ ꢂ ꢉꢊ ꢉ ꢋꢌ ꢍꢎ ꢏꢊ ꢐꢑꢒ ꢎ ꢋꢐ ꢑ ꢓ ꢎ  
ꢔꢒ ꢌ ꢕ ꢊꢃ ꢑ ꢓꢃ ꢖꢊ ꢏ ꢗꢂ ꢘꢑ ꢏ  
SCAS104 − MARCH 1990 − REVISED APRIL 1993  
timing requirements over recommended operating free-air temperature range, V  
(unless otherwise noted) (see Figure 1)  
= 3.3 V 0.3 V  
CC  
T
= 25°C  
A
MIN  
MAX  
UNIT  
MIN  
0
MAX  
f
t
Clock frequency  
Pulse duration  
90  
0
5.5  
7.5  
4.5  
0
90  
MHz  
ns  
clock  
CLK high or low  
Data  
5.5  
7.5  
4.5  
0
w
t
Setup time, before CLK↑  
Hold time, after CLK↑  
ns  
ns  
su  
h
CLKEN high or low  
Data  
t
CLKEN inactive or active  
0
0
timing requirements over recommended operating free-air temperature range, V  
(unless otherwise noted) (see Figure 1)  
= 5 V 0.5 V  
CC  
T
= 25°C  
A
MIN  
MAX  
UNIT  
MIN  
0
MAX  
f
t
Clock frequency  
Pulse duration  
100  
0
5
5
3
0
0
100  
MHz  
ns  
clock  
CLK high or low  
Data  
5
w
5
t
Setup time, before CLK↑  
Hold time, after CLK↑  
ns  
ns  
su  
h
CLKEN high or low  
Data  
3
0
t
CLKEN inactive or active  
0
switching characteristics over recommended operating free-air temperature range,  
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)  
V
CC  
T
A
= 25°C  
TYP  
115  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
MIN  
MAX  
UNIT  
MIN  
90  
1.8  
3
MAX  
f
90  
1.8  
3
MHz  
max  
PLH  
PHL  
t
t
6.7  
8.4  
13  
9.9  
14  
CLK  
Any Q or Q  
ns  
9.5  
switching characteristics over recommended operating free-air temperature range,  
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)  
V
CC  
T
A
= 25°C  
TYP  
130  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
MIN  
MAX  
UNIT  
MIN  
100  
1.5  
MAX  
f
100  
1.5  
2.6  
MHz  
max  
PLH  
PHL  
t
t
4.3  
6
6.7  
CLK  
Any Q or Q  
ns  
2.6  
6.2  
9.1  
10.3  
operating characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
Power dissipation capacitance  
TEST CONDITIONS  
= 50 pF, f = 1 MHz  
L
TYP  
UNIT  
C
C
38  
pF  
pd  
4
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ꢔ ꢒꢌ ꢕꢊ ꢃꢑꢓ ꢃꢖꢊ ꢏ ꢗꢂ ꢘ ꢑ  
SCAS104 − MARCH 1990 − REVISED APRIL 1993  
PARAMETER MEASUREMENT INFORMATION  
V
0
CC  
Timing Input  
(see Note B)  
50%  
From Output  
Under Test  
t
h
t
su  
V
0
C
= 50 pF  
CC  
L
Data  
Input  
500 Ω  
50%  
50%  
(see Note A)  
SETUP AND HOLD TIMES  
LOAD CIRCUIT  
V
CC  
Input  
(see Note B)  
50% V  
50% V  
CC  
CC  
0
V
CC  
t
PHL  
High-Level  
Input  
50%  
50%  
t
t
PLH  
PHL  
0
V
OH  
CC  
OL  
In-Phase  
Output  
50% V  
50% V  
CC  
t
w
V
V
CC  
t
Low-Level  
Input  
PLH  
50%  
50%  
0
V
OH  
Out-of-Phase  
Output  
50% V  
50% V  
CC  
CC  
V
OL  
PULSE DURATION  
NOTES: A. C includes probe and jig capacitance.  
PROPAGATION DELAY TIMES  
L
B. Input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
5
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PACKAGE OPTION ADDENDUM  
www.ti.com  
24-Jun-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
74AC11379DW  
OBSOLETE  
SOIC  
DW  
20  
TBD  
Call TI  
Call TI  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
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Addendum-Page 1  
IMPORTANT NOTICE  
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SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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