74AC11623DW [TI]
Octal Bus Transceivers With 3-State Outputs 24-SOIC -40 to 85;型号: | 74AC11623DW |
厂家: | TEXAS INSTRUMENTS |
描述: | Octal Bus Transceivers With 3-State Outputs 24-SOIC -40 to 85 |
文件: | 总6页 (文件大小:91K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74AC11623
OCTAL BUS TRANSCEIVER
WITH 3–STATE OUTPUTS
SCAS058A – JULY 1987 – REVISED APRIL 1993
DW OR NT PACKAGE
(TOP VIEW)
•
•
Local Bus-Latch Capability
Flow-Through Architecture Optimizes PCB
Layout
A1
A2
A3
OEAB
1
2
3
4
5
6
7
8
9
24
•
•
•
•
Center-Pin V
Minimize High-Speed Switching Noise
and GND Configurations
23 B1
22 B2
21 B3
20 B4
CC
A4
EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
GND
GND
GND
GND
A5
19
18
V
V
CC
CC
500-mA Typical Latch-Up Immunity at
125°C
17 B5
16 B6
15 B7
14 B8
13 OEBA
Package Options Include Plastic
Small-Outline Packages, and Standard
Plastic 300-mil DIPs
A6 10
A7 11
A8 12
description
These octal bus transceivers are designed for asynchronous communication between data buses. The control
function implementation allows for maximum flexibility in timing.
These devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the
level at the output-enable (OEAB or OEBA) inputs. The output-enable inputs can be used to disable the device
so that the buses are effectively isolated.
The dual-enable configuration gives these devices the capability to store data by simultaneous enabling of
OEAB and OEBA. Each output reinforces its input in this transceiver configuration. Thus, when both control
inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of
bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be
complementary for the 74AC11623.
The 74AC11623 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OPERATION
OEBA
OEAB
L
H
H
L
H
L
B data to A bus
A data to B bus
Isolation
B data to A bus,
A data to B bus
L
H
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11623
OCTAL BUS TRANSCEIVER
WITH 3–STATE OUTPUTS
SCAS058A – JULY 1987 – REVISED APRIL 1993
†
logic symbol
logic diagram (positive logic)
13
13
OEBA
OEBA
OEAB
EN1
EN2
24
24
OEAB
1
23
A1
B1
1
2
22
21
20
2
B2
B3
B4
A2
1
23
3
4
9
A1
B1
A3
A4
A5
17
16
15
B5
B6
B7
10
A6
11
12
A7
A8
14
B8
To 7 Other Channels
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
O
O
CC
CC
or GND pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11623
OCTAL BUS TRANSCEIVER
WITH 3–STATE OUTPUTS
SCAS058A – JULY 1987 – REVISED APRIL 1993
recommended operating conditions
MIN NOM
MAX
UNIT
V
Supply voltage
3
2.1
5
5.5
V
CC
IH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
V
High-level input voltage
= 4.5 V
= 5.5 V
= 3 V
3.15
3.85
V
V
0.9
1.35
1.65
V
IL
Low-level input voltage
= 4.5 V
= 5.5 V
V
V
Input voltage
0
0
V
V
V
I
CC
Output voltage
V
CC
–4
O
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
I
High-level output current
Low-level output current
= 4.5 V
= 5.5 V
= 3 V
–24
–24
12
mA
mA
OH
OL
I
= 4.5 V
= 5.5 V
24
24
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
0
10
ns/V
T
A
–40
85
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
CC
MIN
2.9
TYP
MAX
3 V
2.9
4.4
I
I
= – 50 µA
4.5 V
5.5 V
3 V
4.4
OH
5.4
5.4
V
OH
= – 4 mA
2.58
3.94
4.94
2.48
3.8
V
OH
4.5 V
5.5 V
5.5 V
3 V
I
I
= – 24 mA
OH
4.8
†
= –75 mA
3.85
OH
0.1
0.1
0.1
0.1
I
= 50 µA
4.5 V
5.5 V
3 V
OL
0.1
0.1
V
OL
I
I
I
= 12 mA
= 24 mA
0.36
0.36
0.36
0.44
0.44
0.44
1.65
±1
V
OL
OL
OL
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5 V
†
= 75 mA
I
I
I
OEBA or OEAB V = V
or GND
±0.1
±0.5
8
µA
µA
µA
pF
pF
I
I
CC
‡
A or B ports
V
= V or GND
CC
±5
OZ
CC
O
V = V
or GND,
or GND
I = 0
O
80
I
CC
CC
C
C
OEBA or OEAB V = V
4
i
I
A or B ports
V
= V or GND
CC
5 V
12
io
O
†
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
For I/O ports, the parameter I includes the input leakage current.
OZ
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11623
OCTAL BUS TRANSCEIVER
WITH 3–STATE OUTPUTS
SCAS058A – JULY 1987 – REVISED APRIL 1993
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
6.8
6.3
8
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
MAX
9.2
t
t
t
t
t
t
t
t
t
t
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
10.5
9.3
PLH
PHL
PZH
PZL
PHZ
PLZ
PZH
PZL
PHZ
PLZ
A or B
OEBA
OEBA
OEAB
OEAB
B or A
8.2
10.6
10.4
8.7
12.2
11.6
9.3
A
A
B
B
ns
7.9
7
ns
8
9.9
10.7
12
8.2
8.3
7
10.4
10.8
8.8
ns
12.2
9.4
ns
8
9.9
10.6
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
4.9
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
MAX
6.8
6.4
7.9
8.1
7.7
8.2
8
t
t
t
t
t
t
t
t
t
t
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
7.8
7.1
9
PLH
PHL
PZH
PZL
PHZ
PLZ
PZH
PZL
PHZ
PLZ
A or B
OEBA
OEBA
OEAB
OEAB
B or A
4.6
5.8
A
A
B
B
ns
5.9
9.1
8.3
8.8
9.2
9.4
8.3
8.8
6.1
ns
6.6
6.2
ns
6.1
8.3
7.8
8.1
6.2
ns
6.5
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
UNIT
Outputs enabled
Outputs disabled
49
9
C
Power dissipation capacitance per transceiver
C
pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11623
OCTAL BUS TRANSCEIVER
WITH 3–STATE OUTPUTS
SCAS058A – JULY 1987 – REVISED APRIL 1993
PARAMETER MEASUREMENT INFORMATION
2×V
CC
Open
GND
TEST
S1
Open
2 × V
CC
GND
S1
t
t
t
/t
500 Ω
PLH PHL
From Output
Under Test
/t
PLZ PZL
/t
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
V
CC
Output
Control
(low-level
enabling)
LOAD CIRCUIT FOR OUTPUTS
50%
50%
0 V
t
t
PZL
PZH
t
PLZ
≈V
V
CC
CC
Input
(see Note B)
Output
Waveform 1
50%
50%
50%V
t
CC
20%V
CC
CC
0 V
S1 at 2 × V
(see Note C)
CC
V
OL
OH
t
PLH
PHZ
t
PHL
Output
Waveform 2
S1 at GND
V
V
OH
Output
(see Note D)
80%V
50%V
50%V
50%V
CC
CC
V
CC
(see Note C)
OL
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
For testing pulse duration: t = t = 1 to 3 ns. Pulse polarity can be either high-to-low-to-high or low-to-high-to-low.
r
f
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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