74AC16623DL [TI]

16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS;
74AC16623DL
型号: 74AC16623DL
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

光电二极管 输出元件 逻辑集成电路
文件: 总7页 (文件大小:108K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢀ ꢁꢂ ꢃ ꢄꢅ ꢅꢆꢇ  
ꢄ ꢅ ꢈꢉꢊ ꢋꢌ ꢉꢍꢎꢌ ꢋ ꢏꢂꢐꢎ ꢃꢑ ꢊ ꢒꢑ ꢏ  
ꢓ ꢊꢋ ꢔꢌ ꢇ ꢈꢎꢋꢂꢋ ꢑꢌ ꢕ ꢍꢋ ꢖꢍ ꢋꢎ  
SCAS172 − D3680, JANUARY 1991 − REVISED APRIL 1993  
DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
WidebusFamily  
Packaged in Plastic 300-mil Shrink  
Small-Outline Package Using 25-mil  
Center-to-Center Pin Spacings  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OEAB  
1B1  
1B2  
GND  
1B3  
1OEBA  
1A1  
1A2  
GND  
1A3  
1A4  
2
3
Flow-Through Architecture Optimizes  
4
PCB Layout  
5
Distributed V  
and GND Pin Configuration  
Minimizes High-Speed Switching Noise  
6
1B4  
CC  
7
V
V
CC  
CC  
8
1B5  
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
EPIC(Enhanced-Performance Implanted  
9
CMOS) 1-µm Process  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
500-mA Typical Latch-Up Immunity  
at 125°C  
description  
The 74AC16623 is a 16-bit transceiver designed  
for asynchronous communication between data  
buses. The control function implementation allows  
for maximum flexibility in timing.  
V
V
CC  
CC  
2B5  
2B6  
GND  
2B7  
2B8  
2A5  
2A6  
GND  
2A7  
2A8  
This device can be used as two 8-bit transceivers  
or one 16-bit transceiver. It allows data  
transmission from the A bus to the B bus or from  
the B bus to the A bus, depending upon the logic  
level at the output-enable (OEBA and OEAB)  
inputs. The output-enable inputs can be used to  
disable the device so that the buses are effectively  
isolated.  
2OEAB  
2OEBA  
The dual-enable configuration gives the bus transceiver the capability to store data by simultaneous enabling  
of OEBA and OEAB. Each output reinforces its input in this transceiver configuration. Thus, when both control  
inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, the bus lines  
will remain at their last states.  
The 74AC16623 is packaged in TI’s shrink small-outline package (DL), which provides twice the I/O pin count  
and functionality of standard small-outline packages in the same printed-circuit-board area.  
The 74AC16623 is characterized for operation from 40°C to 85°C.  
FUNCTION TABLE  
(each 8-bit section)  
INPUTS  
OPERATION  
OEBA  
OEAB  
L
H
H
L
H
L
B data to A bus  
A data to B bus  
Isolation  
B data to A bus,  
A data to B bus  
L
H
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
ꢋꢤ  
Copyright 1993, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
3−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  
ꢀ ꢁꢂ ꢃ ꢄꢅ ꢅ ꢆ ꢇ  
ꢄ ꢅꢈ ꢉꢊ ꢋ ꢌ ꢉ ꢍꢎ ꢌ ꢋꢏ ꢂꢐꢎ ꢃꢑ ꢊ ꢒꢑ ꢏ  
ꢓꢊ ꢋ ꢔ ꢌꢇ ꢈꢎ ꢋꢂꢋꢑ ꢌ ꢕ ꢍꢋ ꢖꢍꢋ ꢎ  
SCAS172 − D3680, JANUARY 1991 − REVISED APRIL 1993  
logic symbol  
logic diagram (positive logic)  
48  
48  
1OEBA  
EN1  
EN2  
EN3  
EN4  
1OEBA  
1OEAB  
1
1
1OEAB  
25  
24  
2OEBA  
2OEAB  
47  
1A1  
2
47  
2
1A1  
1B1  
1B1  
1
1
1
2
46  
44  
43  
41  
40  
38  
37  
36  
3
5
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
1A8  
2A1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
1B8  
2B1  
To Seven Other Channels  
6
8
25  
24  
9
2OEBA  
2OEAB  
2A1  
11  
12  
13  
36  
3
1
1
4
13  
35  
33  
32  
30  
29  
27  
26  
14  
16  
17  
19  
20  
22  
23  
2B1  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
2A8  
2B2  
2B3  
2B4  
2B5  
2B6  
2B7  
2B8  
To Seven Other Channels  
This symbol is in accordance with ANSI/IEEE Std 91-1984  
and IEC Publication 617-12.  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V  
+ 0.5 V  
+ 0.5 V  
I
CC  
CC  
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V  
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
I
CC  
Output clamp current, I  
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
Continuous current through V  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 mA  
Maximum power package dissipation at T = 55°C (in still air) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.85 W  
A
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
3−2  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  
ꢀꢁ ꢂꢃ ꢄ ꢅꢅ ꢆꢇ  
ꢄ ꢅ ꢈꢉꢊ ꢋꢌ ꢉꢍꢎꢌ ꢋ ꢏꢂꢐꢎ ꢃꢑ ꢊ ꢒꢑ ꢏ  
ꢓ ꢊꢋ ꢔꢌ ꢇ ꢈꢎꢋꢂꢋ ꢑꢌꢕ ꢍ ꢋꢖ ꢍꢋ ꢎ  
SCAS172 − D3680, JANUARY 1991 − REVISED APRIL 1993  
recommended operating conditions (see Note 2)  
MIN NOM  
MAX  
UNIT  
V
Supply voltage  
3
2.1  
5
5.5  
V
CC  
IH  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 3 V  
= 4.5 V  
= 5.5 V  
= 3 V  
3.15  
3.85  
V
High-level input voltage  
V
V
0.9  
1.35  
1.65  
= 4.5 V  
= 5.5 V  
V
IL  
Low-level input voltage  
V
V
Input voltage  
0
0
V
V
V
I
CC  
Output voltage  
V
CC  
−4  
O
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 3 V  
= 4.5 V  
= 5.5 V  
= 3 V  
24  
24  
12  
I
High-level output current  
Low-level output current  
mA  
mA  
OH  
= 4.5 V  
= 5.5 V  
24  
I
OL  
24  
t/v  
Input transition rise or fall rate  
Operating free-air temperature  
0
10  
ns/V  
T
A
40  
85  
°C  
NOTE 2: Unused or floating pins (input or I/O) must be held high or low.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
TA = 25°C  
PARAMETER  
TEST CONDITIONS  
V
MIN  
MAX  
UNIT  
CC  
MIN  
2.9  
TYP  
MAX  
3 V  
4.5 V  
5.5 V  
3 V  
2.9  
4.4  
4.4  
I
I
= − 50 µA  
OH  
5.4  
5.4  
= − 4 mA  
2.58  
3.94  
4.94  
2.48  
3.8  
V
OH  
V
OH  
4.5 V  
5.5 V  
5.5 V  
3 V  
I
I
= − 24 mA  
= 75 mA  
OL  
4.8  
3.85  
OH  
0.1  
0.1  
0.1  
0.1  
0.1  
0.44  
0.44  
0.44  
1.65  
1
4.5 V  
5.5 V  
3 V  
I
I
= 50 µA  
OL  
0.1  
= 12 mA  
= 24 mA  
0.36  
0.36  
0.36  
V
OL  
V
OL  
4.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5 V  
I
I
OL  
= 75 mA  
OL  
I
I
I
Control inputs V = V  
or GND  
or GND  
0.1  
0.5  
8
µA  
µA  
µA  
pF  
pF  
I
I
CC  
A or B ports  
V
= V  
CC  
5
O
OZ  
CC  
V = V  
or GND,  
or GND  
I = 0  
O
80  
I
CC  
C
C
Control inputs V = V  
4.5  
16  
i
I
CC  
A or B ports  
V
= V  
O CC  
or GND  
5 V  
io  
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.  
For I/O ports, the parameter I includes the input leakage current.  
OZ  
3−3  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  
ꢀ ꢁꢂ ꢃ ꢄꢅ ꢅ ꢆ ꢇ  
ꢄ ꢅꢈ ꢉꢊ ꢋ ꢌ ꢉ ꢍꢎ ꢌ ꢋꢏ ꢂꢐꢎ ꢃꢑ ꢊ ꢒꢑ ꢏ  
ꢓꢊ ꢋ ꢔ ꢌꢇ ꢈꢎ ꢋꢂꢋꢑ ꢌ ꢕ ꢍꢋ ꢖꢍꢋ ꢎ  
SCAS172 − D3680, JANUARY 1991 − REVISED APRIL 1993  
switching characteristics over recommended operating free-air temperature range,  
V
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)  
CC  
T
A
= 25°C  
TYP  
8.1  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
MIN  
MAX  
UNIT  
MIN  
2.7  
3.1  
2.7  
3.5  
4.8  
4.1  
2.8  
3.8  
4.7  
4.3  
MAX  
10  
t
t
t
t
t
t
t
t
t
t
2.7  
3.1  
2.7  
3.5  
4.8  
4.1  
2.8  
3.8  
4.7  
4.3  
11.2  
12.5  
11.5  
15.6  
9.9  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
PZH  
PZL  
PHZ  
PLZ  
A or B  
OEBA  
OEBA  
OEAB  
OEAB  
B or A  
ns  
ns  
ns  
ns  
ns  
9.3  
11.4  
10.3  
14.2  
9.3  
8.3  
A
A
B
B
11.8  
7.7  
7.5  
9.2  
9.8  
8.1  
9.9  
11.1  
15.1  
9.5  
10.7  
7.5  
14.1  
9.1  
7.3  
8.9  
9.3  
switching characteristics over recommended operating free-air temperature range,  
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)  
V
CC  
T
A
= 25°C  
TYP  
5.1  
6
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
MIN  
MAX  
UNIT  
ns  
MIN  
2.3  
2.6  
2.1  
2.8  
4.7  
4
MAX  
6.9  
7.8  
6.8  
8.5  
8.4  
7.7  
6.7  
8.4  
8.4  
7.6  
t
t
t
t
t
t
t
t
t
t
2.3  
2.6  
2.1  
2.8  
4.7  
4
7.7  
8.6  
7.6  
9.4  
8.9  
8.2  
7.5  
9.3  
8.9  
7.9  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
PZH  
PZL  
PHZ  
PLZ  
A or B  
OEBA  
OEBA  
OEAB  
OEAB  
B or A  
5.3  
6.9  
6.9  
6.3  
5.2  
6.7  
6.9  
6.2  
A
A
B
B
ns  
ns  
2.3  
3
2.3  
3
ns  
4.5  
4
4.5  
4
ns  
operating characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
TEST CONDITIONS  
= 50 pF, f = 1 MHz  
L
TYP  
UNIT  
Outputs enabled  
Outputs disabled  
47  
8
C
Power dissipation capacitance per transceiver  
C
pF  
pd  
3−4  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  
ꢀꢁ ꢂꢃ ꢄ ꢅꢅ ꢆꢇ  
ꢄ ꢅ ꢈꢉꢊ ꢋꢌ ꢉꢍꢎꢌ ꢋ ꢏꢂꢐꢎ ꢃꢑ ꢊ ꢒꢑ ꢏ  
ꢓ ꢊꢋ ꢔꢌ ꢇ ꢈꢎꢋꢂꢋ ꢑꢌꢕ ꢍ ꢋꢖ ꢍꢋ ꢎ  
SCAS172 − D3680, JANUARY 1991 − REVISED APRIL 1993  
PARAMETER MEASUREMENT INFORMATION  
2 × V  
CC  
TEST  
S1  
S1  
t
/t  
Open  
500 Ω  
Open  
GND  
PLH PHL  
From Output  
Under Test  
t
/t  
2 × V  
CC  
GND  
PLZ PZL  
t
/t  
PHZ PZH  
C
= 50 pF  
L
500 Ω  
(see Note A)  
LOAD CIRCUIT  
Output  
Control  
(low-level  
enabling)  
V
CC  
50%  
50%  
0 V  
t
PZL  
V
t
CC  
PLZ  
Input  
(see Note B)  
Output  
Waveform 1  
[ V  
CC  
50%  
50%  
50% V  
CC  
0 V  
20% V  
S1 at 2 × V  
(see Note C)  
CC  
CC  
V
OL  
t
PLH  
t
PHZ  
t
PHL  
t
PZH  
Output  
Waveform 2  
S1 at GND  
V
OH  
V
OH  
80% V  
CC  
50% V  
CC  
50% V  
Output  
CC  
V
50% V  
CC  
[ 0 V  
OL  
(see Note C)  
VOLTAGE WAVEFORMS  
NOTES: A. C includes probe and jig capacitance.  
VOLTAGE WAVEFORMS  
L
B. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t = 3 ns, t = 3 ns.  
O
r
f
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
D. The outputs are measured one at a time with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
3−5  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  
3−6  
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相关型号:

74AC16623DLR

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