74ACT16543DL [TI]
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS; 16位寄存收发器，三态输出
| 型号： | 74ACT16543DL |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS |
| 文件： | 总10页 (文件大小：178K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
54ACT16543, 74ACT16543
16-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS126B – MARCH 1990 – REVISED APRIL 1996
54ACT16543 . . . WD PACKAGE
74ACT16543 . . . DGG OR DL PACKAGE
(TOP VIEW)
Members of the Texas Instruments
Widebus Family
Inputs Are TTL-Voltage Compatible
3-State True Outputs
1OEAB
1LEAB
1CEAB
GND
1
2
3
4
5
6
7
8
9
56 1OEBA
55 1LEBA
54 1CEBA
53 GND
52 1B1
Flow-Through Architecture Optimizes
PCB Layout
Distributed V
and GND Pin
CC
1A1
1A2
Configurations Minimize High-Speed
Switching Noise
51 1B2
V
50
V
CC
CC
EPIC (Enhanced-Performance Implanted
CMOS) 1- m Process
1A3
1A4
49 1B3
48 1B4
47 1B5
46 GND
45 1B6
44 1B7
43 1B8
500-mA Typical Latch-Up Immunity at
125°C
1A5 10
GND 11
1A6 12
1A7 13
1A8 14
Package Options Include Plastic Thin
Shrink Small-Outline (DGG) and 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings, and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
15
42
2A1
2B1
2A2 16
2A3 17
41 2B2
40 2B3
18
19
20
21
22
23
24
25
26
27
28
39
38
37
36
35
34
33
32
31
30
29
GND
2A4
2A5
2A6
GND
2B4
2B5
2B6
description
The ’ACT16543 are 16-bit registered transceivers
that contain two sets of D-type latches for
temporary storage of data flowing in either
direction. The ’ACT16543 can be used as two
8-bit transceivers or one 16-bit transceiver.
Separate latch enable (LEAB or LEBA) and
output-enable (OEAB or OEBA) inputs are
provided for each register to permit independent
control in either direction of data flow.
V
V
CC
CC
2A7
2A8
GND
2CEAB
2LEAB
2OEAB
2B7
2B8
GND
2CEBA
2LEBA
2OEBA
The A-to-B enable (CEAB) and OEAB inputs must
be low to enter data from A or to output data to B.
Having CEAB low and LEAB low makes the
A-to-B latches transparent; a subsequent low-to-
high transition at LEAB puts the A latches in the
storage mode. Data flow from B to A is similar, but
requires using the CEBA, LEBA, and OEBA
inputs.
The 74ACT16543 is packaged in TI’s shrink small-outline package, which provides twice the functionality of
standard small-outline packages in the same printed-circuit-board area.
The 54ACT16543 is characterized for operation over the full military temperature range of –55°C to 125°C. The
74ACT16543 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
Copyright 1996, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT16543, 74ACT16543
16-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS126B – MARCH 1990 – REVISED APRIL 1996
FUNCTION TABLE
(each octal register)
LATCH
OUTPUT
BUFFERS
B1–B8
INPUTS
STATUS
†
A TO B
CEAB
LEAB
OEAB
H
X
X
L
X
H
X
L
X
X
H
L
Storing
Storing
Z
Z
Transparent
Storing
Current A data
Previous A data
L
H
L
†
‡
A-to-Bdataflowisshown:B-to-Aflowcontrolisthesameexceptthat
it uses CEBA, LEBA, and OEBA.
Data present before low-to-high transition of LEAB occurring while
CEAB is low
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT16543, 74ACT16543
16-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS126B – MARCH 1990 – REVISED APRIL 1996
†
logic symbol
56
54
55
1
1EN3
G1
1OEBA
1CEBA
1LEBA
1OEAB
1C5
2EN4
G2
3
1CEAB
1LEAB
2OEBA
2CEBA
2LEBA
2OEAB
2CEAB
2LEAB
2
2C6
29
31
30
28
26
27
7EN9
G7
7C11
8EN10
G8
8C12
5
52
1A1
5D
4
1B1
3
6D
6
51
1A2
1A3
1A4
1A5
1B2
49
8
1B3
48
9
1B4
47
10
1B5
12
13
14
15
45
1A6
1A7
1A8
2A1
1B6
44
1B7
43
1B8
42
11D
10
2B1
9
12D
16
17
19
20
21
23
24
41
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2B2
40
2B3
38
2B4
37
2B5
36
2B6
34
2B7
33
2B8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT16543, 74ACT16543
16-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS126B – MARCH 1990 – REVISED APRIL 1996
logic diagram (positive logic)
56
1OEBA
54
1CEBA
55
1LEBA
1
1OEAB
3
1CEAB
2
1LEAB
C1
1D
5
1A1
52
1B1
C1
1D
To Seven Other Channels
29
2OEBA
31
2CEBA
30
2LEBA
28
2OEAB
26
2CEAB
27
2LEAB
C1
1D
15
2A1
42
2B1
C1
1D
To Seven Other Channels
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT16543, 74ACT16543
16-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS126B – MARCH 1990 – REVISED APRIL 1996
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V +0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V +0.5 V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Maximum power dissipation at T = 55°C (in still air) (see Note 2): DGG package . . . . . . . . . . . . . . . . . . 1 W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±400 mA
A
DL package . . . . . . . . . . . . . . . . . . . 1.4 W
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150 C and a board trace length of 750 mils.
recommended operating conditions (see Note 3)
54ACT16543
MIN NOM
74ACT16543
MIN NOM
UNIT
MAX
MAX
V
V
V
V
V
Supply voltage (see Note 4)
High-level input voltage
Low-level input voltage
Input voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
0.8
0.8
V
0
0
V
V
0
0
V
V
V
I
CC
CC
Output voltage
V
O
CC
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
–24
24
–24
24
mA
mA
ns/V
°C
OH
OL
t/ v
0
10
0
10
T
–55
125
–40
85
A
NOTES: 3. Unused pins (inputs and I/O) must be held high or low to prevent them from floating.
4. All V and GND pins must be connected to the proper voltage power supply.
CC
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT16543, 74ACT16543
16-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS126B – MARCH 1990 – REVISED APRIL 1996
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
54ACT16543
74ACT16543
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
4.4
TYP
MAX
MIN
4.4
MAX
MIN
4.4
MAX
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
I
I
= –50
A
OH
5.4
5.4
5.4
3.94
4.94
3.8
3.8
V
V
OH
= –24 mA
= –75 mA
OH
4.8
4.8
3.85
3.85
I
I
OH
0.1
0.1
0.1
0.1
0.1
0.1
= 50
A
OL
0.36
0.36
0.44
0.44
1.65
±1
0.44
0.44
1.65
±1
V
V
OL
I
I
= 24 mA
= 75 mA
OL
OL
I
I
I
Control inputs V = V
or GND
or GND
±0.1
±0.5
8
A
A
A
I
I
CC
V
= V
±5
±5
A or B ports
OZ
CC
O
CC
V = V
or GND,
I
O
= 0
80
80
I
CC
One input at 3.4 V,
Other inputs at GND or V
5.5 V
0.9
1
1
mA
pF
I
CC
CC
C
C
Control inputs V = V
or GND
5 V
5 V
4.5
12
i
I
CC
= V or GND
CC
A or B ports
V
O
io
†
‡
§
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
For I/O ports, the parameter I includes the input leakage current.
OZ
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
.
CC
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
T
= 25°C
54ACT16543
74ACT16543
A
UNIT
MIN
7.5
2.5
4
MAX
MIN
7.5
2.5
4
MAX
MIN
7.5
2.5
4
MAX
t
w
t
su
t
h
Pulse duration, LEAB or LEBA low
Setup time, data before LEAB or LEBA↑
Hold time, data after LEAB or LEBA↑
ns
ns
ns
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT16543, 74ACT16543
16-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS126B – MARCH 1990 – REVISED APRIL 1996
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature range (unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
6.9
54ACT16543
74ACT16543
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
ns
MIN
3.5
3.1
3.9
3.9
2.6
3.5
4.1
5
MAX
9.5
MIN
3.5
3.1
3.9
3.9
2.6
3.5
4.1
5
MAX
10.5
11.6
13.8
13.5
11.4
13.2
11.1
9.6
MIN
3.5
3.1
3.9
3.9
2.6
3.5
4.1
5
MAX
10.5
11.6
13.8
13.5
11.4
13.2
11.1
9.6
t
t
t
t
t
t
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
PZH
PZL
PHZ
PLZ
A or B
B or A
A or B
A or B
A or B
A or B
A or B
7.3
10.7
12.3
12.2
10.3
11.9
10.5
9.3
8.6
ns
LEBA or LEAB
OEBA or OEAB
OEBA or OEAB
CEBA or CEAB
CEBA or CEAB
8.7
7.1
ns
8.3
8.2
ns
7.3
3.1
3.9
4.6
5.2
7.3
10.7
12.2
11
3.1
3.9
4.6
5.2
11.7
13.5
11.6
10.5
3.1
3.9
4.6
5.2
11.7
13.5
11.6
10.5
ns
8.5
8.5
ns
7.4
9.7
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
45
UNIT
Outputs enabled
Outputs disabled
C
Power dissipation capacitance per transceiver
C
pF
pd
12
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT16543, 74ACT16543
16-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS126B – MARCH 1990 – REVISED APRIL 1996
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
Open
GND
TEST
S1
S1
t
/t
Open
PLH PHL
/t
500 Ω
From Output
Under Test
t
2 × V
CC
GND
PLZ PZL
/t
t
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
LOAD CIRCUIT
3 V
0 V
Timing Input
(see Note B)
1.5 V
t
w
t
h
t
3 V
0 V
su
3 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
Data Input
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
Output
Control
(low-level
enabling)
3 V
0 V
3 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
t
PZL
t
t
t
PHL
PLH
t
PLZ
Output
Waveform 1
V
OH
V
CC
In-Phase
Output
50% V
50% V
CC
50% V
50% V
CC
V
CC
20% V
S1 at 2 × V
(see Note B)
CC
CC
CC
V
V
OL
OL
t
PHZ
t
PLH
t
PHL
PZH
Output
Waveform 2
S1 at GND
V
OH
OH
0 V
Out-of-Phase
Output
80% V
50% V
50% V
CC
CC
CC
V
OL
(see Note B)
VOLTAGE WAVEFORMS
includes probe and jig capacitance.
VOLTAGE WAVEFORMS
NOTES: A.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
5-Sep-2005
PACKAGING INFORMATION
Orderable Device
74ACT16543DGGR
74ACT16543DGGRE4
74ACT16543DL
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
DGG
56
56
56
56
56
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
SSOP
SSOP
SSOP
DGG
DL
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
74ACT16543DLR
DL
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
74ACT16543DLRG4
DL
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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相关型号：
74ACT16544DL
ACT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO56, 0.300 INCH, PLASTIC, SSOP-56
ROCHESTER
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