74FCT162543ETPACT [TI]
16-Bit Latched Transceivers; 16位锁存收发器
| 型号： | 74FCT162543ETPACT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 16-Bit Latched Transceivers |
| 文件： | 总8页 (文件大小：72K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
SCCS059 - August 1994 - Revised March 2000
16-Bit Latched Transceivers
Features
Functional Description
• FCT-E speed at 3.4 ns
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for significantly improved
noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
• Industrial temperature range of −40˚C to +85˚C
• VCC = 5V ± 10%
The CY74FCT16543T and CY74FCT162543T are 16-bit,
high-speed, low power latched transceivers that are organized as two
independent 8-bit D-type latched transceivers containing two sets of
eight D-type latches with separate Latch Enable (LEAB, LEAB) and
Output Enable (OEAB, OEAB) controls for each set to permit
independent control of inputting and outputting in either direction of
data flow. For data flow from A to B, for example, the A-to-B input
Enable (CEAB) must be LOW in order to enter data from A or to take
data from B as indicated in the truth table. With CAEB LOW, a LOW
signal on the A-to-B Latch Enable (LEAB) makes the A-to-B latches
transparent; a subsequent LOW-to-HIGH transition of the LEAB
signal puts the A latches in the storage mode and their outputs no
longer change with the A inputs. With CEAB and OEAB both LOW,
the three-state B output buffers are active and reflect the data present
at the output of the A latches. Control of data from B to A is similar,
but uses CEAB, LEAB, and OEAB inputs flow-through pinout and
small shrink packaging and in simplifying board design. The output
buffers are designed with a power-off disable feature to allow live
insertion of boards.
CY74FCT16543T Features:
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce) <1.0V at VCC = 5V,
TA = 25˚C
CY74FCT162543T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical VOLP (ground bounce) <0.6V at VCC = 5V,
TA= 25˚C
The CY74FCT16543T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162543T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162543T is ideal for driving transmission lines.
CY74FCT162H543T Features:
• Bus hold retains last active state
• Eliminates the need for external pull-up or pull-down
resistors
The CY74FCT162H543T is a 24-mA balanced output part that
has “bus hold” on the data inputs. The device retains the
input’s last state whenever the input goes to high impedance.
This eliminates the need for pull-up/down resistors and
prevents floating inputs.
Copyright © 2000, Texas Instruments Incorporated
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Logic Block Diagrams
PinConfiguration
OEBA
1
Top View
SSOP/TSSOP
CEBA
1
LEBA
1
OEAB
OEBA
1
2
56
55
1
1
OEAB
1
LEAB
LEBA
1
1
CEAB
1
CEAB
1
3
4
54
53
CEBA
1
LEAB
1
GND
A
GND
B
C
D
5
6
7
52
51
50
1
1
1
1
2
A
1
1
B
1
1
A
1
B
1
2
V
V
CC
CC
C
D
A
B
1
3
4
5
8
9
49
48
1
3
4
5
A
1
B
1
A
10
11
12
13
14
15
16
17
18
19
20
21
22
23
47
46
45
44
43
42
41
40
39
38
37
36
35
34
B
1
1
GND
A
GND
B
1
6
1
6
TO 7 OTHER CHANNELS
A
1
B
1
7
8
7
8
FCT16543T-1
A
1
B
1
OEBA
2
A
2
B
2
1
1
CEBA
2
A
B
2
B
2
2
2
3
2
3
A
2
LEBA
2
GND
A
GND
B
OEAB
2
2
4
5
2
4
5
A
2
B
2
CEAB
2
A
B
2
6
2
6
LEAB
2
V
V
CC
CC
C
D
A
2
1
A
2
B
2
7
8
7
8
B
2
1
A
2
B
2
24
25
26
27
28
33
32
31
30
29
GND
GND
C
D
CEAB
LEAB
OEAB
CEBA
2
LEBA
2
OEBA
2
2
2
2
FCT16543T-3
FCT16543T-2
TO 7 OTHER CHANNELS
Pin Description
Function Table[1]
Name
Description
Latch
Output
Buffers
Inputs
Status
OEAB A-to-B Output Enable Input (Active LOW)
OEBA B-to-A Output Enable Input (Active LOW)
CEAB A-to-B Enable Input (Active LOW)
CEAB LEAB OEAB
A to B
B
H
X
X
L
X
H
X
L
X
X
H
L
Storing
Storing
X
High Z
X
CEBA B-to-A Enable Input (Active LOW)
High Z
LEAB A-to-B Latch Enable Input (Active LOW)
Transparent
Current A
Inputs
LEBA B-to-A Latch Enable Input (Active LOW)
A
B
A-to-B Data Inputs or B-to-A Three-State Outputs[9]
B-to-A Data Inputs or A-to-B Three-State Outputs[9]
L
H
L
Storing
Previous A
Inputs[2]
Maximum Ratings[3, 4]
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Power Dissipation..........................................................1.0W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Storage Temperature .....................Com’l −55°C to +125°C
Ambient Temperature with
Power Applied.................................Com’l −55°C to +125°C
Operating Range
Ambient
DC Input Voltage .................................................−0.5V to +7.0V
DC Output Voltage..............................................−0.5V to +7.0V
Range
Industrial
Temperature
VCC
−40°C to +85°C
5V ± 10%
DC Output Current
(Maximum Sink Current/Pin) ...........................−60 to +120 mA
2
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Electrical Characteristics Over the Operating Range
Parameter
Description
Input HIGH Voltage
Input LOW Voltage
Input Hysteresis[6]
Test Conditions
Min.
Typ.[5]
Max.
Unit
V
VIH
VIL
VH
VIK
IIH
2.0
0.8
V
100
mV
V
Input Clamp Diode Voltage
Input HIGH Current
Input LOW Current
VCC=Min., IIN=−18 mA
−0.7
−1.2
±1
VCC=Max., VI=VCC
VCC=Max., VI=GND
VCC=Max., VOUT=2.7V
µA
µA
µA
IIL
±1
IOZH
High Impedance Output Cur-
rent (Three-State Output pins)
±1
IOZL
High Impedance Output Cur-
rent (Three-State Output pins)
VCC=Max., VOUT=0.5V
±1
µA
IOS
IO
Short Circuit Current[7]
Output Drive Current[7]
Power-Off Disable
VCC=Max., VOUT=GND
VCC=Max., VOUT=2.5V
VCC=0V, VOUT≤4.5V[8]
−80
−50
−140
−200
−180
±1
mA
mA
µA
IOFF
Notes:
1. A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA, and OEBA.
2. Data prior to LEAB LOW-to-HIGH Transition
H = HIGH Voltage Level. L = LOW Voltage Level.
X = Don’t Care. Z = High Impedance.
3. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature
range.
4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
5. Typical values are at VCC= 5.0V, TA= +25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
8. Tested at +25˚C.
9. On the 74FCT162H543T, these pins have bus hold.
3
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Output Drive Characteristics for CY74FCT16543T
Parameter
Description
Test Conditions
VCC=Min., IOH=−3 mA
Min.
2.5
Typ.[5]
3.5
Max.
Unit
VOH
Output HIGH Voltage
V
VCC=Min., IOH=−15 mA
VCC=Min., IOH=−32 mA
VCC=Min., IOL=64 mA
2.4
3.5
2.0
3.0
VOL
Output LOW Voltage
0.2
0.55
V
Output Drive Characteristics for CY74FCT162543T, CY74FCT162H543T
Parameter
IODL
Description
Output LOW Current[7]
Output HIGH Current[7]
Output HIGH Voltage
Output LOW Voltage
Test Conditions
VCC=5V, VIN=VIH or VIL, VOUT=1.5V
VCC=5V, VIN=VIH or VIL, VOUT=1.5V
VCC=Min., IOH=−24 mA
Min.
60
Typ.[5]
115
Max.
150
Unit
mA
mA
V
IODH
−60
2.4
−115
3.3
−150
VOH
VOL
VCC=Min., IOL=24 mA
0.3
0.55
V
Capacitance[6] (TA = +25˚C, f = 1.0 MHz)
Parameter
CIN
Description
Input Capacitance
Output Capacitance
Test Conditions
VIN = 0V
Typ.[5] Max.
Unit
pF
4.5
5.5
6.0
8.0
COUT
VOUT = 0V
pF
Power Supply Characteristics
Parameter
Description
Test Conditions
Typ.[5]
Max.
Unit
ICC
Quiescent Power Supply Current VCC=Max.
V
V
IN≤0.2V,
IN≥VCC−0.2V
5
500
µA
∆ICC
QuiescentPowerSupplyCurrent VCC=Max.
(TTL inputs HIGH)
VIN=3.4V[10]
0.5
60
1.5
mA
ICCD
Dynamic Power Supply
Current[11]
VCC=Max., One Input
Toggling, 50% Duty Cycle,
Outputs Open, OE=GND
VIN=VCC or
VIN=GND
100
µA/MHz
IC
Total Power Supply Current[12]
VCC=Max., f1=10 MHz,
50% Duty Cycle, Outputs
Open, One Bit Toggling,
OE=GND
VIN=VCC or
VIN=GND
0.6
0.9
2.4
6.4
1.5
2.3
mA
mA
mA
mA
VIN=3.4V or
VIN=GND
VCC=Max., f1=2.5 MHz,
50% Duty Cycle, Outputs
Open, Sixteen Bits Toggling,
OE=GND
VIN=VCC or
VIN=GND
4.5[13]
16.5[13]
VIN=3.4V or
VIN=GND
Notes:
10. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
11. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
12. IC
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC
ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
Quiescent Current with CMOS input levels
Power Supply Current for a TTL HIGH input
(VIN=3.4V)
IC
ICC
∆ICC
DH
NT
ICCD
=
=
=
Duty Cycle for TTL inputs HIGH
Number of TTL inputs at DH
Dynamic Current caused by an input transition pair
(HLH or LHL)
f0
f1
N1
=
=
=
Clock frequency for registered devices, otherwise zero
Input signal frequency
Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
13. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
4
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Switching Characteristics Over the Operating Range[14]
CY74FCT16543T
CY74FCT162543T
CY74FCT16543AT
CY74FCT162543AT
Fig.
Parameter
Description
Propagation Delay
Transparent Mode
A to B or B to A
Min.
Max.
Min.
Max.
Unit
No.[15]
tPLH
tPHL
1.5
8.5
1.5
6.5
ns
1, 3
tPLH
tPHL
Propagation Delay
LEBA to A, LEAB to B
1.5
1.5
12.5
12.0
1.5
1.5
8.0
9.0
ns
ns
1, 5
tPZH
tPZL
Output Enable Time
OEBA or OEAB to A or B
CEBA or CEAB to A or B
1, 7, 8
tPHZ
tPLZ
Output Disable Time
OEBA or OEAB to A or B
CEBA or CEAB to A or B
1.5
9.0
1.5
7.5
ns
1, 7, 8
tSU
tH
Set-up Time HIGH or LOW
A or B to LEAB or LEBA
2.0
2.0
—
—
2.0
2.0
—
—
ns
ns
4
4
Hold Time HIGH or LOW
A or B to LEAB or LEBA
tW
LEBA or LEAB Pulse Width LOW
Output Skew[16]
4.0
—
—
4.0
—
—
ns
ns
5
tSK(O)
0.5
0.5
—
CY74FCT16543CT
CY74FCT162543CT
CY74FCT162H543CT
CY74FCT16543ET
CY74FCT162543ET
Fig.
Parameter
Description
Min.
Max.
Min.
Max.
Unit No.[15]
tPLH
tPHL
Propagation Delay
Transparent Mode
A to B or B to A
1.5
5.1
1.5
3.4
ns
1, 3
tPLH
tPHL
Propagation Delay
LEBA to A, LEAB to B
1.5
1.5
5.6
7.8
1.5
1.5
3.7
4.8
ns
ns
1, 5
tPZH
tPZL
Output Enable Time
OEBA or OEAB to A or B
CEBA or CEAB to A or B
1, 7, 8
tPHZ
tPLZ
Output Disable Time
OEBA or OEAB to A or B
CEBA or CEAB to A or B
1.5
6.5
1.5
4.0
ns
1, 7, 8
tSU
tH
Set-up Time HIGH or LOW
A or B to LEAB or LEBA
2.0
2.0
—
—
1.0
1.0
—
—
ns
ns
4
4
Hold Time HIGH or LOW
A or B to LEAB or LEBA
tW
LEBA or LEAB Pulse Width LOW
Output Skew[16]
4.0
—
—
3.0
—
—
ns
ns
5
tSK(O)
0.5
0.5
—
Notes:
14. Minimum limits are specified but not tested on Propagation Delays.
15. See “Parameter Measurement Information” in the General Information section.
16. Skew between any two outputs of the same package switching in the same directional. This parameter is ensured by design.
5
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Ordering Information CY74FCT16543
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
CY74FCT16543ETPACT
Package Type
56-Lead (240-Mil) TSSOP
3.4
Z56
O56
O56
Z56
O56
Industrial
CY74FCT16543ETPVC/PVCT
CY74FCT16543CTPVC/PVCT
CY74FCT16543ATPACT
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
5.1
6.5
8.5
Industrial
Industrial
Industrial
CY74FCT16543TPVC/PVCT
Ordering Information CY74FCT162543
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
74FCT162543ETPACT
CY74FCT162543ETPVC
74FCT162543ETPVCT
74FCT162543CTPACT
CY74FCT162543CTPVC
74FCT162543CTPVCT
74FCT162543ATPACT
CY74FCT162543TPVC/PVCT
Package Type
3.4
Z56
O56
O56
Z56
O56
O56
Z56
O56
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
Industrial
5.1
Industrial
6.5
8.5
Industrial
Industrial
Ordering Information CY74FCT162H543T
Speed
(ns)
Package
Operating
Range
Ordering Code
Name
Package Type
56-Lead (240-Mil) TSSOP
5.1
74FCT162H543CTPACT
Z56
Industrial
6
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Package Diagrams
56-Lead Shrunk Small Outline Package O56
56-Lead Thin Shrunk Small Outline Package Z56
7
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Copyright 2000, Texas Instruments Incorporated
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