74FCT162646CTPACT [TI]
16-Bit Registered Transceivers; 16位寄存收发器型号: | 74FCT162646CTPACT |
厂家: | TEXAS INSTRUMENTS |
描述: | 16-Bit Registered Transceivers |
文件: | 总9页 (文件大小:77K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT16646T
CY74FCT162646T
SCCS060 - August 1994 - Revised March 2000
16-Bit Registered Transceivers
Features
Functional Description
• FCT-E speed at 3.8 ns
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for significantly improved
noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
• Industrial temperature range of −40˚C to +85˚C
• VCC = 5V ± 10%
The CY74FCT16646T and CY74FCT162646T 16-bit
transceivers are three-state, D-type registers, and control
circuitry arranged for multiplexed transmission of data directly
from the input bus or from the internal registers. Data on the A
or B bus will be clocked into the registers as the appropriate
clock pin goes to a HIGH logic level. Output Enable (OE) and
direction pins (DIR) are provided to control the transceiver
function. In the transceiver mode, data present at the high
impedance port may be stored in either the A or B register, or
in both. The select controls can multiplex stored and real-time
(transparent mode) data. The direction control determines
which bus will receive data when the Output Enable (OE) is
Active LOW. In the isolation mode (Output Enable (OE) HIGH),
A data may be stored in the B register and/or B data may be
stored in the A register. The output buffers are designed with
a power-off disable feature that allows live insertion of boards.
CY74FCT16646T Features:
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce) <1.0V at VCC = 5V,
TA = 25˚C
The CY74FCT16646T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
CY74FCT162646T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical VOLP (ground bounce) <0.6V at VCC = 5V,
TA= 25˚C
The CY74FCT162646T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162646T is ideal for driving transmission lines.
Logic Block Diagrams
OE
2
OE
1
DIR
2
DIR
CLKBA
SBA
CLKAB
1
CLKBA
2
1
SBA
CLKAB
2
1
2
1
SAB
2
SAB
1
B REG
D
B REG
D
C
C
A
2 1
A REG
D
B
2
1
A REG
D
B
1
1
A
1 1
C
C
FCT16646-2
TO 7 OTHER CHANNELS
FCT16646-1
TO 7 OTHER CHANNELS
Copyright © 2000, Texas Instruments Incorporated
CY74FCT16646T
CY74FCT162646T
Pin Configuration
SSOP/TSSOP
Top View
DIR
OE
1
1
1
2
56
55
CLKBA
1
1
CLKAB
SAB
1
SBA
3
4
54
53
1
GND
GND
B
A
1 1
5
6
7
8
9
52
51
50
49
48
1
1
2
A
1 2
B
1
V
CC
V
CC
A
1 3
B
1
3
4
5
A
1 4
B
1
A
1 5
B
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
47
46
45
44
43
42
41
40
39
38
37
36
35
34
GND
GND
B
A
1 6
1
6
7
8
1
2
3
B
1
A
1 7
A
1 8
B
1
B
2
A
2 1
A
2 2
B
2
B
2
A
2 3
GND
GND
B
A
2 4
2
4
5
6
A
2 5
B
2
A
2 6
B
2
V
CC
V
CC
B
A
2 7
2
7
8
A
2 8
B
2
24
25
33
32
GND
SAB
GND
SBA
2
26
27
28
31
30
29
2
CLKAB
CLKBA
2
2
OE
2
DIR
2
FCT16646-3
Pin Description
Pin Names
Description
A
Data Register A Inputs
Data Register B Outputs
B
Data Register B Inputs
Data Register A Outputs
CLKAB, CLKBA
SAB, SBA
DIR
Clock Pulse Inputs
Output Data Source Select Inputs
Direction
OE
Output Enable (Active LOW)
2
CY74FCT16646T
CY74FCT162646T
Function Table[1]
Inputs
Data I/O[2]
Function
OE
DIR
CLKAB
CLKBA
SAB
SBA
A
B
H
H
X
X
H or L
H or L
X
X
X
X
Input
Input Isolation
Store A and B Data
L
L
L
L
X
X
X
X
X
L
H
Output Input Real Time B Data to A Bus
Stored B Data to A Bus
H or L
L
L
H
H
X
X
X
L
H
X
X
Input Output Real Time A Data to Bus
Stored A Data to B Bus
H or L
BUS A
BUS B
BUS A
BUS B
DIR
L
OE
L
CLKAB
X
CLKBA
X
SAB
X
SBA
L
DIR
H
OE
L
CLKAB
X
CLKBA
X
SAB
L
SBA
X
Real-Time Transfer
BusB to BusA
Real-Time Transfer
BusA to BusB
BUS A
BUS B
BUS A
BUS A
[3]
DIR
H
L
OE
L
L
H
SAB
X
X
SBA
X
X
DIR
L
H
OE
L
L
SAB
X
H
SBA
H
X
CLKAB
X
CLKBA
X
CLKAB
X
H or L
CLKBA
H or L
X
X
X
X
Storage from
A and/or B
Transfer Stored Data
to A and/or B
Notes:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care
.
= LOW-to-HIGH Transition
2. The data output functions may be enabled or disabled by various signals at the OE or DIR inputs. Data input functions are always enabled, i.e., data at the
bus pins will be stored on every LOW-to-HIGH transition on the clock inputs.
3. Cannot transfer data to A-bus and B-bus simultaneously.
3
CY74FCT16646T
CY74FCT162646T
Maximum Ratings[4]
DC Output Current
(Maximum Sink Current/Pin) ...........................−60 to +120 mA
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Power Dissipation..........................................................1.0W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Storage Temperature .....................Com’l −55°C to +125°C
Ambient Temperature with
Power Applied.................................Com’l −55°C to +125°C
Operating Range
DC Input Voltage .................................................−0.5V to +7.0V
DC Output Voltage ..............................................−0.5V to +7.0V
Ambient
Range
Industrial
Temperature
VCC
−40°C to +85°C
5V ± 10%
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min.
Typ.[5]
Max.
Unit
VIH
VIL
VH
VIK
IIH
Input HIGH Voltage
2.0
V
V
Input LOW Voltage
Input Hysteresis[6]
0.8
100
mV
V
Input Clamp Diode Voltage
Input HIGH Current
Input LOW Current
VCC=Min., IIN=−18 mA
VCC=Max., VI=VCC
−0.7
−1.2
±1
µA
µA
µA
IIL
VCC=Max., VI=GND
VCC=Max., VOUT=2.7V
±1
IOZH
High Impedance Output Current
(Three-State Output pins)
±1
IOZL
High Impedance Output Current
(Three-State Output pins)
VCC=Max., VOUT=0.5V
±1
µA
IOS
IO
Short Circuit Current[7]
Output Drive Current[7]
Power-Off Disable
VCC=Max., VOUT=GND
VCC=Max., VOUT=2.5V
VCC=0V, VOUT≤4.5V[9]
−80
−50
−140
−200
−180
±1
mA
mA
µA
IOFF
Output Drive Characteristics for CY74FCT16646T
Parameter
Description
Test Conditions
Min.
2.5
Typ.[5]
3.5
Max.
Unit
V
VOH
Output HIGH Voltage
VCC=Min., IOH=−3 mA
VCC=Min., IOH=−15 mA
VCC=Min., IOH=−32 mA
VCC=Min., IOL=64 mA
2.4
3.5
V
2.0
3.0
V
VOL
Output LOW Voltage
0.2
0.55
V
Output Drive Characteristics for CY74FCT162646T
Parameter
Description
Output LOW Current[7]
Output HIGH Current[7]
Output HIGH Voltage
Output LOW Voltage
Test Conditions
VCC=5V, VIN=VIH or VIL, VOUT=1.5V
VCC=5V, VIN=VIH or VIL, VOUT=1.5V
VCC=Min., IOH=−24 mA
Min.
60
Typ.[5]
115
Max.
150
Unit
mA
mA
V
IODL
IODH
−60
2.4
−115
3.3
−150
VOH
VOL
VCC=Min., IOL=24 mA
0.3
0.55
V
Notes:
4. Stresses greater than those listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
5. Typical values are at VCC= 5.0V, TA= +25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametrics tests. In any sequence of parameter
tests, IOS tests should be performed last.
8. This parameter is measured at characterization but not tested.
9. Tested at +25˚C.
4
CY74FCT16646T
CY74FCT162646T
Capacitance (TA = +25˚C, f = 1.0 MHz)
Symbol
Description[8]
Conditions
VIN = 0V
Typ.
4.5
Max.
6.0
Unit
pF
CIN
Input Capacitance
Output Capacitance
COUT
VOUT =0V
5.5
8.0
pF
Power Supply Characteristics
Parameter
Description
Test Conditions[10]
Min. Typ.[5]
Max.
Unit
ICC
Quiescent Power Supply Current VCC=Max.
VIN<0.2V
VIN>VCC−0.2V
—
—
—
5
500
µA
∆ICC
Quiescent Power Supply Current VCC = Max.
0.5
75
1.5
mA
TTL Inputs HIGH
VIN=3.4V[11]
ICCD
Dynamic Power Supply
Current[12]
VCC=Max.
VIN=VCC or
VIN=GND
120
µA/MHz
Outputs Open
DIR=OE=GND
One-Bit Toggling
50% Duty Cycle
IC
Total Power Supply Current[13]
VCC=Max.
VIN=VCC or
VIN=GND
—
—
0.8
1.3
1.7
3.2
mA
Outputs Open
fo=10 MHz (CLKBA)
50% Duty Cycle
DIR=OE=GND
One-Bit Toggling
f1=5 MHz
VIN=3.4V or
VIN=GND
50% Duty Cycle
VCC=Max.
Outputs Open
VIN=VCC or
VIN=GND
—
—
3.8
8.3
6.5[14]
fo=10 MHz (CLKBA)
50% Duty Cycle
DIR=OE=GND
Sixteen-Bits Toggling
f1=2.5 MHz
VIN=3.4V or
VIN=GND
20.0[14]
50% Duty Cycle
Notes:
10. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
11. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
12. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
13. IC
IC
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC
ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
Quiescent Current with CMOS input levels
Power Supply Current for a TTL HIGH input (VIN=3.4V)
Duty Cycle for TTL inputs HIGH
ICC
∆ICC
DH
NT
ICCD
f0
f1
N1
Number of TTL inputs at DH
Dynamic Current caused by an input transition pair (HLH or LHL)
Clock frequency for registered devices, otherwise zero
Input signal frequency
Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
14. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
5
CY74FCT16646T
CY74FCT162646T
Switching Characteristics Over the Operating Range[15]
CY74FCT16646AT
CY74FCT162646AT
CY74FCT16646T
Parameter
tPLH
tPHL
Description
Propagation Delay
Bus to Bus
Min.
Max.
Min.
Max.
Unit
Fig. No.[16]
1.5
9.0
1.5
6.3
ns
1, 2
tPZH
tPZL
Output Enable Time
DIR or OE to Bus
1.5
1.5
1.5
1.5
2.0
1.5
5.0
—
14.0
9.0
9.0
11.0
—
1.5
1.5
1.5
1.5
2.0
1.5
5.0
—
9.8
6.3
6.3
7.7
—
ns
ns
ns
ns
ns
ns
ns
ns
1, 7, 8
1, 7, 8
1, 5
1,5
4
tPHZ
tPLZ
Output Disable Time
DIR or OE to Bus
tPLH
tPHL
Propagation Delay
Clock to Bus
tPLH
tPHL
Propagation Delay
SBA or SAB to Bus
tSU
Set-Up Time HIGH or
LOW Bus to Clock
tH
Hold Time HIGH or
LOW Bus to Clock
—
—
4
tW
Clock Pulse Width
HIGH or LOW
Output Skew[17]
—
—
6
tSK(O)
0.5
0.5
—
CY74FCT16646CT
CY74FCT16646ET
CY74FCT162646CT CY74FCT162646ET
Parameter
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPLH
tPHL
tPLH
tPHL
tSU
Description
Min.
Max.
Min.
Max.
Unit
Fig. No.[16]
Propagation Delay
Bus to Bus
1.5
5.4
1.5
3.8
ns
1, 2
Output Enable Time
DIR or OE to Bus
1.5
1.5
1.5
1.5
2.0
1.5
5.0
—
7.8
6.3
5.7
6.2
—
1.5
1.5
1.5
1.5
2.0
0.0
3.0
—
4.8
4.0
3.8
4.2
—
ns
ns
ns
ns
ns
ns
ns
ns
1, 7, 8
1, 7, 8
1, 5
1,5
4
Output Disable Time
DIR or OE to Bus
Propagation Delay
Clock to Bus
Propagation Delay
SBA or SAB to Bus
Set-Up Time HIGH or
LOW Bus to Clock
tH
Hold Time HIGH or
LOW Bus to Clock
—
—
4
tW
Clock Pulse Width
HIGH or LOW
Output Skew[17]
—
—
6
tSK(O)
0.5
0.5
—
Notes:
15. Minimum limits are specified but not tested on Propagation Delays.
16. See “Parameter Measurement Information” in the General Information section.
17. Skew any two outputs of the same package switching in the same direction. This parameter is ensured by design.
6
CY74FCT16646T
CY74FCT162646T
Ordering Information CY74FCT16646
Speed
Package
Name
Operating
Range
(ns)
3.8
5.4
6.3
9.0
Ordering Code
Package Type
56-Lead (300-Mil) SSOP
CY74FCT16646ETPVC/PVCT
CY74FCT16646CTPVC/PVCT
CY74FCT16646ATPVC/PVCT
CY74FCT16646TPVC/PVCT
O56
O56
O56
O56
Industrial
Industrial
Industrial
Industrial
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
Ordering Information CY74FCT162646
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
74FCT162646ETPACT
CY74FCT162646ETPVC
74FCT162646ETPVCT
74FCT162646CTPACT
CY74FCT162646CTPVC
74FCT162646CTPVCT
74FCT162646ATPACT
CY74FCT162646ATPVC
74FCT162646ATPVCT
Package Type
3.8
Z56
O56
O56
Z56
O56
O56
Z56
O56
O56
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
Industrial
Industrial
Industrial
5.4
6.3
7
CY74FCT16646T
CY74FCT162646T
Package Diagrams
56-Lead Shrunk Small Outline Package O56
56-Lead Thin Shrunk Small Outline Package Z56
8
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TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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Copyright 2000, Texas Instruments Incorporated
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