74FCT16841ATPVCG4 [TI]
20-Bit Latches;
| 型号： | 74FCT16841ATPVCG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 20-Bit Latches |
| 文件： | 总6页 (文件大小：62K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT16841T
CY74FCT162841T
SCCS067 - July 1994 - Revised March 2000
20-Bit Latches
Features
Functional Description
• FCT-C speed at 5.5 ns (FCT16841T Com’l)
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for significantly improved
noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
The CY74FCT16841T and CY74FCT162841T are 20-bit
D-type latches designed for use in bus applications requiring
high speed and low power. These devices can be used as two
independent 10-bit latches, or as a single 10-bit latch, or as a
single 20-bit latch by connecting the Output Enable (OE) and
Latch (LE) inputs. Flow-through pinout and small shrink
packaging aid in simplifying board layout. The output buffers
are designed with a power-off disable feature to allow live
insertion of boards.
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
• Industrial temperature range of −40˚C to +85˚C
• VCC = 5V ± 10%
The CY74FCT16841T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162841T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162841T is ideal for driving transmission lines.
CY74FCT16841T Features:
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce) <1.0V at VCC = 5V,
TA = 25˚C
CY74FCT162841T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical VOLP (ground bounce) <0.6V at VCC = 5V,
TA= 25˚C
Pin Configuration
Logic Block Diagrams
SSOP/TSSOP
Top View
OE
1
OE
Q
LE
1
1
1
2
56
55
D
1
1
1
2
1
1
LE
1
Q
D
2
1
3
4
54
53
GND
GND
D
D
1
1
1
1
3
4
5
6
7
8
9
52
51
50
49
48
1
3
Q
Q
D
C
D
1
4
Q
1
1
V
CC
V
CC
Q
D
D
D
1
5
6
1
1
1
5
6
7
Q
1
Q
7
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
GND
Q
GND
D
TO 9 OTHER CHANNELS
1
1
8
9
FCT16841-1
1
1
1
8
Q
D
D
9
OE
2
Q
10
1
10
Q
1
D
D
D
2
2
2
2
1
2
3
LE
2
Q
2
2
3
Q
2
D
1
2
GND
D
GND
D
C
2
2
4
5
Q
4
Q
5
2
2
Q
1
2
D
D
Q
6
2
6
2
V
CC
V
CC
Q
D
7
2
7
8
2
2
D
8
Q
2
TO 9 OTHER CHANNELS
GND
GND
FCT16841-2
Q
9
D
D
2
2
2
2
9
Q
10
2
10
OE
LE
2
FCT16841-3
Copyright © 2000, Texas Instruments Incorporated
CY74FCT16841T
CY74FCT162841T
Pin Description
Function Table[1]
Name
Description
Inputs
LE
Outputs
D
Data Inputs
D
H
L
OE
L
Q
H
LE
OE
O
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
Three-State Outputs
H
H
L
L
L
Q[2]
X
X
L
X
H
Z
Maximum Ratings[3, 4]
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Power Dissipation..........................................................1.0W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Storage Temperature......................................−55°C to +125°C
Ambient Temperature with
Power Applied..................................................−55°C to +125°C
Operating Range
DC Input Voltage .................................................−0.5V to +7.0V
DC Output Voltage ..............................................−0.5V to +7.0V
Ambient
Range
Industrial
Temperature
VCC
−40°C to +85°C
5V ± 10%
DC Output Current
(Maximum Sink Current/Pin) ...........................−60 to +120 mA
Electrical Characteristics Over the Operating Range
Parameter
Description
Input HIGH Voltage
Test Conditions
Logic HIGH Level
Min.
Typ.[5]
Max.
Unit
VIH
VIL
VH
VIK
IIH
2.0
V
V
Input LOW Voltage
Input Hysteresis[6]
Logic LOW Level
0.8
100
mV
V
Input Clamp Diode Voltage
Input HIGH Current
Input LOW Current
VCC=Min., IIN=−18 mA
VCC=Max., VI=VCC
−0.7
−1.2
±1
µA
µA
µA
IIL
VCC=Max., VI=GND
VCC=Max., VOUT=2.7V
±1
IOZH
High Impedance Output
±1
Current (Three-State Output pins)
IOZL
High Impedance Output
Current (Three-State Output pins)
VCC=Max., VOUT=0.5V
±1
µA
IOS
IO
Short Circuit Current[7]
Output Drive Current[7]
Power-Off Disable
VCC=Max., VOUT=GND
VCC=Max., VOUT=2.5V
VCC=0V, VOUT≤4.5V[8]
−80
−50
−140
−200
−180
±1
mA
mA
µA
IOFF
Notes:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = HIGH Impedance.
2. Output level before LE HIGH-to-LOW Transition.
3. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature
range.
4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
5. Typical values are at VCC= 5.0V, TA= +25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
8. Tested at +25˚C.
2
CY74FCT16841T
CY74FCT162841T
Output Drive Characteristics for CY74FCT16841T
Parameter
Description
Test Conditions
VCC=Min., IOH=−3 mA
Min.
2.5
Typ.[5]
3.5
Max.
Unit
VOH
Output HIGH Voltage
V
VCC=Min., IOH=−15 mA
VCC=Min., IOH=−32 mA
VCC=Min., IOL=64 mA
2.4
3.5
2.0
3.0
VOL
Output LOW Voltage
0.2
0.55
V
Output Drive Characteristics for CY74FCT162841T
Parameter
IODL
Description
Output LOW Current[7]
Output HIGH Current[7]
Output HIGH Voltage
Output LOW Voltage
Test Conditions
VCC=5V, VIN=VIH or VIL, VOUT=1.5V
VCC=5V, VIN=VIH or VIL, VOUT=1.5V
VCC=Min., IOH=−24 mA
Min.
60
Typ.[5]
115
Max.
150
Unit
mA
mA
V
IODH
−60
2.4
−115
3.3
−150
VOH
VOL
VCC=Min., IOL=24 mA
0.3
0.55
V
Capacitance[6] (TA =+25˚C, f = 1.0 MHz)
Symbol Description
CIN Input Capacitance
COUT Output Capacitance
Conditions
VIN = 0V
Typ.[5] Max.
Unit
pF
4.5
5.5
6.0
8.0
VOUT = 0V
pF
Power Supply Characteristics
Parameter
Description
Test Conditions
Min. Typ.[5]
Max.
Unit
ICC
Quiescent Power Supply
Current
VCC=Max.
VCC=Max.,
VIN<0.2V
VIN>VCC-0.2V
VIN=3.4V[9]
—
—
—
5
500
µA
∆ICC
Quiescent Power Supply
Current (TTL inputs HIGH)
0.5
60
1.5
mA
ICCD
Dynamic Power Supply
Current[10]
VCC=Max., One Input
Toggling, 50% Duty
Cycle, Outputs Open,
OE=GND
VIN=VCC or
VIN=GND
100
µA/MHz
IC
Total Power Supply Current[11] VCC=Max., f1=10 MHz,
50% Duty Cycle,
VIN=VCC or
VIN=GND
—
—
0.6
0.9
1.5
2.3
mA
Outputs Open, One Bit
Toggling, OE=GND
LE = VCC
VIN=3.4V or
VIN=GND
VCC=Max., f1=2.5 MHz, VIN=VCC or
50%DutyCycle,Outputs VIN=GND
—
—
3.0
8.0
5.5[12]
Open, Twenty Bits
Toggling, OE=GND
VIN=GND
VIN=3.4V or
20.5[12]
LE = VCC
Notes:
9. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
10. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
11. IC
IC
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC
ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
Quiescent Current with CMOS input levels
Power Supply Current for a TTL HIGH input (VIN=3.4V)
Duty Cycle for TTL inputs HIGH
ICC
∆ICC
DH
NT
ICCD
f0
f1
N1
Number of TTL inputs at DH
Dynamic Current caused by an input transition pair (HLH or LHL)
Clock frequency for registered devices, otherwise zero
Input signal frequency
Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
12. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
3
CY74FCT16841T
CY74FCT162841T
Switching Characteristics Over the Operating Range[13]
74FCT16841CT
74FCT16841AT 74FCT162841CT
Fig.
Parameter
Description
Propagation Delay
D to Q
Condition[14]
Min.
Max.
Min.
Max.
Unit No.[15]
tPLH
tPHL
CL=50 pF
RL=500Ω
1.5
9.0
1.5
5.5
ns
ns
ns
ns
1, 5
(LE=HIGH)
CL=300 pF[16]
1.5
1.5
1.5
1.5
1.5
1.5
1.5
2.5
2.5
13.0
12.0
16.0
11.5
23.0
7.0
1.5
1.5
1.5
1.5
1.5
1.5
1.5
2.0
1.5
13.0
6.4
15.0
6.5
12.0
5.7
6.0
—
RL=500Ω
tPLH
tPHL
Propagation Delay
LE to Q
CL=50 pF
RL=500Ω
1, 5
CL=300 pF[16]
RL=500Ω
tPHZ
tPZL
Output Enable Time
OE to Q
CL=50 pF
RL=500Ω
1, 7, 8
1, 7, 8
CL=300 pF[16]
RL=500Ω
tPHZ
tPLZ
Output Disable Time
OE to Q
CL=5 pF[16]
RL=500Ω
CL=50 pF
RL=500Ω
8.0
tSU
tH
Set-Up Time
HIGH or LOW, D to LE
CL=50 pF
RL=500Ω
—
ns
ns
9
9
Hold Time
HIGH or LOW, D to LE
—
—
tW
LE Pulse Width HIGH
Output Skew[18]
4.0[17]
—
—
4.0[17]
—
—
ns
ns
5
tSK(O)
0.5
0.5
—
Notes:
13. Minimum limits are specified but not tested on Propagation Delays.
14. See test circuit and waveform.
15. See “Parameter Measurement Information” in the General Information section.
16. These conditions are specified but not tested.
17. These limits are specified but not tested.
18. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.
Ordering Information for CY74FCT16841T
Speed
(ns)
Package
Name
Operating
Range
Ordering Code
Package Type
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
5.5
6.5
CY74FCT16841CTPVC/PVCT
CY74FCT16841ATPVC/PVCT
O56
O56
Industrial
Industrial
Ordering Information CY74FCT162841T
Speed
(ns)
Package
Operating
Range
Ordering Code
74FCT162841CTPACT
CY74FCT162841CTPVC
74FCT162841CTPVCT
Name
Package Type
5.5
Z56
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
Industrial
O56
O56
4
CY74FCT16841T
CY74FCT162841T
Package Diagrams
56-LeadShrunk Small Outline PackageO56
56-LeadThinShrunkSmall Outline Package Z56
5
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Copyright 2000, Texas Instruments Incorporated
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