AD7524MJ [TI]
Advanced LinCMOSE 8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTER; 高级LinCMOSE 8位乘法数位类比转换器
| 型号： | AD7524MJ |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Advanced LinCMOSE 8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTER |
| 文件： | 总9页 (文件大小：136K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
Advanced LinCMOS Silicon-Gate
Technology
J PACKAGE
(TOP VIEW)
Easily interfaced to Microprocessors
On-Chip Data Latches
R
OUT1
OUT2
GND
DB7
DB6
DB5
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
FB
Monotonicity Over Entire A/D Conversion
Range
REF
V
DD
WR
CS
DB0
DB1
DB2
Segmented High-Order Bits Ensure
Low-Glitch Output
Designed to Be interchangeable With
Analog Devices AD7524, PMI PM-7524, and
Micro Power Systems MP7524
DB4
DB3
Fast Control Signaling for Digital Signal
Processor Applications Including Interface
With SMJ320
FK PACKAGE
(TOP VIEW)
KEY PERFORMANCE SPECIFICATIONS
Resolution
8 Bits
Linearity error
1/2 LSB Max
5 mW Max
100 ns Max
80 ns Max
3
4
2
1
20 19
18
Power dissipation at V
Settling time
= 5 V
DD
V
GND
DB7
NC
DD
WR
NC
17
16
15
14
5
6
7
8
Propagation delay
CS
DB6
DB5
DB0
9 10 11 12 13
description
The AD7524M is an Advanced LinCMOS 8-bit
digital-to-analog converter (DAC) designed for
easy interface to most popular microprocessors.
NC–No internal connection
The AD7524M is an 8-bit multiplying DAC with input latches and with a load cycle similar to the write cycle of
a random access memory. Segmenting the high-order bits minimizes glitches during changes in the
most-significant bits, which produce the highest glitch impulse. The AD7524M provides accuracy to 1/2 LSB
without the need for thin-film resistors or laser trimming, while dissipating less than 5 mW typically.
Featuring operation from a 5-V to 15-V single supply, the AD7524M interfaces easily to most microprocessor
buses or output ports. Excellent multiplying (2 or 4 quadrant) makes the AD7524M an ideal choice for many
microprocessor-controlled gain-setting and signal-control applications.
The AD7524M is characterized for operation from –55°C to 125°C.
AVAILABLE OPTIONS
PACKAGE
CERAMIC CHIP
T
A
CERAMIC DIP
(J)
CARRIER
(FK)
–55°C to 125°C
AD7524MFK
AD7524MJ
Advanced LinCMOS is a trademark of Texas Instruments Incorporated.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
functional block diagram
R
R
R
15
REF
2R
2R
2R
2R
2R
16
R
FB
S-1
S-2
S-3
S-8
R
1
2
OUT1
OUT2
12
13
CS
3
Data Latches
GND
WR
4
5
6
11
DB7
(MSB)
DB6
DB5
DB0
(LSB)
Data Inputs
operating sequence
t (CS)
su
t (CS)
h
CS
10%
t
w
(WR)
WR
10%
10%
t (D)
su
t (D)
h
DB0–DB7
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 17 V
DD
Voltage between R and GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V
FB
Digital input voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V +0.3 V
I
DD
Reference voltage range, V
Peak digital input current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 µA
Operating free-air temperature range, T
Storage temperature range, T
Case temperature for 60 seconds, T : FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package . . . . . . . . . . . . . . . . . . . . . 300°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V
ref
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
V
= 5 V
V
= 15 V
DD
MIN NOM
DD
MIN NOM
UNIT
MAX
MAX
Supply voltage, V
4.75
2.4
5
5.25
14.5
13.5
15
15.5
V
V
DD
Reference voltage, V
ref
High-level input voltage, V
±10
±10
V
IH
Low-level input volage, V
0.8
1.5
V
IL
CS setup time, t
40
0
40
0
ns
ns
ns
ns
ns
°C
su(CS)
CS hold time, t
h(CS)
Data bus input setup time, t
25
25
su(D)
Data bus input hold time, t
10
10
h(D)
Pulse duration, WR low, t
w(WR)
40
40
Operating free-air temperature, T
–55
125
–55
125
A
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
electrical characteristics over recommended operating free-air temperature range, V = 10 V,
ref
OUT1 and OUT2 at GND (unless otherwise noted)
V
= 5 V
DD
TYP
V
= 15 V
TYP
DD
PARAMETER
TEST CONDITIONS
UNIT
µA
MIN
MAX
10
MIN
MAX
10
Full-range
I
I
High-level input current
Low-level input current
V = V
DD
IH
I
25°C
Full-range
25°C
1
1
–10
–1
–10
–1
V = 0
I
µA
IL
DB0–DB7 at 0,
WR and CS at 0 V
Full-range
25°C
±400
±50
±200
±50
OUT1
V
ref
= ±10 V
Output leakage
current
I
nA
pkg
DD
DB0–DB7 at V
DD,
WR and CS at 0
Full-range
25°C
±400
±200
OUT2
V
ref
= ±10 V
±50
2
±50
2
Quiescent DB0–DB7 at V min or V max
mA
IH
IL
I
Supply current
Full-range
25°C
500
100
0.16
0.02
500
100
0.04
0.02
Standby
DB0–DB7 at 0 V or V
µA
DD
Full-range
25°C
%/%
pF
Supply voltage sensitivity,
k
∆V = 10%
DD
SVS
∆gain/∆V
0.002
0.001
DD
Input capacitance, DB0–DB7,
WR, CS
C
C
V = 0
5
5
pF
pF
kΩ
i
I
OUT1
30
120
120
30
30
120
120
30
DB0–DB7 at 0, WR and CS at 0 V
OUT2
OUT1
OUT2
Output
capacitance
o
DB0–DB7 at V , WR and CS at 0 V
DD
Reference input impedance
(REF to GND)
5
20
5
20
operating characteristics over recommended operating free-air temperature range, V = 10 V,
ref
OUT1 and OUT2 at GND (unless otherwise noted)
V
= 5 V
V
DD
MIN
= 15 V
CC
MIN
PARAMETER
TEST CONDITIONS
UNIT
MAX
MAX
Linearity error
Gain error
±0.2
±1.4
±1
±0.2 %FSR
Full range
±0.6
See Note 1
%FSR
±0.5
25°C
Settling time (to 1/2 LSB)
See Note 2
See Note 2
100
100
ns
Propagation delay from digital input to
90% of final analog output current
80
80
ns
Full range
0.5
0.5
V
= ±10 V (100 kHz sinewave),
ref
WR and CS at 0, DB0–DB7 at 0
Feedthrough at OUT1 or OUT2
Temperature coefficient of gain
%FSR
25°C
0.25
0.25
%FSR/
°C
T
A
= 25°C to t
min
or t
±0.004
±0.001
max
NOTES: 1. Gain error is measured using the internal feedback resistor. Nominal Full Scale Range (FSR) = V – 1 LSB.
ref
2. OUT1 load = 100 Ω, C
ext
= 13 pF, WR at 0 V, CS at 0 V, DB0–DB7 at 0 V to V
or V
to 0 V.
DD
DD
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
PRINCIPLES OF OPERATION
The AD7524M is an 8-bit multiplying D/A converter consisting of an inverted R-2R ladder, analog switches, and
data input latches. Binary weighted currents are switched between the OUT1 and OUT2 bus lines, thus
maintaining a constant current in each ladder leg independent of the switch state. The high-order bits are
decoded and these decoded bits, through a modification in the R-2R ladder, control three equally weighted
current sources. Most applications only require the addition of an external operational amplifier and a voltage
reference.
The equivalent circuit for all digital inputs low is seen in Figure 1. With all digital inputs low, the entire reference
current, I , is switched to OUT2. The current source 1/256 represents the constant current flowing through the
ref
termination resistor of the R-2R ladder, while the current source I
represents leakage currents to the
Ikg
substrate. The capacitances appearing at OUT1 and OUT2 are dependent upon the digital input code. With all
digital inputs high, the off-state switch capacitance (30 pF maximum) appears at OUT2 and the on-state switch
capacitance (120 pF maximum) appears at OUT1. With all digital inputs low, the situation is reversed as shown
in Figure 1. Analysis of the circuit for all digital inputs high is similar to Figure 1; however, in this case, I would
ref
be switched to OUT1.
Interfacing the AD7524M D/A converter to a microprocessor is accomplished via the data bus and the CS and
WR control signals. When CS and WR are both low, the AD7524M analog output responds to the data activity
on the DB0–DB7 data bus inputs. In this mode, the input latches are transparent and input data directly affects
the analog output. When either the CS signal or WR signal goes high, the data on the DB0–DB7 inputs are
latched until the CS and WR signals go low again. When CS is high, the data inputs are disabled regardless
of the state of the WR signal.
The AD7524M is capable of performing 2-quadrant or full 4-quadrant multiplication. Circuit configurations for
2-quadrant or 4-quadrant multiplication are shown in Figures 2 and 3. Input coding for unipolar and bipolar
operation are summarized in Tables 1 and 2, respectively.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
PRINCIPLES OF OPERATION
R
FB
R
OUT1
I
30 pF
1kg
1kg
REF
OUT2
120 pF
1/256
I
Figure 1. AD7524M Equivalent Circuit With All Digital Inputs Low
V
ref
V
DD
R
= 2 kΩ
R
A
B
(see Note A)
C (see Note B)
R
FB
DB0–DB7
OUT1
OUT2
–
+
Output
CS
WR
GND
Figure 2. Unipolar Operation (2-Quadrant Multiplication)
V
ref
V
DD
20 kΩ
R
= 2 kΩ
R
A
B
20 kΩ
(see Note A)
–
+
C (see Note B)
R
FB
OUT1
Output
10 kΩ
DB0–DB7
–
+
CS
OUT2
5 kΩ
WR
GND
Figure 3. Bipolar Operation (4-Quadrant Operation)
NOTES: A.
R and R used only if gain adjustment is required.
A B
B. C phase compensation (10 – 15 pF) is required when using high-speed amplifiers to prevent ringing or oscillation.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
PRINCIPLES OF OPERATION
Table 1. Unipolar Binary Code
DIGITAL INPUT
(see NOTE 3)
ANALOG OUTPUT
MSB LSB
11111111
10000001
10000000
01111111
00000001
00000000
–V (255/256)
ref
–V (129/256)
ref
–V (128/256) = –V /2
ref ref
–V (127/256)
ref
–V (1/256)
ref
0
NOTES: 3. LSB = 1/256 (V ).
ref
Table 2. Bipolar (Offset Binary) Code
DIGITAL INPUT
(see NOTE 4)
ANALOG OUTPUT
MSB LSB
11111111
10000001
10000000
01111111
00000001
00000000
V
(127/128)
(128)
ref
V
0
ref
–V (128)
ref
–V (127/128)
–V
ref
ref
NOTES: 4. LSB = 1/128 (V ).
ref
microprocessor interfaces
Data Bus
D0–D7
Z-80A
WR
DB0–DB7
AD7524M
OUT1
OUT2
WR
CS
Decode
Logic
IORQ
A0–A15
Address Bus
Figure 4. AD7524M–Z-80A Interface
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995
PRINCIPLES OF OPERATION
Data Bus
D0–D7
6800
DB0–DB7
AD7524M
CS
Φ2
OUT1
OUT2
WR
Decode
Logic
VMA
A0–A15
Address Bus
Figure 5. AD7524M–6800 Interface
A8–A15
Address Bus
Decode
Logic
8-Bit
Latch
8051
CS
AD7524M
OUT1
OUT2
WR
ALE
WR
DB0–DB7
Address/Data Bus
AD0–AD7
Figure 6. AD7524M–8051 Interface
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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