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ADS7861EB/2K5 [TI]

双路 500kHz 12 位 2+2 通道同步采样模数转换器 | DBQ | 24;
ADS7861EB/2K5
型号： ADS7861EB/2K5
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

双路 500kHz 12 位 2+2 通道同步采样模数转换器 | DBQ | 24

光电二极管 转换器 模数转换器
文件： 总9页 (文件大小：1103K)
中文：  中文翻译
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User's Guide  
SLAU094A–October 2002–Revised May 2011  
ADS7861/8361/7863EVM  
ADS7861/8361/7863EVM  
This user's guide describes the characteristics, operation, and use of the ADS7861/8361/7863EVM. This  
evaluation model (EVM) is an evaluation board for the ADS7861, ADS7863, and ADS8361, a family of  
12-/16-bit, dual, 500-kSPS, 2+2 channel, serial analog-to- digital converters (ADCs). The EVM allows  
evaluation of all aspects of the ADS7861/7863/8361 devices. Complete circuit descriptions, a schematic  
diagram, and a bill of materials are included in this document.  
The following related documents are available for download through the Texas Instruments web site at  
http://www.ti.com.  
Related Documentation  
Document  
Literature Number  
SBAS110  
ADS7861 Product Data Sheet  
ADS7863 Product Data Sheet  
ADS8361 Product Data Sheet  
Op Amps for Everyone Design Guide  
SBAS383E  
SBAS230  
SLOD006B  
Contents  
1
2
3
4
5
6
EVM Overview ............................................................................................................... 2  
Analog Interface ............................................................................................................. 2  
Digital Interface .............................................................................................................. 3  
Power Supplies .............................................................................................................. 4  
EVM Operation .............................................................................................................. 4  
Schematic, Bill of Materials, and Layout ................................................................................. 5  
All trademarks are the property of their respective owners.  
1
SLAU094A–October 2002–Revised May 2011  
ADS7861/8361/7863EVM  
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Copyright © 2002–2011, Texas Instruments Incorporated  
 
EVM Overview  
www.ti.com  
1
EVM Overview  
1.1 Features  
ADS7861/8361/7863EVM:  
•
Full-featured evaluation board for the ADS7861, ADS8361, and ADS7863, dual, 500-kSPS,  
12-bit/16-bit, serial output, 2+2 analog input, simultaneous sampling analog-to-digital converters  
Analog inputs can be configured as single-ended or differential  
Built-in reference  
•
•
•
High-speed serial interface  
This manual covers the operation of the ADS7861EVM, ADS8361EVM, and the ADS7863EVM,  
collectively identified as ADS7861/8361/7863EVM. Throughout this document, the abbreviation EVM and  
the term evaluation module are synonymous with the ADS7861/8361/7863EVM. Unless otherwise  
indicated, all references to device operation apply to all three devices.  
1.2 Introduction  
The ADS7861 operates from 5 V for AVDD and DVDD while the ADS8361 operates from 2.7 V to 3.6 V for  
AVDD and DVDD. The ADS7863 operates from 2.7 V to 5.5 V for AVDD and DVDD. Each device is a  
high-speed, low-power, 12-bit or 16-bit A/D converter (ADC).  
The four fully-differential analog inputs are divided into two pairs (A and B). Each ADC accepts an analog  
input voltage in the range of –VREF to +VREF (5 VPP), centered on the internal 2.5-V reference. The  
device also accepts bipolar input ranges when a level shift circuit is used in the analog frontend circuitry.  
Refer to Section 12 of the Design Guide, Op Amps for Everyone (literature number SLOD006B) for  
information on various circuit applications.  
2
Analog Interface  
For maximum flexibility, the ADS7861/8361/7863EVM is designed for easy interfacing to multiple analog  
sources. Samtec part numbers SSW–110–22–F–D–VS–K and TSM–110–01–T–DV–P provide a  
convenient, 10-pin, dual row header/socket combination at J1. This header/socket provides access to the  
analog input pins of the ADC. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a  
variety of mating connector options. Table 1 summarizes the pinouts for analog interfaces J1.  
Table 1. J1: Analog Interface Pinout  
Pin Number  
J1.2  
Signal  
B1+  
B1–  
B0+  
B0–  
A1+  
A1–  
A0+  
A0–  
Description  
Noninverting input, channel B1  
Inverting input, channel B1  
Noninverting input, channel B0  
Inverting input, channel B0  
Noninverting input, channel A1  
Inverting input, channel A1  
Noninverting input, channel A0  
Inverting input, channel A0  
J1.4  
J1.6  
J1.8  
J1.10  
J1.12  
J1.14  
J1.16  
Pins are unused and should be left open for  
use with future amplifier and sensor input  
modules.  
J1.18  
Unused  
External reference source input (2.5 V nom,  
2.525 V max)  
J1.20  
REFIN  
AGND  
J1.1 to J1.19 (odd)  
Analog ground connections  
2
ADS7861/8361/7863EVM  
SLAU094A–October 2002–Revised May 2011  
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Digital Interface  
3
Digital Interface  
The ADS7861/8361/7863EVM is designed for easy interfacing to multiple control platforms. Samtec part  
numbers SSW–110–22–F–D–VS–K and TSM–110–01–T–DV–P provide a convenient, 10-pin dual row  
header/socket combination at J2. This header/socket provides access to the digital control and serial data  
pins of the ADS7861/8361. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a  
variety of mating connector options. Table 2 describes the J2 serial interface pins.  
Table 2. J2: Serial Interface Pins  
Pin Number  
Signal  
Description  
Chip select; active low signal, enables data  
transfer and device configuration  
J2.1  
CS  
J2.3  
J2.5  
SCLK  
SCLK(R)  
FS  
Serial clock  
Serial clock return for DSP host  
Frame sync  
J2.7  
J2.9  
FS(R)  
SDI  
Frame sync return for DSP host  
Serial data input  
J2.11  
J2.13  
SDO  
Serial data output  
Interrupt output; provides an interrupt  
source to the host processor  
J2.15  
INT  
Conversion start; provides an alternate  
method of conversion initialization  
J2.17  
J2.19  
CSTART  
SPARE  
3.1 Additional Control Options  
Table 3 shows the pinout of header J5. This dual-row, four-position header provides additional control  
functionality to the ADS7861/8361/7863EVM. Signals A0, M0, and M1 are configured with pull-up resistors  
by default. The jumper shunts supplied with the EVM can be used to set these signals to logic low. These  
signals can also be connected to control signals in the user's system.  
Table 3. J5: Header  
Pin Number  
J5.1  
Signal  
M0  
Description  
Selects two-channel or four-channel mode  
Selects between serial outputs A and B  
J5.3  
M1  
Operates in conjunction with M0. See device  
data sheet for details.  
J5.5  
A0  
J5.7  
OUT B  
DGND  
B channel secondary output  
Digital ground connections  
J5.2 to J5.8 (even)  
3
SLAU094A–October 2002–Revised May 2011  
ADS7861/8361/7863EVM  
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Power Supplies  
www.ti.com  
4
Power Supplies  
The ADS7861 EVM board requires 5 VDC for both the analog and digital sections of the ADC. While filters  
are provided for all power-supply inputs, optimal performance of the EVM requires a clean, well-regulated  
power source. Positive 5-VDC power is applied to J3 and J4 (pin 1 referenced to pin 2). The ADS8361 and  
ADS7863 each require 5 VDC for the analog supply located on J3, and 2.7 V to 5.5 VDC for the digital  
supply located on J4.  
An alternate power source can be applied via J6 located on the bottom side of the printed circuit board  
(PCB). If a variable digital supply voltage is desired, completely remove the shunt jumper from W3. Apply  
a 100-mA current limited dc voltage of not more than 5.5 V to J4.  
NOTE: The shunt jumper at location W3 should be placed across pin 2 and pin 3 for proper  
operation of the ADS7861. This configuration is the factory default condition for all device  
versions of the ADS7861/8361/7863EVM.  
4.1 Reference Voltage  
The ADS7861/8361/7863 can be configured to use its internal reference or external reference source  
through jumper W1 (see schematic appended to this document for details). If an external reference is  
desired, the shunt jumper on W1 should cover pins 2 and 3. The external reference is supplied through  
header/socket J1 pin 20 (J1.20).  
5
EVM Operation  
Apply a current limited (150 mA max) 5-VDC source to J3 and J4 before connecting the analog input  
signals and digital control signals.  
5.1 Analog Input  
The analog input source can be applied directly to header/socket J1 (top or bottom side) or through  
optional amplifier and signal conditioning modules. The analog input level should not exceed 5 VPP.The  
analog input range is from –VREF to VREF (0 V to 5 VDC) centered at 2.5 V.  
5.2 Digital Control  
The digital control signals can be applied directly to header/socket J2 (top or bottom side). The  
ADS7861/8361/7863EVM can also be connected directly to a DSP interface board. Consult the respective  
device product folder for a complete list of DSP interface cards and optional analog interface modules.  
5.3 Default Jumper and Header Settings  
Jumper W2 is provided to allow separation of the convert start (CONVST) and read (RD) signals. The  
factory default condition for the EVM is to place a shunt jumper between pin 1 and pin 2 of W2. This  
configuration combines signals RD and CONVST, which are applied to the ADC via pin J2.7. When W2 is  
moved to pin 2 and pin 3, the RD signal is applied via pin J2.7 while CONVST is applied to pin J2.17.  
Header J5 provides a way to access the M0, M1, and A1 control lines as well as the OUTB serial data.  
Shunt jumpers are placed on pins 1 and 2, 3 and 4, and 5 and 6 of J5, which defaults M0, M1, and A0 to  
logic low levels. Removing the jumpers allows these lines to go to logic high levels through the associated  
pull-up resistors R12, R13, and R14. In the factory default configuration, the ADC converts the A0 and B0  
inputs, and places AOUT serial data on pin J2.13, and BOUT serial data on pin J5.7.  
4
ADS7861/8361/7863EVM  
SLAU094A–October 2002–Revised May 2011  
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Copyright © 2002–2011, Texas Instruments Incorporated  
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Schematic, Bill of Materials, and Layout  
6
Schematic, Bill of Materials, and Layout  
A schematic for the ADS7861/8361/7863EVM is appended to this user's guide. The bill of materials is  
provided in Table 4.  
6.1 Bill of Materials  
NOTE: All components should be compliant with the European Union Restriction on Use of  
Hazardous Substances (RoHS) Directive. Some part numbers may be either leaded or  
RoHS. Verify that purchased components are RoHS-compliant. (For more information about  
TI's position on RoHS compliance, see the Quality and Eco-Info information on the TI web  
site.)  
Table 4. Bill of Materials  
Qty  
Item No. ADS7861 ADS8361 ADS7863  
Ref Des  
Description  
Printed Wiring Board  
Vendor  
Part Number  
1
2
1
8
1
8
1
8
N/A  
–
–
100pF, 0603, Ceramic, C0G, 50V,  
5%  
C1 to C8  
Murata  
Murata  
Murata  
Murata  
Murata  
GRM1885C1H101JA01D  
GRM1885C1H102JA01D  
GRM188R71H103KA01D  
GRM219R61A106KE44D  
GRM185R61C105KE44D  
C9, C10, C11, C12, 1000pF, 0603, Ceramic, C0G, 50V,  
C22 5%  
3
4
5
6
5
5
2
2
5
5
2
2
5
5
2
2
C13, C14, C15, C16, 0.1μF, 0603, Ceramic, X7R, 50V,  
C23  
10%  
10μF, 0805, Ceramic, X5R, 10V,  
10%  
C17, C18  
1.0μF, 0603, Ceramic, X5R, 16V,  
10%  
C19, C20  
0.47μF, 0603, Ceramic, X7R, 16V,  
10%  
7
8
9
1
2
2
1
2
2
1
2
2
C21  
L1, L2  
Murata  
TDK  
GRM188R71C474KA88D  
MMZ2012R601A  
Ferrite Chip 600Ω 500MA 0805  
10-Pin, Dual Row, SMT Header (20  
Pos.)  
J1, J2 (top side)  
Samtec  
TSM-110-01-T-DV-P  
J1B, J2B (bottom  
side)  
10-Pin, Dual Row, SMT Socket (20  
Pos.)  
10  
2
2
2
Samtec  
SSW-110-22-F-D-VS-K  
11  
12  
2
1
2
1
2
1
J3, J4  
J5  
2 Terminal Screw Connector  
OST  
ED555/2DS  
4-Pin, Dual Row, TH Header (8 Pos.)  
Samtec  
TSW-104-07-L-D  
5-Pin, Dual Row, SMT Socket (10  
Pos.)  
13  
1
1
1
J6 (bottom side)  
Samtec  
SSW-105-22-F-D-VS-K  
14  
15  
16  
17  
18  
19  
20  
21  
22  
0
2
0
2
0
2
W1  
Not installed  
W2, W3  
W4, W5  
3-Pin header  
Samtec  
Samtec  
Yageo  
Yageo  
Yageo  
–
TSW-103-07-L-S  
TMM-103-01-T-S  
RC0603FR-0749R9L  
RC0603FR-0733RL  
RC0603FR-0710KL  
–
2
2
2
3-Pin , 2mm header  
10  
2
10  
2
10  
2
R1 to R8, R14, R15 49.9Ω, 0603, 1%, 1/10W  
R9 R10  
R11 R12 R13  
R16  
33Ω, 0603, 1%, 1/10W  
10Ω, 0603, 1% 1/10W  
Not installed  
3
3
3
0
0
0
1
1
1
TP1  
Red Test Point Loop  
Black Test Point Loop  
Keystone  
Keystone  
5000  
2
2
2
TP2 TP3  
5001  
IC, ADC Dual 16-Bit 500kSPS  
24QSOP  
1
0
0
TI  
ADS7861E  
23  
U1  
IC, ADC Dual 16-Bit 500kSPS  
24QSOP  
0
0
1
1
0
1
0
1
1
TI  
TI  
ADS8361IDBQ  
ADS7863IDBQ  
24AA256-I/ST  
IC, ADC 12-Bit SER 2M 24QSOP  
IC EEPROM 256kBIT 400KHz  
8TSSOP  
24  
25  
U2  
U3  
Microchip  
IC OPAMP GP R-R 50MHz DUAL  
8SOIC  
1
1
1
TI  
OPA2365AID  
5
SLAU094A–October 2002–Revised May 2011  
ADS7861/8361/7863EVM  
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Copyright © 2002–2011, Texas Instruments Incorporated  
 
Revision History  
www.ti.com  
Revision History  
Changes from Original (October, 2002) to A Revision ................................................................................................... Page  
•
•
•
Updated entire document to current standards ....................................................................................... 1  
Added ADS7863EVM to document contents ......................................................................................... 1  
Added figure of EVM ..................................................................................................................... 1  
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.  
6
Revision History  
SLAU094A–October 2002–Revised May 2011  
Submit Documentation Feedback  
Copyright © 2002–2011, Texas Instruments Incorporated  
1
2
3
4
5
6
Revision History  
REV  
ECN Number  
Approved  
D
C
B
A
D
C
B
A
AVdd  
1
C22  
U3A  
8
4
1000pF  
3
2
U1  
B1+  
J2  
OPA2365  
R15  
R1  
2
3
19  
20  
18  
23  
49.9  
R14  
49.9  
/CS  
1
2
4
6
8
10  
49.9  
3
5
7
9
C1  
B1-  
R16  
U3B  
100pF  
R9  
33  
NI  
C9  
CLOCK  
RD  
1000pF  
C2  
100pF  
4
5
6
5
B0+  
B0-  
11 12  
13 14  
15 16  
17 18  
19 20  
R2  
7
49.9  
R3  
Data A  
6
7
A1+  
A1-  
49.9  
C3  
100pF  
C10  
21  
17  
BUSY  
W5  
1000pF  
C4  
100pF  
J1  
W4  
8
9
A0+  
R4  
1
3
5
7
9
2
4
6
8
10  
CONVST  
W2  
49.9  
R5  
A0-  
14  
15  
16  
22  
M1  
M0  
DVdd  
49.9  
C5  
100pF  
W1  
NI  
11  
10  
11 12  
13 14  
15 16  
17 18  
19 20  
REFout  
REFin  
C11  
1000pF  
C6  
100pF  
R11  
10K  
R12  
10K  
R13  
10K  
TP1  
A0 (SDI)  
Data B  
R6  
C21  
0.47uF  
49.9  
R7  
J5  
13  
12  
24  
1
AVdd  
DVdd  
1
3
5
7
2
4
6
8
49.9  
C7  
100pF  
AGND  
DGND  
C12  
DVdd  
1000pF  
C8  
100pF  
ADS7861/63E or ADS8361/63E  
R8  
49.9  
C20  
1uF  
C15  
0.1uF  
AVdd  
C23  
+3.3Vd  
0.1uF  
U2  
C19  
1uF  
C14  
0.1uF  
1
2
3
4
8
6
5
7
A0  
A1  
A2  
VCC  
SCL  
SDA  
AVdd  
R10  
33  
GND WP  
J3  
+5Va  
L1  
1
2
24AA256-I/ST  
C17  
C13  
+5Va  
J6  
TP2  
TP3  
0.1uF  
10uF  
1
2
4
6
8
10  
+Vd  
3
5
7
9
+5Vd  
+3.3Vd  
DVdd  
J4  
+Vd  
L2  
1
2
W3  
C18  
C16  
ti  
ADS78/8361/7863 EVM Schematic  
0.1uF  
10uF  
12500 TI Blvd. Dallas, Texas 75243  
Title:  
Engineer:  
Drawn By:  
Tom Hendrick  
Tom Hendrick  
SIZE:  
DATE:  
REV:  
11-May-2011  
B
C
FILE:  
5
SHEET:  
OF:  
6443171_C.DDB  
1
1
1
2
3
4
6
Evaluation Board/Kit Important Notice  
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:  
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION  
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the  
product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are  
not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,  
including product safety and environmental measures typically found in end products that incorporate such semiconductor  
components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding  
electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the  
technical requirements of these directives or other related directives.  
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30  
days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY  
SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING  
ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.  
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all  
claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to  
take any and all appropriate precautions with regard to electrostatic discharge.  
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER  
FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.  
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.  
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of  
patents or services described herein.  
Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the  
product. This notice contains important safety information about temperatures and voltages. For additional information on TI’s  
environmental and/or safety programs, please contact the TI application engineer or visit www.ti.com/esh.  
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or  
combination in which such TI products or services might be or are used.  
FCC Warning  
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION  
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and  
can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15  
of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this  
equipment in other environments may cause interference with radio communications, in which case the user at his own expense  
will be required to take whatever measures may be required to correct this interference.  
EVM Warnings and Restrictions  
It is important to operate this EVM within the input voltage range of 3.3 VDC to 5 VDC and the output voltage range of 0 VDC to 5  
VDC.  
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are  
questions concerning the input range, please contact a TI field representative prior to connecting the input power.  
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the  
EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load  
specification, please contact a TI field representative.  
During normal operation, some circuit components may have case temperatures greater than +30°C. The EVM is designed to  
operate properly with certain components above +85°C as long as the input and output ranges are maintained. These components  
include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of  
devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near  
these devices during operation, please be aware that these devices may be very warm to the touch.  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2011, Texas Instruments Incorporated  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,  
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are  
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where  
mandated by government requirements, testing of all parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide  
adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,  
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information  
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a  
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logic.ti.com  
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www.ti-rfid.com  
Video and Imaging  
Wireless  
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www.ti.com/wireless-apps  
RF/IF and ZigBee® Solutions www.ti.com/lprf  
TI E2E Community Home Page  
e2e.ti.com  
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Copyright © 2011, Texas Instruments Incorporated  

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