AFE7700IABJ [TI]
Quad-channel general-purpose 600-MHz to 6-GHz RF transceiver | ABJ | 400 | -40 to 85;
| 型号： | AFE7700IABJ |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Quad-channel general-purpose 600-MHz to 6-GHz RF transceiver | ABJ | 400 | -40 to 85 |
| 文件： | 总12页 (文件大小：409K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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AFE7700
SLOSE44A –OCTOBER 2019–REVISED MARCH 2020
AFE7700 Quad-Channel General Purpose RF Transceiver
1 Features
3 Description
The AFE7700 device is
a
high-performance,
1
•
•
•
Quad transmitters based on direct up-conversion
architecture:
multichannel transceiver, integrating four direct up-
conversion transmitter chains, four direct down-
conversion receiver chains, and two wideband RF
sampling digitizing auxiliary chains (feedback paths).
The high dynamic range of the transmitter and
receiver chains enables high performance wireless
transceiver systems.
–
Up to 600 MHz of RF transmitted bandwidth
per chain
Quad receivers based on 0-IF down-conversion
architecture:
–
Up to 200 MHz of RF received bandwidth per
chain
The low power dissipation and large channel
integration of the AFE7700 allows the device to
address the power and size constraints of multi-
antenna and phased array systems. The wideband
and high dynamic range feedback path can assist the
Digital Pre-Distortion (DPD) of power amplifiers and
IQ correction in the transmitter chain. The fast
SerDes speed can reduce the number of lanes
required to transfer the data in and out.
Feedback chain based on RF sampling ADC:
Up to 600 MHz of RF received bandwidth
–
•
•
RF frequency range: 600 MHz to 6 GHz
Four wideband fractional-N PLL, VCO for TX and
RX LO
•
•
Dedicated integer-N PLL, VCO for data converters
clock generation
Device Information(1)
JESD204B and JESD204C SerDes interface
support:
PART NUMBER
PACKAGE
BODY SIZE (NOM)
–
–
–
–
8 SerDes transceivers up to 29.5 Gbps
8b/10b and 64b/66b encoding
AFE7700
FCBGA (400)
17.00 mm × 17.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
16-bit, 12-bit, 24-bit and 32-bit formatting
Subclass 1 multi-device synchronization
AFE7700 Block Diagram
•
Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch
2 Applications
RF PLL 3
LO
Dist
VDD1p2TX
•
•
•
•
•
Phased Array Radar
PLL-VCO
VSSTX
TX Chain 1
1SRX
1STX
Defense Radio
DAC
1TX+/-
2SRX
2STX
Wireless Communications Test
Vector Signal Transceiver (VST)
Electronic Warfare
VDD1p8TX
VSSTX
TX Chain 2
DAC
2TX+/-
3SRX
3STX
SYSREF
TX DIG
TX DIG
From
SPI
4SRX
REFCLK_+/
-
4STX
VDD1p8PLL
VSSPLL
Common Dig
Syncbin/out
5SRX
5STX
TX Chain 4
TX DIG
TX DIG
DAC
3TX+/-
6SRX
6STX
From
SPI
TX Chain 3
VDD1p8TX
VSSTX
DAC
7SRX
7STX
4TX+/-
VDD1p2TX
VSSTX
From SPI
8SRX
8STX
MCU
GPIO
GPIOs
RF PLL 4
Config
LO
Dist
PLL-VCO
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
AFE7700
SLOSE44A –OCTOBER 2019–REVISED MARCH 2020
www.ti.com
4 Description (continued)
Each receiver chain of the AFE7700 includes a 28-dB range digital step attenuator (DSA), followed by a
wideband passive IQ demodulator, and a baseband amplifier with integrated programmable antialiasing low pass
filters, driving a continuous-time sigma-delta ADC. The RX chain can receive an instantaneous bandwidth (IBW)
up to 200 MHz. Each receiver channel has two analog peak power detectors and various digital power detectors
to assist an external or internal autonomous AGC control for receiver channels, and a RF overload detector for
device reliability protection. The integrated QMC (quadrature mismatch compensation) algorithm is capable to
continuously monitor and correct for the RX chain I and Q imbalance mismatch without the need to inject any
specific signals or perform offline calibration.
Each transmitter chain includes two 14-bit, 3-Gsps IQ DACs, followed by a programmable reconstruction and
DAC image rejection filter, an IQ modulator driving a wideband RF amplifier with 39-dB range gain control. The
TX chain integrated QMC and LO leakage cancellation algorithms, leveraging the FB path can constantly track
and correct for the TX chain IQ mismatch and LO leakage.
Each FB path is based on RF sampling architecture, and includes an input RF DSA driving a 14-bit, 3-Gsps RF
ADC. The direct sampling architecture provides an inherently wideband receiver chain and simplifies the
calibration of the TX chains impairments. The FB path integrates two independent NCO that allows a fast
switching between two observed RF input bands.
The synthesizer section integrates four fractional-N RF PLL that can generate four different RF LO, allowing the
device to support up to two different bands, each one configured as two transmitters, two receivers and one
feedback paths.
spacer
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (October 2019) to Revision A
Page
•
Changed the device status From: Advanced Information To: Production Data .................................................................... 1
2
Submit Documentation Feedback
Copyright © 2019–2020, Texas Instruments Incorporated
Product Folder Links: AFE7700
AFE7700
www.ti.com
SLOSE44A –OCTOBER 2019–REVISED MARCH 2020
6 Device and Documentation Support
6.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
6.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
6.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
6.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
6.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
7 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2019–2020, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: AFE7700
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
AFE7700IABJ
AFE7700IALK
ACTIVE
ACTIVE
FCBGA
FCBGA
ABJ
ALK
400
400
90
90
RoHS & Green
SNAGCU
Level-3-260C-168 HR
Call TI
-40 to 85
-40 to 85
AFE7700
Non-RoHS &
Non-Green
Call TI
AFE7700
SNPB
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE OUTLINE
ABJ0400A
FCBGA - 2.65 mm max height
SCALE 0.750
BALL GRID ARRAY
17.2
16.8
A
BALL A1 CORNER
17.2
16.8
(
16)
B
2.65 MAX
0.2 C
(2.08)
C
SEATING PLANE
NOTE 4
0.76
0.56
BALL TYP
0.12 C
0.5
0.3
TYP
15.2 TYP
SYMM
(0.9) TYP
0.8 TYP
Y
V
T
W
U
R
N
L
P
M
K
H
F
15.2
TYP
SYMM
J
G
E
C
A
0.55
0.45
400X
D
B
0.15
0.08
C A B
C
NOTE 3
1
3
5
7
9
11 13 15 17 19
10 12 14 16 18 20
0.8 TYP
2
4
6
8
4221311/B 04/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Dimension is measured at the maximum solder ball diameter, parallel to primary datum C.
4. Primary datum C and seating plane are defined by the spherical crowns of the solder balls.
www.ti.com
EXAMPLE BOARD LAYOUT
ABJ0400A
FCBGA - 2.65 mm max height
BALL GRID ARRAY
(0.8) TYP
4
5
2 3
6
7
8
10
16
18
19 20
17
1
9
11 12 13 14 15
A
B
C
D
E
F
(0.8) TYP
0.415
0.385
G
H
J
400X
SYMM
K
L
M
N
P
R
T
U
V
W
Y
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:6X
(
0.4)
0.025 MAX
0.025 MIN
METAL
UNDER
MASK
METAL
EXPOSED
METAL
EXPOSED
METAL
(
0.4)
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4221311/B 04/2020
NOTES: (continued)
5. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SPRU811 (www.ti.com/lit/spru811).
www.ti.com
EXAMPLE STENCIL DESIGN
ABJ0400A
FCBGA - 2.65 mm max height
BALL GRID ARRAY
(0.8) TYP
(
0.4) TYP
10
4
5
2 3
6
7
8
16
18
19 20
17
1
9
11 12 13 14 15
A
B
(0.8)
TYP
C
D
E
F
G
H
J
SYMM
K
L
M
N
P
R
T
U
V
W
Y
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.15 mm THICK STENCIL
SCALE:6X
4221311/B 04/2020
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
PACKAGE OUTLINE
ALK0400A
FCBGA - 2.65 mm max height
SCALE 0.750
BALL GRID ARRAY
17.2
16.8
A
BALL A1 CORNER
17.2
16.8
(
16)
B
2.65 MAX
0.2 C
(2.08)
C
SEATING PLANE
NOTE 4
0.76
0.56
BALL TYP
0.12 C
0.5
0.3
TYP
15.2 TYP
SYMM
(0.9) TYP
0.8 TYP
Y
V
T
W
U
R
N
L
P
M
K
H
F
15.2
TYP
SYMM
J
G
E
C
A
0.55
0.45
400X
D
B
0.15
0.08
C A B
C
NOTE 3
1
3
5
7
9
11 13 15 17 19
10 12 14 16 18 20
0.8 TYP
2
4
6
8
4225930/A 05/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Dimension is measured at the maximum solder ball diameter, parallel to primary datum C.
4. Primary datum C and seating plane are defined by the spherical crowns of the solder balls.
5. Pb-Free die bump and SnPb solder ball.
www.ti.com
EXAMPLE BOARD LAYOUT
ALK0400A
FCBGA - 2.65 mm max height
BALL GRID ARRAY
(0.8) TYP
4
5
2 3
6
7
8
10
16
18
19 20
17
1
9
11 12 13 14 15
A
B
C
D
E
F
(0.8) TYP
G
H
J
400X ( 0.4)
SYMM
K
L
M
N
P
R
T
U
V
W
Y
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:6X
(
0.4)
0.025 MAX
0.025 MIN
METAL
UNDER
MASK
METAL
EXPOSED
METAL
EXPOSED
METAL
(
0.4)
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4225930/A 05/2020
NOTES: (continued)
6. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SPRU811 (www.ti.com/lit/spru811).
www.ti.com
EXAMPLE STENCIL DESIGN
ALK0400A
FCBGA - 2.65 mm max height
BALL GRID ARRAY
(0.8) TYP
(
0.4) TYP
10
4
5
2 3
6
7
8
16
18
19 20
17
1
9
11 12 13 14 15
A
B
(0.8)
TYP
C
D
E
F
G
H
J
SYMM
K
L
M
N
P
R
T
U
V
W
Y
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.15 mm THICK STENCIL
SCALE:6X
4225930/A 05/2020
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
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