BQ2002EPNE4_技术文档

bq2002E/G

NiCd/NiMH Fast-Charge Management ICs

Features

General Description

Fast charge is terminated by any of

the following:

➤

Fast charge of nickel cadmium The bq2002E and bq2002G Fast-

or nickel-metal hydride batter- Charge ICs are low-cost CMOS bat-

n

Peak voltage detection (PVD)

Negative delta voltage (- V)

ies

tery-charge controllers providing reli-

able charge termination for both NiCd

and NiMH battery applications. Con-

trolling a current-limited or con-

stant-current supply allows the

bq2002E/G to be the basis for a cost-

effective stand-alone or system-inte-

grated charger. The bq2002E/G inte-

grates fast charge with optional top-off

and pulsed- trickle control in a single

IC for charging one or more NiCd or

NiMH battery cells.

∆

➤

Direct LED output displays

charge status

Maximum voltage

Maximum temperature

Maximum time

Fast-charge termination by -∆V,

maximum voltage, maximum

temperature, and maximum

time

After fast charge, the bq2002E/G op-

tionally tops-off and pulse-trickles the

battery per the pre-configured limits.

Fast charge may be inhibited using

the INH pin. The bq2002E/G may

also be placed in low-standby-power

mode to reduce system power con-

sumption.

➤

Internal band-gap voltage ref-

erence

➤

Optional top-off charge

Fast charge is initiated on application

of the charging supply or battery re-

placement. For safety, fast charge is

inhibited if the battery temperature

and voltage are outside configured

Selectable pulse trickle charge

rates

The bq2002E differs from the

bq2002G only in that a slightly dif-

ferent set of fast-charge and top-off

time limits is available. All differ-

ences between the two ICs are illus-

trated in Table 1.

➤

Low-power mode

8-pin 300-mil DIP or 150-mil limits.

SOIC

Pin Connections

Pin Names

TS

Temperature sense input

Supply voltage input

Charge inhibit input

Charge control output

TM

Timer mode select input

TM

LED

BAT

1

2

3

4

8

7

6

5

CC

V_CC

INH

CC

LED

BAT

V_SS

Charging status output

Battery voltage input

System ground

INH

V

CC

V

SS

TS

8-Pin DIP or

Narrow SOIC

PN-200201.eps

bq2002E/G Selection Guide

Part No. LBAT

TCO

HTF

LTF

PVD Fast Charge

t_MTO

Top-Off

None

C/16

Maintenance

-∆V

➤

bq2002E

None

➤

C/2

1C

2C

C/2

1C

2C

200

80

C/32

0.175

V_CC

0.5

V_CC

0.6

V_CC

40

None

C/16

bq2002G

None

➤

160

80

0.175

V_CC

0.5

V_CC

0.6

V_CC

➤

40

None

SLUS132 - FEBRUARY 1999

1

bq2002E/G

sumes operation at the point where initially

suspended.

Pin Descriptions

Timer mode input

TM

Charge control output

CC

A three-level input that controls the settings

for the fast charge safety timer, voltage ter-

mination mode, top-off, pulse-trickle, and

voltage hold-off time.

An open-drain output used to control the

charging current to the battery. CC switch-

ing to high impedance (Z) enables charging

current to flow, and low to inhibit charging

current. CC is modulated to provide top-off,

if enabled, and pulse trickle.

Charging output status

LED

BAT

Open-drain output that indicates the charging

status.

Functional Description

Battery input voltage

Figure 2 shows a state diagram and Figure 3 shows a

block diagram ofthe bq2002E/G.

The battery voltage sense input. The input to

this pin is created by a high-impedance re-

sistor divider network connected between

the positive and negative terminals of the

battery.

Battery Voltage and Temperature

Measurements

Battery voltage and temperature are monitored for

maximum allowable values. The voltage presented on

the battery sense input, BAT, should represent a

single-cell potential for the battery under charge.

resistor-divider ratio of

System ground

V_SS

TS

Temperature sense input

A

Input for an external battery temperature

monitoring thermistor.

RB1

RB2

= N - 1

Supply voltage input

V_CC

INH

is recommended to maintain the battery voltage within

the valid range, where N is the number of cells, RB1 is

the resistor connected to the positive battery terminal,

and RB2 is the resistor connected to the negative bat-

tery terminal. See Figure 1.

±

5.0V 20% power input.

Charge inhibit input

When high, INH suspends the fast charge in

progress. When returned low, the IC re-

Note: This resistor-divider network input impedance to

end-to-end should be at least 200kΩ and less than 1 MΩ.

V

CC

PACK +

RT

V

RB1

RB2

R3

R4

CC

BAT

TM

T

S

N

T

bq2002E/G

C

V

SS

V

SS

BAT pin connection

Mid-level

setting for TM

NTC = negative temperature coefficient thermistor.

Thermistor connection

Fg2002E/G01.eps

Figure 1. Voltage and Temperature Monitoring and TM Pin Configuration

2

bq2002E/G

Chip on

4.0V

Battery Voltage

too High?

V

CC

V

>

2V

BAT

V

< 2V

BAT

Battery Voltage

too Low?

V

< 0.175 V

CC

BAT

0.175

> 0.6

V

< V

BAT

CC

V

< 0.6

V

CC

TS

CC

TS

Battery

Temperature?

Charge

Pending

V or

(PVD or -

Maximum Time Out)

and TM = Low

Fast

LED =

Low

Trickle

LED =

Flash

V

> 0.175

< 2V, and

> V /2

CC

V

,

CC

BAT

TS

V

> 2V

BAT

V

> 2V or

Top-off

LED = Z

BAT

< V /2 or

V

TS

CC

((PVD or - V or

Maximum Time Out)

V

2V

BAT

Low)

and TM

Trickle

V

2V or

/2 or

BAT

TS

LED = Z

V

CC

Maximum Time Out

SD2002C.eps

Figure 2. State Diagram

Clock

Phase

Generator

OSC

TM

INH

Sample

History

Timing

Control

Voltage

Reference

PVD, - V

ALU

A to D

Converter

Charge-Control

State Machine

LBAT

Check

MCV

Check

BAT

HTF TCO

Check Check

Power-On

Reset

Power

Down

CC

LED

V

TS

V

CC

SS

Bd2002CEG.eps

Figure 3. Block Diagram

3

bq2002E/G

V

CC

= 0

Fast Charging

Top-Off

(optional)

Pulse-Trickle

Fast Charging

See Table 1

73ms

CC Output

1.17s

Charge initiated by application of power

Charge initiated by battery replacement

1.17s

LED

TD2002EG.eps

Figure 4. Charge Cycle Phases

1. Application of power to V_CCor

2. Voltage at the BAT pin falling through the maximum

cell voltage V_MCVwhere

A ground-referenced negative temperature coefficient ther-

mistor placed near the battery may be used as a low-cost

temperature-to-voltage transducer. The temperature

sense voltage input at TS is developed using a resistor-

thermistor network between V_CCand V_SS. See Figure 1.

V_MCV= 2V

±

5%.

If the battery is within the configured temperature and

voltage limits, the IC begins fast charge. The valid bat-

tery voltage range is V_LBAT<V_BAT<V_MCV, where

Starting A Charge Cycle

Either oftwo events starts a charge cycle (see Figure 4):

Table 1. Fast-Charge Safety Time/Hold-Off/Top-Off Table

Typical Fast-

Charge and

Top-Off

Maximum

Synchro-

Corre-

sponding

Fast-Charge

Rate

Time Limits

(minutes)

Typical PVD

and -∆V

Hold-Off Time Top-Off Trickle

(seconds)

Pulse-

Trickle Sampling

Width

(ms)

nized

Pulse-

Period

(seconds)

bq2002E bq2002G

TM

Mid

Low

High

Termination

PVD

Rate

Disabled

C/16

Rate

C/32

C/2

1C

2C

200

80

160

80

300

73

37

18

18.7

9.4

PVD

150

-

∆

V

40

75

Disabled

Notes:

Typical conditions = 25°C, V_CC= 5.0V

Mid = 0.5 V_CC0.5V

Tolerance on all timing is

±

*

±

12%.

4

bq2002E/G

The response of the IC to pulses less than 100ns in

width or between 3.5ms and 12ms is indeterminate. Tol-

erance on all timing is ±12%.

V_LBAT= 0.175 V_CC

The valid temperature range is V_TS>V_HTFwhere

V_HTF= 0.6 V_CC5%.

±20%

±

Voltage Termination Hold-off

If the battery voltage or temperature is outside of these

limits, the IC pulse-trickle charges until the next new

charge cycle begins.

A hold-off period occurs at the start of fast charging.

During the hold-off time, the PVD and -∆V terminations

are disabled. This avoids premature termination on the

voltage spikes sometimes produced by older batteries

when fast-charge current is first applied. Maximum

voltage and temperature terminations are not affected

by the hold-off period.

If V_MCV< V_BAT< V_PD(see “Low-Power Mode”) when a

new battery is inserted, a delay of 0.35 to 0.9s is imposed

before the new charge cycle begins.

Fast charge continues until termination by one or more of

the five possible termination conditions:

Maximum Voltage, Temperature, and Time

n

Peak voltage detection (PVD)

Negative delta voltage (- V)

Any time the voltage on the BAT pin exceeds the maxi-

mum cell voltage,V_MCV, fast charge or optional top-off

charge is terminated.

∆

Maximum voltage

Maximum temperature

Maximum time

Maximum temperature termination occurs anytime the

voltage on the TS pin falls below the temperature cut-off

threshold V_TCOwhere

V_TCO= 0.5 V_CC± 5%.

PVD and -∆V Termination

Maximum charge time is configured using the TM pin.

Time settings are available for corresponding charge

rates of C/2, 1C, and 2C. Maximum time-out termina-

There are two modes for voltage termination, depending

on the state of TM. For -

than any previously measured value by 12mV

charge is terminated. For PVD (TM = low or mid), a de- enforced again on the top-off phase, if selected. There is

∆V (TM = high), if V_BATis lower

±

3mV, fast tion is enforced on the fast-charge phase, then reset, and

no time limit on the trickle-charge phase.

crease of 2.5mV ±2.5mV terminates fast charge. The PVD

and -∆Vtests are valid in the range 1V< V_BAT< 2V.

Top-off Charge

Synchronized Voltage Sampling

Voltage sampling at the BAT pin for PVD and -

An optional top-off charge phase may be selected to

follow fast charge termination for 1C and C/2 rates.

This phase may be necessary on NiMH or other bat-

tery chemistries that have a tendency to terminate

charge before reaching full capacity. With top-off en-

abled, charging continues at a reduced rate after

fast-charge termination for a period of time selected

by the TM pin. (See Table 1.) During top-off, the CC

pin is modulated at a duty cycle of 73ms active for

every 1097ms inactive. This modulation results in an

average rate 1/16th that of the fast charge rate. Maxi-

mum voltage, time, and temperature are the only ter-

mination methods enabled during top-off.

∆

V termi-

nation may be synchronized to an external stimulus us-

ing the INH input. Low-high-low input pulses between

100ns and 3.5ms in width must be applied at the INH

pin with a frequency greater than the “maximum syn-

chronized sampling period” set by the state of the TM

pin as shown in Table 1. Voltage is sampled on the fal-

ling edge ofsuch pulses.

If the time between pulses is greater than the synchro-

nizing period, voltage sampling “free-runs” at once every

17 seconds. A sample is taken by averaging together

voltage measurements taken 57

32 measurements in PVD mode and 16 measurements

in - V mode. The resulting sample periods (9.17 and

µs apart. The IC takes

Pulse-Trickle Charge

∆

Pulse-trickle is used to compensate for self-discharge

while the battery is idle in the charger. The battery is

pulse-trickle charged by driving the CC pin active once

every 1.17s for the period specified in Table 1. This re-

sults in a trickle rate ofC/32.

18.18ms, respectively) filter out harmonics centered

around 55 and 109Hz. This technique minimizes the ef-

fect of any AC line ripple that may feed through the

power supply from either 50 or 60Hz ACsources.

If the INH input remains high for more than 12ms, the

voltage sample history kept by the IC and used for PVD

TM Pin

and -

tory is started. Such a reset is required when transition-

ing from free-running to synchronized voltage sampling.

∆V termination decisions is erased and a new his-

The TM pin is a three-level pin used to select the

charge timer, top-off, voltage termination mode, trickle

5

bq2002E/G

rate, and voltage hold-off period options. Table 1 de-

scribes the states selected by the TM pin. The mid-

level selection input is developed by a resistor di-

vider between V_CCand ground that fixes the voltage

Low-Power Mode

The IC enters a low-power state when V_BATis driven

above the power-down threshold (V_PD) where

on TM at V_CC/2 ± 0.5V. See Figure 4.

V_PD= V_CC- (1V

±0.5V)

Charge Status Indication

Both the CC pin and the LED pin are driven to the

high-Z state. The operating current is reduced to less

than 1 A in this mode. When V_BATreturns to a value

below V_PD, the IC pulse-trickle charges until the next

new charge cycle begins.

A fast charge in progress is uniquely indicated when the

LED pin goes low. The LED pin is driven to the high-Z

state for all conditions other than fast charge. Figure 2

outlines the state ofthe LED pin during charge.

µ

Charge Inhibit

Fast charge and top-off may be inhibited by using the

INH pin. When high, INH suspends all fast charge and

top-off activity and the internal charge timer. INH

freezes the current state of LED until inhibit is removed.

Temperature monitoring is not affected by the INH pin.

During charge inhibit, the bq2002E/G continues to

pulse-trickle charge the battery per the TM selection.

When INH returns low, charge control and the charge

timer resume from the point where INH became active.

6

bq2002E/G

Absolute Maximum Ratings

Symbol

V_CC

Parameter

V_CCrelative to V_SS

Minimum

-0.3

Maximum

+7.0

Unit

V

Notes

V_T

DC voltage applied on any pin

excluding V_CCrelative to V_SS

-0.3

+7.0

V

T_OPR

T_STG

Operating ambient temperature

Storage temperature

0

-40

-

+70

+85

°C

Commercial

T_SOLDERSoldering temperature

+260

+85

10 sec max.

T_BIAS

Temperature under bias

-40

Note:

Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional opera-

tion should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Expo-

sure to conditions beyond the operational limits for extended periods of time may affect device reliability.

DC Thresholds (T = 0 to 70°C; V

±20%)

CC

A

Symbol

Parameter

Rating

Tolerance

Unit

Notes

V_TCO

Temperature cutoff

0.5 V_CC

*

±

5%

V

V_TS

fast charge and top-off

≤

V_TCOinhibits/terminates

V_HTF

V_MCV

V_LBAT

High temperature fault

Maximum cell voltage

Minimum cell voltage

BAT input change for

V

V_TS< V_HTFinhibits fast charge

0.6 VCC

start

V_BAT

2

0.175 V_CC

-12

≥

V_MCVinhibits/terminates

fast charge and top-off

V

V_BAT< V_LBATinhibits fast charge

start

±

20%

mV

-∆

V

±3

-∆

V detection

PVD

BAT input change for

PVD detection

-2.5

±

2.5

7

bq2002E/G

Recommended DC Operating Conditions (T = 0 to 70°C)

A

Symbol

V_CC

Condition

Supply voltage

V, PVD detect voltage

Minimum

Typical

Maximum

Unit

V

Notes

4.0

1

5.0

6.0

2

V_DET

V_BAT

V_TS

-

∆

-

V

Battery input

0

V_CC

-

V

Thermistor input

Logic input high

Logic input mid

0.5

V

V_TS< 0.5V prohibited

V

IH

V

INH

TM

V_CC- 0.5

-

V

V_CC

2

V_CC

V

IM

V

- 0.5

+

0.5

2

V

Logic input low

Logic output low

Power down

-

0.1

0.5

0.8

V

INH

IL

-

TM

V_OL

V_PD

LED, CC, I_OL= 10mA

V_CC- 1.5

V_CC- 0.5

V_BAT

down bq2002E/G;

_BAT< V_PDmin. =

≥

V_PDmax. powers

V

normal operation.

I_CC

Supply current

-

500

µ

A

Outputs unloaded,

V_CC= 5.1V

I_SB

I_OL

I_L

Standby current

LED, CC sink

Input leakage

-

10

-

1

-

V_CC= 5.1V, V_BAT= V_PD

mA @V_OL= V_SS+ 0.8V

±

1

µ

A

INH, CC, V= V_SSto V_CC

LED, CC

I_OZ

Output leakage in

high-Z state

-5

-

Note:

All voltages relative to V_SS.

8

bq2002E/G

Impedance

Symbol

Parameter

Minimum

Typical

Maximum

Unit

R_BAT

R_TS

Battery input impedance

TS input impedance

50

-

M

Ω

M

Ω

Timing (T = 0 to +70°C; V

±10%)

CC

A

Symbol

d_FCV

Parameter

Time base variation

Start-up delay

Minimum Typical Maximum

Unit

Notes

-12

-

12

%

s

t_DLY

0.35

0.9

Starting from V_MCV< V_BAT< V_PD

Note:

Typical is at T_A= 25°C, V_CC= 5.0V.

9

bq2002E/G

(

)

8-Pin DIP PN

(

)

8-Pin PN 0.300" DIP

Inches

Millimeters

Min.

Dimension

Min.

Max.

0.180

0.040

0.022

0.065

0.013

0.380

0.325

0.280

0.370

0.110

0.150

0.040

Max.

4.57

1.02

0.56

1.65

0.33

9.65

8.26

7.11

9.40

2.79

3.81

1.02

D

A

A1

B

0.160

0.015

0.055

0.008

0.350

0.300

0.230

0.300

0.090

0.115

0.020

4.06

0.38

1.40

0.20

8.89

7.62

5.84

7.62

2.29

2.92

0.51

B1

C

E1

E

A

B1

D

E

A1

L

E1

e

C

G

L

B

S

e

G

S

8-Pin SOIC Narrow (SN)

(

)

8-Pin SN 0.150" SOIC

Inches

Millimeters

Min.

Dimension

Min.

Max.

0.070

0.010

0.020

0.010

0.200

0.160

0.055

0.245

0.035

Max.

1.78

0.25

0.51

0.25

5.08

4.06

1.40

6.22

0.89

A

A1

B

C

D

E

0.060

0.004

0.013

0.007

0.185

0.150

0.045

0.225

0.015

1.52

0.10

0.33

0.18

4.70

3.81

1.14

5.72

0.38

e

H

L

10

PACKAGE OPTION ADDENDUM

www.ti.com

7-May-2007

PACKAGING INFORMATION

Orderable Device

BQ2002EPN

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

PDIP

P

8

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

BQ2002EPNE4

BQ2002ESN

PDIP

SOIC

PDIP

SOIC

P

D

P

D

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

BQ2002ESNG4

BQ2002ESNTR

BQ2002ESNTRG4

BQ2002GPN

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

BQ2002GPNE4

BQ2002GSN

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

BQ2002GSNG4

BQ2002GSNTR

BQ2002GSNTRG4

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

7-May-2007

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

19-Mar-2008

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0 (mm)

B0 (mm)

K0 (mm)

P1

W

Pin1

Diameter Width

(mm) W1 (mm)

(mm) (mm) Quadrant

BQ2002ESNTR

BQ2002GSNTR

SOIC

D

8

2500

330.0

12.4

6.4

5.2

2.1

8.0

12.0

Q1

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

19-Mar-2008

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

BQ2002ESNTR

BQ2002GSNTR

SOIC

D

8

2500

340.5

338.1

20.6

Pack Materials-Page 2

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Products

Applications

Audio

Automotive

Broadband

Digital Control

Medical

Amplifiers

Data Converters

DSP

Clocks and Timers

Interface

amplifier.ti.com

dataconverter.ti.com

dsp.ti.com

www.ti.com/clocks

interface.ti.com

logic.ti.com

www.ti.com/audio

www.ti.com/automotive

www.ti.com/broadband

www.ti.com/digitalcontrol

www.ti.com/medical

www.ti.com/military

Logic

Military

Power Mgmt

Microcontrollers

RFID

power.ti.com

microcontroller.ti.com

www.ti-rfid.com

Optical Networking

Security

Telephony

Video & Imaging

Wireless

www.ti.com/opticalnetwork

www.ti.com/security

www.ti.com/telephony

www.ti.com/video

RF/IF and ZigBee® Solutions www.ti.com/lprf

www.ti.com/wireless

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	BQ2002EPNE4
厂家：	TEXAS INSTRUMENTS
描述：	1-CHANNEL POWER SUPPLY SUPPORT CKT, PDIP8, 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-8 光电二极管
文件：	总15页 (文件大小：263K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BQ2002EPNE4 [TI]

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