BQ24078RGTT [TI]

具有电源路径和 4.35V VBAT 的独立型单节 1.5A 线性电池充电器 | RGT | 16 | -40 to 85;
BQ24078RGTT
型号: BQ24078RGTT
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

具有电源路径和 4.35V VBAT 的独立型单节 1.5A 线性电池充电器 | RGT | 16 | -40 to 85

电池
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中文:  中文翻译
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bq24076, bq24078  
ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
bq2407x 1.5A 高电池电压锂离子电池充电器  
(具有电源路径管理 IC)  
1 特性  
3 说明  
1
完全符合 USB 充电器标准  
bq2407x 是一个集成型锂离子电池线性充电器系列,  
具有适用于空间受限型便携式 应用的系统电源路径管  
理功能。这类器件通过 USB 端口或交流适配器运行,  
最高支持 1.5A 的充电电流。它们在输入电压范围内具  
有输入电压保护功能,因此支持非稳压适配器。  
bq2407x USB 输入电流限制精度和启动序列使得这  
款器件能够符合 USB-IF 涌入电流规范。此外,输入动  
态电源管理 (VIN-DPM) 可防止因错误配置 USB 电源而  
引起的系统崩溃,并且可最大程度地提高能够从适配器  
中获得的功率。  
最大输入电流可选 100mA 500mA  
100mA 最大电流限制可确保充电符合 USB-IF  
标准  
基于输入的动态电源管理 (VIN-DPM),用于保护  
免受不良 USB 电源损害  
28V 输入额定值,具有过压保护  
集成的动态电源路径管理 (DPPM) 功能可同时独立  
进行系统供电和电池充电  
具有用于进行电流监控的输出 (ISET),可支持高达  
1.5A 的充电电流  
bq2407x 具有 动态电源路径管理 (DPPM) 功能,可在  
为系统供电的同时独立为电池充电。当输入电流限制引  
起系统输出降至 DPPM 阈值时,DPPM 电路将减少充  
电电流;因此,可在为系统负载供电时随时监测充电电  
流。这个特性减少了电池上充放电周期的数量,可实现  
充电正常终止并使得系统能够在由有缺陷或者不完整的  
电池组供电的情况下运行。  
针对墙式充电器的高达 1.5A 的可编程输入电流限  
系统输出跟踪电池电压  
带有 SYSOFF 输入的电池断开功能。  
可编程预充电和快速充电安全定时器  
反向电流、短路和热保护  
负温度系数 (NTC) 热敏电阻输入  
专有启动序列可限制浪涌电流  
器件信息(1)  
电池充电电压 VBAT  
器件型号  
bq24076  
bq24078  
封装  
封装尺寸(标称值)  
bq24076 - 4.4V(典型值)  
bq24078 - 4.35V(典型值)  
VQFN (16)  
3.00mm x 3.00mm  
状态指示 - 正在充电/充电完成,电源正常  
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附  
录。  
2 应用范围  
典型应用电路  
智能电话  
1kW  
便携式媒体播放器  
便携式导航设备  
低功耗手持设备  
便携式游戏机  
耳机  
1kW  
IN  
SYSTEM  
IN  
OUT  
10  
11  
13  
1mF  
可穿戴设备  
4.7mF  
bq24076  
bq24078  
家庭自动化  
5
8
EN2  
BAT  
VSS  
便携式医疗设备  
2
3
System  
ON/OFF  
Control  
15  
SYSOFF  
4.7mF  
PACK+  
TEMP  
1
TS  
PACK-  
1.18kW  
1.13kW  
Copyright © 2017, Texas Instruments Incorporated  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
English Data Sheet: SLUSCM1  
 
 
 
bq24076, bq24078  
ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
www.ti.com.cn  
目录  
9.3 Feature Description................................................. 13  
9.4 Device Functional Modes........................................ 24  
10 Application and Implementation........................ 26  
10.1 Application Information.......................................... 26  
10.2 Typical Application ................................................ 26  
11 Power Supply Recommendations ..................... 31  
12 Layout................................................................... 31  
12.1 Layout Guidelines ................................................. 31  
12.2 Layout Example .................................................... 32  
12.3 Thermal Considerations........................................ 33  
13 器件和文档支持 ..................................................... 34  
13.1 器件支持................................................................ 34  
13.2 相关链接................................................................ 34  
13.3 接收文档更新通知 ................................................. 34  
13.4 社区资源................................................................ 34  
13.5 ....................................................................... 34  
13.6 静电放电警告......................................................... 34  
13.7 Glossary................................................................ 34  
14 机械、封装和可订购信息....................................... 34  
1
2
3
4
5
6
7
8
特性.......................................................................... 1  
应用范围................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
说明 (续.............................................................. 3  
Device Comparison Table..................................... 3  
Pin Configuration and Functions......................... 4  
Specifications......................................................... 5  
8.1 Absolute Maximum Ratings ..................................... 5  
8.2 ESD Ratings.............................................................. 5  
8.3 Recommended Operating Conditions....................... 6  
8.4 Thermal Information.................................................. 6  
8.5 Dissipation Ratings ................................................... 6  
8.6 Electrical Characteristics........................................... 7  
8.7 Typical Characteristics.............................................. 9  
Detailed Description ............................................ 11  
9.1 Overview ................................................................. 11  
9.2 Functional Block Diagram ....................................... 12  
9
4 修订历史记录  
Changes from Original (October 2017) to Revision A  
Page  
Changed IIN Test Conditions From: TJ = 85°C To: TJ < 85°C in the Electrical Characteristics table..................................... 7  
2
版权 © 2017, Texas Instruments Incorporated  
 
bq24076, bq24078  
www.ti.com.cn  
ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
5 说明 (续)  
此外,该系列充电器可提供经稳压的系统输入,即使在电池完全放电的情况下,也可使系统在连接电源后实现瞬间  
开启。当适配器无法提供峰值系统电流时,电源路径管理架构还允许使用电池来补充系统电流,进而支持使用更小  
的适配器。  
电池充电发生于以下三个阶段:调节、恒定电流和恒定电压。在所有的充电阶段,一个内部控制环路监测 IC 结温  
并且如果超过此内部温度阈值则减少充电电流。充电器功率级和充电电流感应功能完全集成在了一起。该充电器具  
高精度电流和电压调节环路、充电状态显示和充电终止功能。输入电流限制和充电电流可使用外部电阻编程设定。  
6 Device Comparison Table  
OPTIONAL  
FUNCTION  
PART NUMBER(1) (2)  
VOVP  
VBAT(REG)  
VOUT(REG)  
VDPPM  
bq24072  
bq24073  
bq24074  
bq24075  
bq24076  
bq24078  
bq24079  
6.6 V  
6.6 V  
10.5 V  
6.6 V  
6.6 V  
6.6 V  
6.6 V  
4.2 V  
4.2 V  
4.2 V  
4.2 V  
4.4 V  
4.35 V  
4.1 V  
VBAT + 225 mV  
4.4 V  
VO(REG) – 100 mV  
VO(REG) – 100 mV  
VO(REG) – 100 mV  
4.3 V  
TD  
TD  
4.4 V  
ITERM  
SYSOFF  
SYSOFF  
SYSOFF  
SYSOFF  
5.5 V  
VBAT + 210mV  
VBAT + 210mV  
5.5 V  
VBAT +100 mV  
VBAT +100 mV  
4.3 V  
(1) For all available packages, see the orderable addendum at the end of the data sheet  
(2) This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for  
use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including  
bromine (Br) or antimony (Sb) above 0.1% of total product weight.  
Copyright © 2017, Texas Instruments Incorporated  
3
bq24076, bq24078  
ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
www.ti.com.cn  
7 Pin Configuration and Functions  
RGT Package  
16-Pin VQFN  
Top View  
TS  
BAT  
BAT  
CE  
1
12  
11  
10  
9
ILIM  
OUT  
OUT  
CHG  
2
3
4
Thermal  
Pad  
Not to scale  
Pin Functions  
PIN  
I/O  
DESCRIPTION  
NAME  
NO.  
Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the battery. Bypass  
BAT to VSS with a 4.7-μF to 47-μF ceramic capacitor.  
BAT  
2, 3  
I/O  
Charge Enable Active-Low Input. Connect CE to a high logic level to suspend charging. When CE is high, OUT is active and  
battery supplement mode is still available. Connect CE to a low logic level to enable the battery charger. CE is internally  
pulled down with approximately 285 k. Do not leave CE unconnected to ensure proper operation.  
CE  
4
9
I
Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is high impedance when  
charging is complete and when charger is disabled. Connect CHG to the desired logic voltage rail using a 1k-100kΩ  
resistor, or use with an LED for visual indication.  
CHG  
O
EN1  
EN2  
6
5
I
I
Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable USB compliance.  
See Table 2 for the description of the operation states. EN1 and EN2 are internally pulled down with 285 k. Do not leave  
EN1 or EN2 unconnected to ensure proper operation.  
Adjustable Current Limit Programming Input. Connect a 1100-to 8-kresistor from ILIM to VSS to program the maximum  
input current (EN2=1, EN1=0). The input current includes the system load and the battery charge current. Leaving ILIM  
unconnected disables all charging.  
ILIM  
12  
13  
I
I
Input Power Connection. Connect IN to the external DC supply (AC adapter or USB port). The input operating range is 4.35 V  
to 6.6 V (bq24076 and bq24078). The input can accept voltages up to 26 V without damage but operation is suspended.  
Connect bypass capacitor 1 μF to 10 μF to VSS.  
IN  
Fast Charge Current Programming Input. Connect a 590-to 8.9-kresistor from ISET to VSS to program the fast charge  
current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at ISET reflects the actual charging  
current and can be used to monitor charge current. See Charge Current Translator for more details.  
ISET  
16  
I/O  
O
O
I
System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and above the regulation  
voltage. When the input is out of the operation range, OUT is connected to VBAT except when SYSOFF is high. Connect OUT  
to the system load. Bypass OUT to VSS with a 4.7-μF to 47-μF ceramic capacitor.  
OUT  
10, 11  
7
Open-drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is detected. PGOOD is  
high-impedance when the input power is not within specified limits. Connect PGOOD to the desired logic voltage rail using a  
1-kto 100-kresistor, or use with an LED for visual indication.  
PGOOD  
SYSOFF  
System Enable Input. Connect SYSOFF high to turn off the FET connecting the battery to the system output. When an  
adapter is connected, charging is also disabled. Connect SYSOFF low for normal operation. SYSOFF is internally pulled up  
to VBAT through a large resistor (approximately 5 M). Do not leave SYSOFF unconnected to ensure proper operation.  
15  
There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device. The thermal pad  
must be connected to the same potential as the VSS pin on the printed circuit board. Do not use the thermal pad as the  
primary ground input for the device. VSS pin must be connected to ground at all times.  
Thermal  
Pad  
Timer Programming Input. TMR controls the pre-charge and fast-charge safety timers. Connect TMR to VSS to disable all  
safety timers. Connect a 18-kto 72-kresistor between TMR and VSS to program the timers a desired length. Leave TMR  
unconnected to set the timers to the default values.  
TMR  
14  
I
4
Copyright © 2017, Texas Instruments Incorporated  
 
bq24076, bq24078  
www.ti.com.cn  
ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
Pin Functions (continued)  
PIN  
I/O  
DESCRIPTION  
NAME  
NO.  
1
External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors a 10-kNTC  
thermistor. For applications that do not use the TS function, connect a 10-kfixed resistor from TS to VSS to maintain a valid  
voltage level on TS.  
TS  
I
VSS  
8
Ground. Connect to the thermal pad and to the ground rail of the circuit.  
Table 1. EN1/EN2 Settings  
EN2  
EN1  
MAXIMUM INPUT CURRENT INTO IN PIN  
100 mA. USB100 mode  
0
0
1
1
0
1
0
1
500 mA. USB500 mode  
Set by an external resistor from ILIM to VSS  
Standby (USB suspend mode)  
8 Specifications  
8.1 Absolute Maximum Ratings(1)  
over the 0°C to 125°C operating free-air temperature range (unless otherwise noted)  
MIN  
–0.3  
–0.3  
MAX  
28  
UNIT  
V
IN (with respect to VSS)  
BAT (with respect to VSS)  
5
V
VI  
Input Voltage  
Input Current  
OUT, EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM,  
TMR, ITERM, SYSOFF, TD (with respect to VSS)  
–0.3  
7
V
II  
IN  
1.6  
5
A
A
OUT  
Output Current  
(Continuous)  
IO  
BAT (Discharge mode)  
BAT (Charging mode)  
5
A
1.5(2)  
A
Output Sink Current CHG, PGOOD  
Junction temperature  
15  
mA  
°C  
°C  
TJ  
–40  
–65  
150  
150  
Tstg  
Storage temperature  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating  
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage  
values are with respect to the network ground terminal unless otherwise noted.  
(2) The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces  
charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge  
current may not be reached.  
8.2 ESD Ratings  
VALUE  
UNIT  
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)  
±1500  
V(ESD)  
Electrostatic discharge  
V
Charged-device model (CDM), per JEDEC specification JESD22-  
C101(2)  
±500  
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
Copyright © 2017, Texas Instruments Incorporated  
5
bq24076, bq24078  
ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
www.ti.com.cn  
8.3 Recommended Operating Conditions  
MIN  
4.35  
4.35  
MAX  
UNIT  
V
IN voltage range  
VI  
26  
6.4  
IN operating voltage range  
V
IIN  
Input current, IN pin  
1.5  
A
IOUT  
IBAT  
ICHG  
TJ  
Current, OUT pin  
4.5  
A
Current, BAT pin (Discharging)  
Current, BAT pin (Charging)  
Junction Temperature  
4.5  
A
1.5(1)  
125  
8000  
8900  
15  
A
–40  
1100  
590  
0
°C  
RILIM  
RISET  
RITERM  
RTMR  
Maximum input current programming resistor  
(2)  
Fast-charge current programming resistor  
Termination current programming resistor  
Timer programming resistor  
k  
kΩ  
18  
72  
(1) The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces  
charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge  
current may not be reached.  
(2) Use a 1% tolerance resistor for RISET to avoid issues with the RISET short test when using the maximum charge current setting.  
8.4 Thermal Information  
bq2407x  
THERMAL METRIC(1)  
RGT (VQFN)  
16 PIN  
44.5  
UNIT  
RθJA  
Junction-to-ambient thermal resistance  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
RθJC(top)  
RθJB  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
54.2  
17.2  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
1.0  
ψJB  
17.1  
RθJC(bot)  
3.8  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application  
report.  
8.5 Dissipation Ratings  
POWER RATING  
PACKAGE(1)  
RθJA  
RθJC  
TA 25°C  
TA = 85°C  
(2)  
RGT  
39.47°C/W  
2.4°C/W  
2.3 W  
225 mW  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
(2) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. The pad is  
connected to the ground plane by a 2 × 3 via matrix.  
6
Copyright © 2017, Texas Instruments Incorporated  
bq24076, bq24078  
www.ti.com.cn  
ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
8.6 Electrical Characteristics  
Over junction temperature range (0° TJ 125°C) and the recommended supply voltage range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
INPUT  
UVLO  
Vhys  
Undervoltage lock-out  
VIN: 0 V 4 V  
VIN: 4 V 0 V  
3.2  
3.3  
3.4  
V
Hysteresis on UVLO  
200  
300  
mV  
Input power detected when VIN > VBAT + VIN(DT)  
VBAT = 3.6 V, VIN: 3.5 V 4 V  
VIN(DT)  
Input power detection threshold  
Hysteresis on VIN(DT)  
55  
20  
80  
130  
mV  
mV  
ms  
Vhys  
VBAT = 3.6 V, VIN: 4 V 3.5 V  
Time measured from VIN: 0 V 5 V 1 μs  
rise-time to PGOOD = LO  
tDGL(PGOOD)  
Deglitch time, input power detected status  
1.2  
VOVP  
Input overvoltage protection threshold  
Hysteresis on OVP  
VIN: 5 V 7 V  
VIN: 7 V 5V  
6.4  
6.6  
110  
50  
6.8  
V
Vhys  
mV  
μs  
tDGL(OVP)  
Input overvoltage blanking time (OVP fault deglitch)  
Time measured from VIN: 11 V 5 V with 1 μs  
fall-time to PGOOD = LO  
tREC  
Input overvoltage recovery time  
1.2  
ms  
ILIM, ISET SHORT-CIRCUIT DETECTION (CHECKED DURING STARTUP)  
ISC  
Current source  
VIN > UVLO and VIN > VBAT + VIN(DT)  
VIN > UVLO and VIN > VBAT + VIN(DT)  
1.3  
mA  
mV  
VSC  
520  
QUIESCENT CURRENT  
CE = LO or HI, input power not detected,  
No load on OUT pin, TJ = 85°C  
IBAT(PDWN)  
Sleep current into BAT pin  
4.1  
7
μA  
μA  
EN1= HI, EN2=HI, VIN = 6 V, TJ < 85°C  
EN1= HI, EN2=HI, VIN = 10 V, TJ < 85°C  
39  
91  
50  
IIN  
Standby current into IN pin  
Active supply current, IN pin  
200  
CE = LO, VIN = 6 V, no load on OUT pin,  
VBAT > VBAT(REG), (EN1, EN2) (HI, HI)  
ICC  
1.5  
mA  
POWER PATH  
VDO(IN-OUT)  
VIN – VOUT  
VIN = 4.3 V, IIN = 1 A, VBAT = 4.2 V  
IOUT = 1 A, VIN = 0 V, VBAT > 3 V  
VIN > VOUT + VDO(IN-OUT), VBAT < 3.2 V  
300  
50  
475  
100  
mV  
mV  
VDO(BAT-OUT)  
VBAT – VOUT  
3.31  
3.41  
3.51  
VO(REG)  
OUT pin voltage regulation  
Maximum input current  
V
VBAT  
145mV  
+
VBAT  
210mV  
+
VBAT  
275mV  
+
VIN > VOUT + VDO(IN-OUT), VBAT 3.2 V  
EN1 = LO, EN2 = LO  
90  
95  
475  
100  
500  
mA  
A
IINmax  
EN1 = HI, EN2 = LO  
450  
EN2 = HI, EN1 = LO  
KILIM/RILIM  
1610  
ILIM = 500 mA to 1.5 A  
1500  
1330  
200  
1720  
1720  
1500  
KILIM  
Maximum input current factor  
AΩ  
ILIM = 200 mA to 500 mA  
EN2 = HI, EN1 = LO, RILIM = 8 kto 1.1 kΩ  
1525  
IINmax  
VIN-DPM  
Programmable input current limit range  
mA  
V
Input voltage threshold when input current is  
reduced  
EN2 = LO, EN1 = X  
4.35  
4.5  
4.63  
Output voltage threshold when charging current is  
reduced  
VBAT  
125mV  
+
VBAT  
100mV  
+
VBAT +  
85mV  
VDPPM  
V
V
V
OUT VBAT  
–40mV  
VBSUP1  
Enter battery supplement mode  
VBAT = 3.6 V, RILIM = 1.5 k, RLOAD = 10 Ω → 2 Ω  
VOUT  
VBAT–20mV  
VBSUP2  
VO(SC1)  
VO(SC2)  
Exit battery supplement mode  
VBAT = 3.6 V, RILIM = 1.5 k, RLOAD = 2 Ω → 10 Ω  
VIN > VUVLO and VIN > VBAT + VIN(DT)  
V
V
Output short-circuit detection threshold, power-on  
0.8  
0.9  
1
Output short-circuit detection threshold, supplement  
mode VBAT – VOUT > VO(SC2) indicates short-circuit  
VIN > VUVLO and VIN > VBAT + VIN(DT)  
200  
250  
300  
mV  
tDGL(SC2)  
tREC(SC2)  
Deglitch time, supplement mode short circuit  
Recovery time, supplement mode short circuit  
250  
60  
μs  
ms  
BATTERY CHARGER  
IBAT  
Source current for BAT pin short-circuit detection  
VBAT = 1.5 V  
4
1.6  
7.5  
1.8  
4.4  
4.35  
3
11  
2
mA  
V
VBAT(SC)  
BAT pin short-circuit detection threshold  
VBAT rising  
('76)  
4.358  
4.31  
2.9  
4.44  
4.39  
3.1  
VBAT(REG)  
Battery charge voltage  
V
('78)  
VLOWV  
Pre-charge to fast-charge transition threshold  
Deglitch time on pre-charge to fast-charge transition  
Deglitch time on fast-charge to pre-charge transition  
VIN > VUVLO and VIN > VBAT + VIN(DT)  
V
tDGL1(LOWV)  
tDGL2(LOWV)  
25  
ms  
ms  
25  
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www.ti.com.cn  
Electrical Characteristics (continued)  
Over junction temperature range (0° TJ 125°C) and the recommended supply voltage range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
VBAT(REG) > VBAT > VLOWV, VIN = 5 V CE = LO,  
EN1 = LO, EN2 = HI  
Battery fast charge current range  
100  
1500  
mA  
ICHG  
CE = LO, EN1= LO, EN2 = HI,  
Battery fast charge current  
VBAT > VLOWV, VIN = 5 V, IINmax > ICHG, no load on OUT pin,  
thermal loop and DPPM loop not active  
KISET/RISET  
A
KISET  
Fast charge current factor  
Pre-charge current  
797  
890  
KPRECHG/RISET  
88  
975  
AΩ  
A
IPRECHG  
KPRECHG  
Pre-charge current factor  
60  
118  
AΩ  
CE = LO, (EN1, EN2) (LO, LO),  
0.09×ICHG  
0.1×ICHG  
0.11×ICHG  
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and thermal  
loop not active  
Termination comparator detection threshold  
(internally set)  
ITERM  
A
CE = LO, (EN1, EN2) = (LO, LO),  
0.027×ICHG  
72  
0.033×ICHG 0.040×ICHG  
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and thermal  
loop not active  
IBIAS(ITERM)  
tDGL(TERM)  
Current for external termination-setting resistor  
Deglitch time, termination detected  
VIN > VUVLO and VIN > VBAT + VIN(DT)  
75  
25  
78  
μA  
ms  
VBAT(REG)  
–140mV  
VBAT(REG)  
–100mV  
VBAT(REG)  
–60mV  
VRCH  
Recharge detection threshold  
VIN > VUVLO and VIN > VBAT + VIN(DT)  
V
tDGL(RCH)  
tDGL(NO-IN)  
Deglitch time, recharge threshold detected  
Delay time, input power loss to OUT LDO turn-off  
62.5  
20  
ms  
ms  
VBAT = 3.6 V. Time measured from  
VIN: 5 V 3 V 1 μs fall-time  
IBAT(DET)  
tDET  
Sink current for battery detection  
Battery detection timer  
VBAT = 2.5 V  
5
7.5  
10  
mA  
ms  
BAT high or low  
250  
BATTERY CHARGING TIMERS  
tPRECHG  
tMAXCHG  
tPRECHG  
tMAXCHG  
KTMR  
Pre-charge safety timer value  
TMR = floating  
1440  
1800  
18000  
2160  
s
s
Charge safety timer value  
Pre-charge safety timer value  
Charge safety timer value  
Timer factor  
TMR = floating  
14400  
21600  
18 k< RTMR < 72 kΩ  
18 k< RTMR < 72 kΩ  
RTMR × KTMR  
10×R TMR ×KTMR  
48  
s
s
36  
60  
s/kΩ  
BATTERY-PACK NTC MONITOR(1)  
INTC  
NTC bias current  
VIN > UVLO and VIN > VBAT + VIN(DT)  
Battery charging, VTS Falling  
72  
75  
80  
μA  
mV  
mV  
mV  
mV  
ms  
V
VHOT  
High temperature trip point  
Hysteresis on high trip point  
Low temperature trip point  
Hysteresis on low trip point  
Deglitch time, pack temperature fault detection  
TS function disable threshold  
270  
300  
330  
VHYS(HOT)  
VCOLD  
Battery charging, VTS Rising from VHOT  
Battery charging, VTS Rising  
30  
2100  
2000  
2200  
VHYS(COLD)  
tDGL(TS)  
VDIS(TS)  
Battery charging, VTS Falling from VCOLD  
TS fault detected to charger disable  
TS unconnected  
300  
50  
VIN - 200mV  
THERMAL REGULATION  
TJ(REG)  
Temperature regulation limit  
125  
155  
20  
°C  
°C  
°C  
TJ(OFF)  
Thermal shutdown temperature  
Thermal shutdown hysteresis  
TJ Rising  
TJ(OFF-HYS)  
LOGIC LEVELS ON EN1, EN2, CE, SYSOFF, TD  
VIL  
VIH  
IIL  
Logic LOW input voltage  
Logic HIGH input voltage  
Input sink current  
0
0.4  
6
V
V
1.4  
VIL= 0 V  
1
μA  
μA  
IIH  
Input source current  
VIH= 1.4 V  
10  
LOGIC LEVELS ON PGOOD, CHG  
VOL Output LOW voltage  
ISINK = 5 mA  
0.4  
V
(1) These numbers set trip points of 0°C and 50°C while charging, with 3°C hysteresis on the trip points, with a Vishay Type 2 curve NTC  
with an R25 of 10 k.  
8
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www.ti.com.cn  
ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
8.7 Typical Characteristics  
VIN = 6 V, EN1=1, EN2=0, bq24078 application circuit, TA = 25°C, unless otherwise noted.  
600  
500  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
400  
300  
200  
100  
0
0.1  
0
125  
120  
125  
130  
135  
140  
145  
0
25  
100  
50  
75  
Temperature (oC)  
Junction Temperature (°C)  
IL = 1 A  
Figure 2. Dropout Voltage vs Temperature  
Figure 1. Thermal Regulation  
4.6  
4.4  
4.2  
4
120  
100  
80  
VBAT = 3 V  
3.8  
60  
40  
VBAT = 3.9 V  
3.6  
3.4  
3.2  
3
20  
0
2
3
4.5  
2.5  
3.5  
4
125  
0
50  
75  
100  
25  
VBAT - Battery Voltage (V)  
Junction Temperature (°C)  
IL = 1 A  
VIN = 5 V  
Figure 3. Dropout Voltage vs Temperature  
No Input Supply  
Figure 4. bq24078  
Output Regulation Voltage vs Battery Voltage  
4.45  
4.43  
4.40  
4.38  
4.35  
3.80  
3.78  
3.76  
3.74  
3.72  
3.70  
3.68  
3.66  
3.64  
3.62  
3.60  
4.33  
4.30  
0
50  
75  
100  
125  
25  
0
25  
50  
75  
100  
125  
Junction Temperature (°C)  
Junction Temperature (°C)  
VIN = 5 V, VBAT = 3.5 V, IL = 1 A  
VIN = 5 V, IL = 1 A  
Figure 5. bq24078  
Output Regulation Voltage vs Temperature  
Figure 6. bq24076  
Output Regulation Voltage vs Temperature  
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Typical Characteristics (continued)  
VIN = 6 V, EN1=1, EN2=0, bq24078 application circuit, TA = 25°C, unless otherwise noted.  
4.500  
6.70  
4.450  
6.65  
VI Rising  
4.400  
4.350  
6.60  
6.55  
4.300  
4.250  
4.200  
VI Falling  
6.50  
6.45  
30  
25  
10  
15  
20  
0
5
0
25  
50  
75  
100  
125  
Junction Temperature (°C)  
Junction Temperature (°C)  
6.6 V  
Figure 7. bq24076  
Figure 8. bq24076/78  
BAT Regulation Voltage vs Temperature  
Overvoltage Protection Threshold vs Temperature  
1.05  
1.03  
310  
305  
300  
295  
290  
1.01  
0.99  
0.97  
285  
280  
0.95  
3
3.6  
VBAT - Battery Voltage (V)  
3.8  
3.4  
4
4.2  
3.2  
3
3.2  
3.4  
3.6  
3.8  
4
4.2  
VBAT - Battery Voltage (V)  
RISET = 900 Ω  
RISET = 3 kΩ  
Figure 9. Fastcharge Current vs Battery Voltage  
Figure 10. Fastcharge Current vs Battery Voltage  
105  
104  
31.5  
31  
103  
102  
101  
100  
99  
30.5  
30  
98  
29.5  
97  
96  
29  
95  
28.5  
2
2.2  
2.4  
2.6  
2.8  
3
2
2.2  
2.4  
2.6  
2.8  
3
VBAT - Battery Voltage (V)  
VBAT - Battery Voltage (V)  
RISET = 900 Ω  
RISET = 3 kΩ  
Figure 11. Precharge Current vs Battery Voltage  
Figure 12. Precharge Current vs Battery Voltage  
10  
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bq24076, bq24078  
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ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
9 Detailed Description  
9.1 Overview  
The bq2407x devices are integrated Li-Ion linear chargers and system power path management devices targeted  
at space-limited portable applications. The device powers the system while simultaneously and independently  
charging the battery. This feature reduces the number of charge and discharge cycles on the battery, allows for  
proper charge termination and enables the system to run with a defective or absent battery pack. This feature  
also allows instant system turn-on even with a totally discharged battery. The input power source for charging the  
battery and running the system can be an AC adapter or a USB port. The devices feature Dynamic Power Path  
Management (DPPM), which shares the source current between the system and battery charging, and  
automatically reduces the charging current if the system load increases. When charging from a USB port, the  
input dynamic power management (VIN-DPM) circuit reduces the input current if the input voltage falls below a  
threshold, thus preventing the USB port from crashing. The power-path architecture also permits the battery to  
supplement the system current requirements when the adapter cannot deliver the peak system currents.  
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9.2 Functional Block Diagram  
250mV  
VBAT  
VO(SC1)  
OUT-SC1  
OUT-SC2  
tDGL(SC2)  
Q1  
IN  
OUT  
ISET  
EN2  
Short Detect  
225mV  
Precharge  
VIN-LOW  
2.25V  
Fastcharge  
USB100  
USB500  
TJ  
ILIM  
VREF-ILIM  
T
J(REG)  
USB-susp  
Short Detect  
VDPPM  
VOUT  
VO(REG)  
Q2  
EN2  
EN1  
VBAT(REG)  
BAT  
VBAT  
VOUT  
40mV  
CHARGEPUMP  
SYSOFF  
(bq24075  
bq24079  
bq24076  
bq24078)  
IBIAS-ITERM  
Supplement  
VLOWV  
225mV  
(’72, ’73, ’75)  
ITERM  
bq24074  
VRCH  
VBAT(SC)  
~3V  
I TERM-floating  
VIN  
INTC  
BAT-SC  
VBAT + V  
IN-DT  
tDGL(NO-IN)  
VHOT  
TS  
tDGL(TS)  
tDGL(PGOOD)  
Charge Control  
VUVLO  
VOVP  
VCOLD  
tBLK(OVP)  
VDIS(TS)  
EN1  
EN2  
USB Suspend  
TD  
(bq24072,  
bq24073)  
CE  
CHG  
Halt timers  
Reset timers  
VIPRECHG  
VICHG  
Dynamically  
Controlled  
Oscillator  
PGOOD  
VISET  
Fast-Charge  
Timer  
Timer fault  
TMR  
Pre-Charge  
Timer  
~100mV  
Timers disabled  
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9.3 Feature Description  
9.3.1 Undervoltage Lockout (UVLO)  
The bq2407x family remains in power down mode when the input voltage at the IN pin is below the undervoltage  
threshold (UVLO).  
During the power down mode the host commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1  
FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance.  
The Q2 FET that connects BAT to OUT is ON. (If SYSOFF is high, Q2 is off). During power down mode, the  
VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.  
9.3.2 Power On  
When VIN exceeds the UVLO threshold, the bq2407x powers up. While VIN is below VBAT + VIN(DT), the host  
commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1 FET connected between IN and OUT  
pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to  
OUT is ON. (If SYSOFF is high, Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for  
overload conditions on OUT.  
Once VIN rises above VBAT + VIN(DT), PGOOD is driven low to indicate the valid power status and the CE, EN1,  
and EN2 inputs are read. The device enters standby mode if (EN1 = EN2 = HI) or if an input overvoltage  
condition occurs. In standby mode, Q1 is OFF and Q2 is ON so OUT is connected to the battery input. (If  
SYSOFF is high, FET Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for overload  
conditions on OUT.  
When the input voltage at IN is within the valid range: VIN > UVLO AND VIN > VBAT + VIN(DT) AND VIN < VOVP, and  
the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) (HI, HI)] all internal  
timers and other circuit blocks are activated. The device then checks for short-circuits at the ISET and ILIM pins.  
If no short conditions exists, the device switches on the input FET Q1 with a 100mA current limit to checks for a  
short circuit at OUT. When VOUT is above VO(SC1), the FET Q1 switches to the current limit threshold set by EN1,  
EN2 and RILIM and the device enters into the normal operation. During normal operation, the system is powered  
by the input source (Q1 is regulating), and the device continuously monitors the status of CE, EN1 and EN2 as  
well as the input voltage conditions.  
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Feature Description (continued)  
PGOOD = Hi-Z  
CHG = Hi-Z  
BATTFET ON  
UVLO<VIN<VOVP  
and  
No  
VIN>VBAT+VIN(DT)  
Yes  
PGOOD = Low  
Yes  
Yes  
EN1=EN2=1  
No  
ILIM or ISET short?  
No  
Begin Startup  
IIN(MAX) 100mA  
Yes  
VOUT short?  
No  
Input Current  
Limit set by EN1  
and EN2  
No  
CE = Low  
Yes  
Begin Charging  
Figure 13. Startup Flow Diagram  
14  
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Feature Description (continued)  
9.3.3 Overvoltage Protection (OVP)  
The bq2407x accepts inputs up to 28 V without damage. Additionally, an overvoltage protection (OVP) circuit is  
implemented that shuts off the internal LDO and discontinues charging when VIN > VOVP for a period long than  
tDGL(OVP). When in OVP, the system output (OUT) is connected to the battery and PGOOD is high impedance.  
Once the OVP condition is removed, a new power on sequence starts (see Power On). The safety timers are  
reset and a new charge cycle will be indicated by the CHG output.  
9.3.4 Dynamic Power-Path Management  
The bq2407x features an OUT output that powers the external load connected to the battery. This output is  
active whenever a source is connected to IN or BAT. The following sections discuss the behavior of OUT with a  
source connected to IN to charge the battery and a battery source only.  
9.3.4.1 Input Source Connected (ADAPTER or USB)  
With a source connected, the dynamic power-path management (DPPM) circuitry of the bq2407x monitors the  
input current continuously. For the bq24076/78, OUT is regulated to 210 mV above the voltage at BAT. When the  
BAT voltage falls below 3.2 V, OUT is clamped to 3.41 V. This allows for proper startup of the system load even  
with a discharged battery. The current into IN is shared between charging the battery and powering the system  
load at OUT. The bq2407x has internal selectable current limits of 100 mA (USB100) and 500 mA (USB500) for  
charging from USB ports, as well as a resistor-programmable input current limit.  
The bq2407x is USB IF compliant for the inrush current testing. The USB specification allows up to 10 μF to be  
hard started, which establishes 50 μC as the maximum inrush charge value when exceeding 100 mA. The input  
current limit for the bq2407x prevents the input current from exceeding this limit, even with system capacitances  
greater than 10 μF. The input capacitance to the device must be selected small enough to prevent a violation  
(<10 μF), as this current is not limited. Figure 14 demonstrates the start-up of the bq2407x and compares it to  
the USB-IF specification.  
10μC  
50μC  
100 μs/div  
Figure 14. USB-IF Inrush Current Test  
The input current limit selection is controlled by the state of the EN1 and EN2 pins as shown in the EN1/EN2  
Settings table in Pin Configuration and Functions. When using the resistor-programmable current limit, the input  
current limit is set by the value of the resistor connected from the ILIM pin to VSS, and is given by the equation:  
IIN-MAX = KILIM/RILIM  
(1)  
The input current limit is adjustable up to 1.5 A. The valid resistor range is 1.1 kto 8 k.  
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Feature Description (continued)  
When the IN source is connected, priority is given to the system load. The DPPM and Battery Supplement  
modes are used to maintain the system load. Figure 16 illustrates examples of the DPPM and supplement  
modes. These modes are explained in detail in the following sections.  
9.3.4.1.1 Input DPM Mode (VIN-DPM)  
The bq2407x utilizes the VIN-DPM mode for operation from current-limited USB ports. When EN1 and EN2 are  
configured for USB100 (EN2=0, EN1=0) or USB500 (EN2=0, EN1=1) modes, the input voltage is monitored. If  
VIN falls to VIN-DPM, the input current limit is reduced to prevent the input voltage from falling further. This prevents  
the bq2407x from crashing poorly designed or incorrectly configured USB sources. Figure 15 shows the VIN-DPM  
behavior to a current limited source. In this figure, the input source has a 400-mA current limit and the device is  
in USB500 mode (EN1=1, EN2=0).  
I
OUT  
200mA/div  
Input collapses  
V
IN  
(5V)  
500mV/div  
Input regulated to V  
IN_DPM  
USB500 Current Limit  
200mA/div  
200mA/div  
I
Input current limit is  
reduced to prevent  
crashing the supply  
IN  
I
BAT  
4 ms/div  
Figure 15. VIN-DPM Waveform  
9.3.4.1.2 DPPM Mode  
When the sum of the charging and system load currents exceeds the maximum input current (programmed with  
EN1, EN2, and ILIM pins), the voltage at OUT decreases. Once the voltage on the OUT pin falls to VDPPM, the  
bq2407x enters DPPM mode. In this mode, the charging current is reduced as the OUT current increases in  
order to maintain the system output. Battery termination is disabled while in DPPM mode.  
9.3.4.1.3 Battery Supplement Mode  
While in DPPM mode, if the charging current falls to zero and the system load current increases beyond the  
programmed input current limit, the voltage at OUT reduces further. When the OUT voltage drops below the  
VBSUP1 threshold, the battery supplements the system load. The battery stops supplementing the system load  
when the voltage at OUT rises above the VBSUP2 threshold.  
During supplement mode, the battery supplement current is not regulated (BAT-FET is fully on), however there is  
a short circuit protection circuit built in. Figure 31 demonstrates supplement mode. If during battery supplement  
mode, the voltage at OUT drops VO(SC2) below the BAT voltage, the OUT output is turned off if the overload  
exists after tDGL(SC2). The short circuit recovery timer then starts counting. After tREC(SC2), OUT turns on and  
attempts to restart. If the short circuit remains, OUT is turned off and the counter restarts. Battery termination is  
disabled while in supplement mode.  
16  
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ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
Feature Description (continued)  
1200 mA  
900 mA  
400 mA  
0 mA  
900 mA  
500 mA  
0 mA  
500 mA  
0 mA  
-300 mA  
3.8 V  
3.7 V  
~3.6 V  
DPPM Loop Active  
Supplement Mode  
Figure 16. bq24076/78 DPPM and Battery Supplement Modes (VOREG = VBAT + 210 mV, VBAT = 3.6 V)  
9.3.4.2 Input Source Not Connected  
When no source is connected to the IN input, OUT is powered strictly from the battery. During this mode the  
current into OUT is not regulated, similar to Battery Supplement Mode, however the short circuit circuitry is  
active. If the OUT voltage falls below the BAT voltage by 250 mV for longer than tDGL(SC2), OUT is turned off. The  
short circuit recovery timer then starts counting. After tREC(SC2), OUT turns on and attempts to restart. If the short  
circuit remains, OUT is turned off and the counter restarts. This ON/OFF cycle continues until the overload  
condition is removed.  
9.3.5 Battery Charging  
Set CE low to initiate battery charging. First, the device checks for a short-circuit on the BAT pin by sourcing  
IBAT(SC) to the battery and monitoring the voltage. When the BAT voltage exceeds VBAT(SC), the battery charging  
continues. The battery is charged in three phases: conditioning pre-charge, constant current fast charge (current  
regulation) and a constant voltage tapering (voltage regulation). In all charge phases, an internal control loop  
monitors the IC junction temperature and reduces the charge current if an internal temperature threshold is  
exceeded.  
Figure 17 illustrates a normal Li-Ion charge cycle using the bq2407x:  
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Feature Description (continued)  
PRECHARGE  
CC FAST CHARGE  
CV TAPER  
DONE  
V
BAT(REG)  
I
O(CHG)  
Battery Current  
Battery Voltage  
V
LOWV  
CHG = Hi-z  
I
(PRECHG)  
I
(TERM)  
Figure 17. Typical Charge Cycle  
In the pre-charge phase, the battery is charged at with the pre-charge current (IPRECHG). Once the battery voltage  
crosses the VLOWV threshold, the battery is charged with the fast-charge current (ICHG). As the battery voltage  
reaches VBAT(REG), the battery is held at a constant voltage of VBAT(REG) and the charge current tapers off as the  
battery approaches full charge. When the battery current reaches ITERM, the CHG pin indicates charging done by  
going high-impedance.  
Note that termination detection is disabled whenever the charge rate is reduced because of the actions of the  
thermal loop, the DPPM loop or the VIN(LOW) loop.  
The value of the fast-charge current is set by the resistor connected from the ISET pin to VSS, and is given by  
the equation:  
ICHG = KISET/RISET  
(2)  
The charge current limit is adjustable up to 1.5 A. The valid resistor range is 590 to 5.9 k. If ICHG is  
programmed as greater than the input current limit, the battery will not charge at the rate of ICHG, but at the  
slower rate of IIN(MAX) (minus the load current on the OUT pin, if any). In this case, the charger timers will be  
proportionately slowed down.  
9.3.5.1 Charge Current Translator  
When the charger is enabled, internal circuits generate a current proportional to the charge current at the ISET  
input. The current out of ISET is 1/400 (±10%) of the charge current. This current, when applied to the external  
charge current programming resistor, RISET, generates an analog voltage that can be monitored by an external  
host to calculate the current sourced from BAT.  
VISET = ICHARGE / 400 × RISET  
(3)  
18  
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Feature Description (continued)  
Begin Charging  
Yes  
Battery short detected?  
No  
Start Precharge  
CHG = Low  
No  
tPRECHARGE  
Elapsed?  
No  
VBAT > VLOWV  
Yes  
End Charge  
Flash CHG  
Start Fastcharge  
ICHARGE set by ISET  
No  
No  
tFASTCHARGE  
Elapsed?  
IBAT < ITERM  
Yes  
End Charge  
Flash CHG  
Charge Done  
CHG = Hi-Z  
TD = Low  
(72, ’73 Only)  
No  
(’74, ’75 = YES)  
Yes  
Termination Reached  
BATTFET Off  
Wait for VBAT < VRCH  
No  
VBAT < VRCH  
Yes  
Run Battery Detection  
No  
Battery Detected?  
Yes  
Figure 18. Battery Charging Flow Diagram  
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Feature Description (continued)  
9.3.5.2 Battery Detection and Recharge  
The bq2407x automatically detects if a battery is connected or removed. Once a charge cycle is complete, the  
battery voltage is monitored. When the battery voltage falls below VRCH, the battery detection routine is run.  
During battery detection, current (IBAT(DET)) is pulled from the battery for a duration tDET to see if the voltage on  
BAT falls below VLOWV. If not, charging begins. If it does, then it indicates that the battery is missing or the  
protector is open. Next, the precharge current is applied for tDET to close the protector if possible. If VBAT < VRCH  
,
then the protector closed and charging is initiated. If VBAT > VRCH, then the battery is determined to be missing  
and the detection routine continues.  
9.3.5.3 Battery Disconnect (SYSOFF Input, bq24076, bq24078)  
The bq24076 and bq24078 feature a SYSOFF input that allows the user to turn the FET Q2 off and disconnect  
the battery from the OUT pin. This is useful for disconnecting the system load from the battery, factory  
programming where the battery is not installed or for host side impedance track fuel gauging, such as bq27500,  
where the battery open circuit voltage level must be detected before the battery charges or discharges. The  
/CHG output remains low when SYSOFF is high. Connect SYSOFF to VSS, to turn Q2 on for normal operation.  
SYSOFF is internally pulled to VBAT through ~5 Mresistor.  
9.3.5.4 Dynamic Charge Timers (TMR Input)  
The bq2407x devices contain internal safety timers for the pre-charge and fast-charge phases to prevent  
potential damage to the battery and the system. The timers begin at the start of the respective charge cycles.  
The timer values are programmed by connecting a resistor from TMR to VSS. The resistor value is calculated  
using the following equation:  
tPRECHG = KTMR × RTMR  
(4)  
(5)  
tMAXCHG = 10 × KTMR × RTMR  
Leave TMR unconnected to select the internal default timers. Disable the timers by connecting TMR to VSS.  
Reset the timers by toggling the CE pin, or by toggling EN1, EN2 pin to put the device in and out of USB  
suspend mode (EN1 = HI, EN2 = HI).  
Note that timers are suspended when the device is in thermal shutdown, and the timers are slowed proportionally  
to the charge current when the device enters thermal regulation.  
During the fast charge phase, several events increase the timer durations.  
The system load current activates the DPPM loop which reduces the available charging current  
The input current is reduced because the input voltage has fallen to VIN(LOW)  
The device has entered thermal regulation because the IC junction temperature has exceeded TJ(REG)  
During each of these events, the internal timers are slowed down proportionately to the reduction in charging  
current. For example, if the charging current is reduced by half for two minutes, the timer clock is reduced to half  
the frequency and the counter counts half as fast resulting in only one minute of "counting" time.  
If the pre charge timer expires before the battery voltage reaches VLOWV, the bq2407x indicates a fault condition.  
Additionally, if the battery current does not fall to ITERM before the fast charge timer expires, a fault is indicated.  
The CHG output flashes at approximately 2 Hz to indicate a fault condition. The fault condition is cleared by  
toggling CE or the input power, entering/ exiting USB suspend mode, or an OVP event.  
9.3.5.5 Status Indicators (PGOOD, CHG)  
The bq2407x contains two open-drain outputs that signal its status. The PGOOD output signals when a valid  
input source is connected. PGOOD is low when (VBAT + VIN(DT)) < VIN < VOVP. When the input voltage is outside  
of this range, PGOOD is high impedance.  
The charge cycle after power-up, CE going low, or exiting OVP is indicated with the CHG pin on (low - LED on),  
whereas all refresh (subsequent) charges will result in the CHG pin off (open - LED off). In addition, the CHG  
signals timer faults by flashing at approximately 2 Hz.  
20  
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Table 2. PGOOD Status Indicator  
INPUT STATE  
VIN < VUVLO  
PGOOD OUTPUT  
High-impedance  
High-impedance  
Low  
VUVLO < VIN < VBAT + VIN(DT)  
VBAT + VIN(DT) < VIN < VOVP  
VIN > VOVP  
High-impedance  
Table 3. CHG Status Indicator  
CHARGE STATE  
Charging  
CHG OUTPUT  
Low (for first charge cycle)  
Flashing at 2 Hz  
Charging suspended by thermal loop  
Safety timers expired  
Charging done  
Recharging after termination  
IC disabled or no valid input power  
Battery absent  
High-impedance  
9.3.5.6 Thermal Regulation and Thermal Shutdown  
The bq2407x contain a thermal regulation loop that monitors the die temperature. If the temperature exceeds  
TJ(REG), the device automatically reduces the charging current to prevent the die temperature from increasing  
further. In some cases, the die temperature continues to rise despite the operation of the thermal loop,  
particularly under high VIN and heavy OUT system load conditions. Under these conditions, if the die  
temperature increases to TJ(OFF), the input FET Q1 is turned OFF. FET Q2 is turned ON to ensure that the  
battery still powers the load on OUT. Once the device die temperature cools by TJ(OFF-HYS), the input FET Q1 is  
turned on and the device returns to thermal regulation. Continuous overtemperature conditions result in a  
"hiccup" mode. During thermal regulation, the safety timers are slowed down proportionately to the reduction in  
current limit.  
Note that this feature monitors the die temperature of the bq2407x. This is not synonymous with ambient  
temperature. Self heating exists due to the power dissipated in the IC because of the linear nature of the battery  
charging algorithm and the LDO associated with OUT. A modified charge cycle with the thermal loop active is  
shown in Figure 19. Battery termination is disabled during thermal regulation.  
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PRECHARGE  
THERMAL  
REGULATION  
CC FAST  
CHARGE  
CV TAPER  
DONE  
V
I
O(REG)  
O(CHG)  
Battery Voltage  
Battery Current  
V
(LOWV)  
HI-z  
I
(PRECHG)  
I
(TERM)  
T
J(REG)  
IC Junction Temperature, T  
J
Figure 19. Charge Cycle Modified by Thermal Loop  
9.3.6 Battery Pack Temperature Monitoring  
The bq2407x features an external battery pack temperature monitoring input. The TS input connects to the NTC  
thermistor in the battery pack to monitor battery temperature and prevent dangerous over-temperature  
conditions. During charging, INTC is sourced to TS and the voltage at TS is continuously monitored. If, at any  
time, the voltage at TS is outside of the operating range (VCOLD to VHOT), charging is suspended. The timers  
maintain their values but suspend counting. When the voltage measured at TS returns to within the operation  
window, charging is resumed and the timers continue counting. When charging is suspended due to a battery  
pack temperature fault, the CHG pin remains low and continues to indicate charging.  
For applications that do not require the TS monitoring function, connect a 10-kresistor from TS to VSS to set  
the TS voltage at a valid level and maintain charging.  
The allowed temperature range for 103AT-2 type thermistor is 0°C to 50°C. However, the user may increase the  
range by adding two external resistors. See Figure 20 for the circuit details. The values for Rs and Rp are  
calculated using the following equations:  
22  
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ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
æ
ö
ì
ü
ý
þ
VH ´ VC  
-(RTH + RTC ) ±  
(RTH+RTC )2 - 4 R  
´ RTC  
+
´(RTC - RTH )  
ç
÷
í
TH  
ç
÷
(VH - VC ) ´ ITS  
î
è
ø
Rs =  
2
(6)  
V ´ R + RS  
(
)
ITS ´ R + RS - V  
H
TH  
Rp =  
(
)
TH  
H
where  
RTH: Thermistor Hot Trip Value found in thermistor data sheet  
RTC: Thermistor Cold Trip Value found in thermistor data sheet  
VH: IC's Hot Trip Threshold = 0.3 V nominal  
VC: IC's Cold Trip Threshold = 2.1 V nominal  
ITS: IC's Output Current Bias = 75 µA nominal  
NTC Thermsitor Semitec 103AT-4  
(7)  
Rs and Rp 1% values were chosen closest to calculated values in Table 4.  
Table 4. Calculated Values  
COLD TEMP RESISTANCE  
HOT TEMP RESISTANCE AND  
EXTERNAL BIAS RESISTOR,  
EXTERNAL BIAS RESISTOR,  
AND TRIP THRESHOLD, Ω (°C)  
TRIP THRESHOLD, Ω (°C)  
Rs (Ω)  
Rp (Ω)  
28000 (–0.6)  
28480 (–1)  
28480 (–1)  
33890 (–5)  
33890 (–5)  
33890 (–5)  
4000 (51)  
3536 (55)  
3021 (60)  
4026 (51)  
3536 (55)  
3021 (60)  
0
487  
845000  
549000  
158000  
150000  
140000  
1000  
76.8  
576  
1100  
RHOT and RCOLD are the thermistor resistance at the desired hot and cold temperatures, respectively. The  
temperature window cannot be tightened more than using only the thermistor connected to TS, it can only be  
extended.  
INTC  
bq2407x  
RS  
PACK+  
TS  
TEMP  
+
VCOLD  
RP  
PACK-  
+
VHOT  
Copyright © 2017, Texas Instruments Incorporated  
Figure 20. Extended TS Pin Thresholds  
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9.4 Device Functional Modes  
9.4.1 Sleep Mode  
When the input is between UVLO and VIN(DT), the device enters sleep mode. After entering sleep mode for >20  
mS the internal FET connection between the IN and OUT pin is disabled and pulling the input to ground will not  
discharge the battery, other than the leakage on the BAT pin. If one has a full 1000-mAHr battery and the  
leakage is 10 μA, then it would take 1000 mAHr / 10 μA = 100000 hours (11.4 years) to discharge the battery.  
The self-discharge of the battery is typically five times higher than this.  
9.4.2 Explanation of Deglitch Times and Comparator Hysteresis  
NOTE  
Figure 21 to Figure 25 are not to scale.  
V
OVP  
V
- V  
hys(OVP)  
OVP  
V
IN  
Typical Input Voltage  
Operating Range  
t < t  
DGL(OVP)  
V
+ V  
IN(DT)  
BAT  
V
+ V  
- V  
IN(DT) hys(INDT)  
BAT  
UVLO  
UVLO - V  
hys(UVLO)  
PGOOD  
t
DGL(PGOOD)  
t
t
DGL(OVP)  
DGL(NO-IN)  
t
DGL(PGOOD)  
Figure 21. Power-Up, Power-Down, Power Good Indication  
t
V
DGL1(LOWV)  
BAT  
V
LOWV  
t < t  
t
DGL2(LOWV)  
t
t < t  
DGL1(LOWV)  
DGL1(LOWV)  
DGL2(LOWV)  
I
CHG  
Fast-Charge  
Fast-Charge  
Pre-Charge  
I
PRE-CHG  
Pre-Charge  
Figure 22. Precharge to Fast-Charge, Fast- to Pre-Charge Transition – tDGL1(LOWV), tDGL2(LOWV)  
24  
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Device Functional Modes (continued)  
V
BAT  
V
RCH  
Re-Charge  
t < t  
t
DGL(RCH)  
DGL(RCH)  
Figure 23. Recharge – tDGL(RCH)  
Turn  
Q2 OFF  
Force  
Q2 ON  
Force  
Q2 ON  
Turn  
Q2 OFF  
t
t
REC(SC2)  
REC(SC2)  
V
- V  
OUT  
BAT  
Recover  
V
O(SC2)  
t
t
t < t  
t < t  
DGL(SC2)  
DGL(SC2)  
DGL(SC2)  
DGL(SC2)  
Figure 24. OUT Short-Circuit – Supplement Mode  
V
COLD  
V
- V  
hys(COLD)  
COLD  
Suspend  
Charging  
Resume  
Charging  
t < t  
t
DGL(TS)  
DGL(TS)  
V
TS  
V
- V  
hys(HOT)  
HOT  
V
HOT  
Figure 25. Battery Pack Temperature Sensing – TS Pin. Battery Temperature Increasing  
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10 Application and Implementation  
NOTE  
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
10.1 Application Information  
The bq2407x devices power the system while simultaneously and independently charging the battery. The input  
power source for charging the battery and running the system can be an AC adapter or a USB port. The devices  
feature dynamic power-path management (DPPM), which shares the source current between the system and  
battery charging and automatically reduces the charging current if the system load increases. When charging  
from a USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current limit if the  
input voltage falls below a threshold, preventing the USB port from crashing. The power-path architecture also  
permits the battery to supplement the system current requirements when the adapter cannot deliver the peak  
system currents.  
The bq2407x is configurable to be host controlled for selecting different input current limits based on the input  
source connected, or a fully stand alone device for applications that do not support multiple types of input  
sources.  
10.2 Typical Application  
VIN = UVLO to VOVP, IFASTCHG = 800 mA, IIN(MAX) = 1.3 A, Battery Temperature Charge Range = 0°C to 50°C,  
6.25-hour Fastcharge Safety Timer  
R4  
1.5 kW  
R5  
1.5 kW  
SYSTEM  
Adaptor  
DC+  
IN  
OUT  
C2  
4.7 mF  
C1  
1 mF  
GND  
VSS  
bq24076  
bq24078  
HOST  
EN2  
EN1  
TS  
SYSOFF  
CE  
BAT  
C3  
4.7 mF  
PACK+  
TEMP  
R1  
46.4 kW  
R2  
1.18 kW  
R3  
1.13 kW  
PACK-  
Copyright © 2017, Texas Instruments Incorporated  
Figure 26. Using bq24076/bq24078 in a Host-Controlled Charger Application  
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Typical Application (continued)  
10.2.1 Design Requirements  
Supply voltage = 5 V  
Fast charge current of approximately 800 mA; ISET - pin 16  
Input current limit = 1.3 A; ILIM - pin 12  
Termination current threshold = 110 mA; ITERM – pin 15 (bq24074 only)  
Safety timer duration, Fast-Charge = 6.25 hours; TMR – pin 14  
TS – Battery Temperature Sense = 10 kNTC (103AT-2)  
10.2.2 Detailed Design Procedure  
10.2.2.1 bq2407x Charger Design Example  
See Figure 26 for a schematic of the design example.  
10.2.2.1.1 System ON/OFF (SYSOFF) (bq24076 or bq24078 only)  
Connect SYSOFF high to disconnect the battery from the system load. Connect SYSOFF low for normal  
operation  
10.2.2.2 Calculations  
10.2.2.2.1 Program the Fast Charge Current (ISET):  
RISET = KISET / ICHG  
KISET = 890 Afrom the electrical characteristics table.  
RISET = 890 A/ 0.8 A = 1.1125 kΩ  
Select the closest standard value, which for this case is 1.13 k. Connect this resistor between ISET (pin 16)  
and VSS  
.
10.2.2.2.2 Program the Input Current Limit (ILIM)  
RILIM = KILIM / II_MAX  
KILIM = 1550 Afrom the electrical characteristics table.  
RISET = 1550 A/ 1.3 A = 1.192 kΩ  
Select the closest standard value, which for this case is 1.18 k. Connect this resistor between ILIM (pin 12) and  
VSS  
.
10.2.2.2.3 Program 6.25-hour Fast-Charge Safety Timer (TMR)  
RTMR = tMAXCHG / (10 × KTMR  
)
KTMR = 48 s/kfrom the electrical characteristics table.  
RTMR = (6.25 hr × 3600 s/hr) / (10 × 48 s/k) = 46.8 kΩ  
Select the closest standard value, which for this case is 46.4 k. Connect this resistor between TMR (pin 2) and  
VSS  
.
10.2.2.3 TS Function  
Use a 10-kNTC thermistor in the battery pack (103AT-2). For applications that do not require the TS  
monitoring function, connect a 10-kresistor from TS to VSS to set the TS voltage at a valid level and maintain  
charging.  
10.2.2.4 CHG and PGOOD  
LED Status: Connect a 1.5-kresistor in series with a LED between OUT and CHG to indicate charging status.  
Connect a 1.5-kresistor in series with a LED between OUT and PGOOD to indicate when a valid input source  
is connected.  
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Typical Application (continued)  
Processor Monitoring Status: Connect a pullup resistor (on the order of 100 k) between the power rail of the  
processor and CHG and PGOOD.  
10.2.2.5 Selecting IN, OUT, and BAT Pin Capacitors  
In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin,  
input, output and battery pins. Using the values shown on the application diagram, is recommended. After  
evaluation of these voltage signals with real system operational conditions, one can determine if capacitance  
values can be adjusted toward the minimum recommended values (DC load application) or higher values for fast  
high amplitude pulsed load applications. Note if designed high input voltage sources (bad adaptors or wrong  
adaptors), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values  
so a 16-V capacitor may be adequate for a 30-V transient (verify tested rating with capacitor manufacturer).  
28  
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Typical Application (continued)  
10.2.3 Application Curves  
VIN  
5 V/div  
VCHG  
5 V/div  
Charging Initiated  
VOUT  
4.4 V  
1 A/div  
500 mV/div  
5 V/div  
VBAT  
IBAT  
3.6 V  
VPGOOD  
2 V/div  
VBAT  
Battery Inserted  
500 mA/div  
IBAT  
Battery Detection Mode  
4 ms/div  
400 ms/div  
RLOAD = 10 Ω  
Figure 27. Adapter Plug-In  
Battery Connected  
Figure 28. Battery Detection  
Battery Inserted  
VCHG  
5 V/div  
1 A/div  
IOUT  
500 mA/div  
IBAT  
IBAT  
500 mA/div  
200 mV/div  
VOUT  
4.4 V  
2 V/div  
Battery  
Removed  
VBAT  
Battery Detection Mode  
400 ms/div  
400 ms/div  
RLOAD = 20 to 9 Ω  
Figure 30. Entering and Exiting DPPM Mode  
Figure 29. Battery Detection  
Battery Removed  
1 A/div  
IOUT  
IOUT  
1 A/div  
IBAT  
500 mA/div  
IBAT  
500 mA/div  
Supplement Mode  
Supplement Mode  
VOUT  
3.81 V  
200 mV/div  
VOUT  
4.4 V  
VBAT  
3.8 V  
VBAT  
500 mV/div  
3.6 V  
Tracking to VBAT +210 mV  
1 ms/div  
1 ms/div  
RLOAD = 25 to 4.5 Ω  
RLOAD = 20 to 4.5 Ω  
Figure 31. Entering and Exiting Battery Supplement Mode  
Figure 32. Entering and Exiting Battery Supplement Mode  
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Typical Application (continued)  
VCE  
5 V/div  
10 V/div  
VIN  
VCHG  
5 V/div  
1 V/div  
VOUT  
4.4 V  
VBAT  
VBAT  
500 mV/div  
4.2 V  
3.6 V  
Mandatory Precharge  
IBAT  
IBAT  
500 mA/div  
1 A/div  
10 ms/div  
40 ms/div  
RLOAD = 10 Ω  
VIN = 6 V to 15 V  
Figure 33. Charger ON/OFF Using CE  
Figure 34. OVP Fault  
VSYSOFF  
5 V/div  
5 V/div  
VSYSOFF  
VBAT  
4 V  
VOUT  
5.5 V  
2 V/div  
VBAT  
4 V  
2 V/div  
VOUT  
Battery Powering  
System  
500 mA/div  
System Power Off  
IBAT  
IBAT  
500 mA/div  
4 ms/div  
400 ms/div  
VIN = 0 V  
VIN = 6 V  
Figure 36. System ON/OFF With Input Not Connected  
bq24076, bq24078  
Figure 35. System ON/OFF With Input Connected  
bq24076, bq24078  
30  
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ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
11 Power Supply Recommendations  
Some adapters implement a half rectifier topology, which causes the adapter output voltage to fall below the  
battery voltage during part of the cycle. To enable operation with adapters under those conditions, the bq2407x  
family keeps the charger on for at least 20 msec (typical) after the input power puts the part in sleep mode. This  
feature enables use of external adapters using 50 Hz networks. The input must not drop below the UVLO voltage  
for the charger to work properly. Thus, the battery voltage should be above the UVLO to help prevent the input  
from dropping out. Additional input capacitance may be needed.  
12 Layout  
12.1 Layout Guidelines  
To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter  
capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq2407x, with short  
trace runs to both IN, OUT and GND (thermal pad).  
All low-current GND connections should be kept separate from the high-current charge or discharge paths  
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the  
power ground path.  
The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum  
charge current in order to avoid voltage drops in these traces  
The bq2407x family is packaged in a thermally enhanced MLP package. The package includes a thermal pad  
to provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is  
also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full  
PCB design guidelines for this package are provided in QFN/SON PCB Attachment Application Note  
(SLUA271).  
Copyright © 2017, Texas Instruments Incorporated  
31  
bq24076, bq24078  
ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
www.ti.com.cn  
12.2 Layout Example  
Figure 37. Layout Schematic  
32  
Copyright © 2017, Texas Instruments Incorporated  
bq24076, bq24078  
www.ti.com.cn  
ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
12.3 Thermal Considerations  
The bq24076/78 family is packaged in a thermally enhanced MLP package. The package includes a thermal pad  
to provide an effective thermal contact between the IC and the printed circuit board (PCB). The power pad  
should be directly connected to the VSS pin. Full PCB design guidelines for this package are provided in  
QFN/SON PCB Attachment Application Note (SLUA271). The most common measure of package thermal  
performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the air surrounding the  
package surface (ambient). The mathematical expression for θJA is:  
θJA = (TJ - T) / P  
where  
TJ = chip junction temperature  
T = ambient temperature  
P = device power dissipation  
(8)  
Factors that can influence the measurement and calculation of θJA include:  
Whether or not the device is board mounted  
Trace size, composition, thickness, and geometry  
Orientation of the device (horizontal or vertical)  
Volume of the ambient air surrounding the device under test and airflow  
Whether other surfaces are in close proximity to the device being tested  
Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of  
the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack voltage  
increases to 3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes a few  
minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum voltage to  
use. This is verified, with the system and a fully discharged battery, by plotting temperature on the bottom of the  
PCB under the IC (pad should have multiple vias), the charge current and the battery voltage as a function of  
time. The fast charge current will start to taper off if the part goes into thermal regulation.  
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal  
PowerFET. It can be calculated from the following equation when a battery pack is being charged :  
P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(BAT)] × I(BAT)  
(9)  
The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is  
recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage  
and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or  
higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop  
is always active.  
版权 © 2017, Texas Instruments Incorporated  
33  
bq24076, bq24078  
ZHCSGY5A OCTOBER 2017REVISED DECEMBER 2017  
www.ti.com.cn  
13 器件和文档支持  
13.1 器件支持  
13.1.1 Third-Party Products Disclaimer  
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT  
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES  
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER  
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.  
13.2 相关链接  
下面的表格列出了快速访问链接。类别包括技术文档、支持与社区资源、工具和软件,以及申请样片或购买产品的  
快速链接。  
5. 相关链接  
器件  
产品文件夹  
请单击此处  
请单击此处  
立即订购  
请单击此处  
请单击此处  
技术文档  
请单击此处  
请单击此处  
工具和软件  
请单击此处  
请单击此处  
支持和社区  
请单击此处  
请单击此处  
bq24076  
bq24078  
13.3 接收文档更新通知  
要接收文档更新通知,请导航至 TI.com 上的器件产品文件夹。单击右上角的通知我 进行注册,即可每周接收产品  
信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。  
13.4 社区资源  
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商按照原样提供。这些内容并不构成 TI 技术规范,  
并且不一定反映 TI 的观点;请参阅 TI 《使用条款》。  
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在  
e2e.ti.com 中,您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。  
设计支持  
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。  
13.5 商标  
E2E is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
13.6 静电放电警告  
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损  
伤。  
13.7 Glossary  
SLYZ022 TI Glossary.  
This glossary lists and explains terms, acronyms, and definitions.  
14 机械、封装和可订购信息  
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知和修  
订此文档。如欲获取此产品说明书的浏览器版本,请参阅左侧的导航。  
34  
版权 © 2017, Texas Instruments Incorporated  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
BQ24076RGTR  
BQ24076RGTT  
BQ24078RGTR  
BQ24078RGTT  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
VQFN  
VQFN  
VQFN  
VQFN  
RGT  
RGT  
RGT  
RGT  
16  
16  
16  
16  
3000 RoHS & Green  
250 RoHS & Green  
3000 RoHS & Green  
250 RoHS & Green  
NIPDAU  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
B24076  
NIPDAU  
NIPDAU  
NIPDAU  
B24076  
B24078  
B24078  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Apr-2023  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
K0  
P1  
W
B0  
Reel  
Diameter  
Cavity  
A0  
A0 Dimension designed to accommodate the component width  
B0 Dimension designed to accommodate the component length  
K0 Dimension designed to accommodate the component thickness  
Overall width of the carrier tape  
W
P1 Pitch between successive cavity centers  
Reel Width (W1)  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Sprocket Holes  
Q1 Q2  
Q3 Q4  
Q1 Q2  
Q3 Q4  
User Direction of Feed  
Pocket Quadrants  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
BQ24076RGTR  
BQ24076RGTT  
BQ24078RGTR  
BQ24078RGTT  
VQFN  
VQFN  
VQFN  
VQFN  
RGT  
RGT  
RGT  
RGT  
16  
16  
16  
16  
3000  
250  
330.0  
180.0  
330.0  
180.0  
12.4  
12.5  
12.4  
12.5  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
1.1  
1.1  
1.1  
1.1  
8.0  
8.0  
8.0  
8.0  
12.0  
12.0  
12.0  
12.0  
Q2  
Q2  
Q2  
Q2  
3000  
250  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Apr-2023  
TAPE AND REEL BOX DIMENSIONS  
Width (mm)  
H
W
L
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
BQ24076RGTR  
BQ24076RGTT  
BQ24078RGTR  
BQ24078RGTT  
VQFN  
VQFN  
VQFN  
VQFN  
RGT  
RGT  
RGT  
RGT  
16  
16  
16  
16  
3000  
250  
338.0  
205.0  
338.0  
205.0  
355.0  
200.0  
355.0  
200.0  
50.0  
33.0  
50.0  
33.0  
3000  
250  
Pack Materials-Page 2  
PACKAGE OUTLINE  
RGT0016C  
VQFN - 1 mm max height  
S
C
A
L
E
3
.
6
0
0
PLASTIC QUAD FLATPACK - NO LEAD  
3.1  
2.9  
B
A
PIN 1 INDEX AREA  
3.1  
2.9  
SIDE WALL  
METAL THICKNESS  
DIM A  
OPTION 1  
0.1  
OPTION 2  
0.2  
1.0  
0.8  
C
SEATING PLANE  
0.08  
0.05  
0.00  
1.68 0.07  
(DIM A) TYP  
5
8
EXPOSED  
THERMAL PAD  
12X 0.5  
4
9
4X  
SYMM  
1.5  
1
12  
0.30  
16X  
0.18  
13  
16  
0.1  
C A B  
PIN 1 ID  
(OPTIONAL)  
SYMM  
0.05  
0.5  
0.3  
16X  
4222419/D 04/2022  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
RGT0016C  
VQFN - 1 mm max height  
PLASTIC QUAD FLATPACK - NO LEAD  
(
1.68)  
SYMM  
13  
16  
16X (0.6)  
1
12  
16X (0.24)  
SYMM  
(2.8)  
(0.58)  
TYP  
12X (0.5)  
9
4
(
0.2) TYP  
VIA  
5
(0.58) TYP  
8
(R0.05)  
ALL PAD CORNERS  
(2.8)  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE:20X  
0.07 MIN  
ALL AROUND  
0.07 MAX  
ALL AROUND  
SOLDER MASK  
OPENING  
METAL  
EXPOSED  
METAL  
EXPOSED  
METAL  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
NON SOLDER MASK  
SOLDER MASK  
DEFINED  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
4222419/D 04/2022  
NOTES: (continued)  
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature  
number SLUA271 (www.ti.com/lit/slua271).  
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown  
on this view. It is recommended that vias under paste be filled, plugged or tented.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
RGT0016C  
VQFN - 1 mm max height  
PLASTIC QUAD FLATPACK - NO LEAD  
(
1.55)  
16  
13  
16X (0.6)  
1
12  
16X (0.24)  
17  
SYMM  
(2.8)  
12X (0.5)  
9
4
METAL  
ALL AROUND  
5
8
SYMM  
(2.8)  
(R0.05) TYP  
SOLDER PASTE EXAMPLE  
BASED ON 0.125 mm THICK STENCIL  
EXPOSED PAD 17:  
85% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE  
SCALE:25X  
4222419/D 04/2022  
NOTES: (continued)  
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
www.ti.com  
重要声明和免责声明  
TI“按原样提供技术和可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,  
不保证没有瑕疵且不做出任何明示或暗示的担保,包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担  
保。  
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任:(1) 针对您的应用选择合适的 TI 产品,(2) 设计、验  
证并测试您的应用,(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。  
这些资源如有变更,恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。  
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成  
本、损失和债务,TI 对此概不负责。  
TI 提供的产品受 TI 的销售条款ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改  
TI 针对 TI 产品发布的适用的担保或担保免责声明。  
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE  
邮寄地址:Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2023,德州仪器 (TI) 公司  

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