BQ24081-Q1 [TI]
单节 1A 单芯片锂离子和锂聚合物汽车充电器;
| 型号： | BQ24081-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 单节 1A 单芯片锂离子和锂聚合物汽车充电器 |
| 文件： | 总29页 (文件大小：2797K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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bq24080-Q1, bq24081-Q1
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
bq2408x-Q1 1A 单芯片锂离子和锂聚合物汽车充电器
1 特性
3 说明
1
•
集成功率 FET 和电流传感器，适用于高达 1A 的充
bq24080-Q1 和 bq24081-Q1 是针对空间受限型充电
电 应用 由交流适配器供电
采用安全定时器实现预充电调节
充电和电源正常状态输出
器应用的高度集成且灵活的锂离子线性充电器件 。它
们在单片器件中集成了功率 FET 和电流传感器、高精
度电流和电压调节、充电状态以及充电终止功能。可通
过一个外部电阻设置充电电流幅值。
•
•
•
•
•
•
自动休眠模式，可降低功耗
集成了充电电流监视器
器件分三个阶段对电池进行充电：调节、恒流和恒压。
当达到最低电流时将终止充电。内置的充电定时器针对
充电终止提供了备用的安全性机制。如果电池电压低于
内部阈值，器件将自动重新启动充电。移除交流适配器
后，器件将自动进入休眠模式。
固定 7 小时快速充电安全定时器
非常适合空间受限型便携式应用中的单节锂离子电
池或锂聚合物电池组的低压降充电器设计
•
3mm x 3mm 小外形尺寸无引线 (SON) 封装
2 应用
器件信息(1)
•
•
•
•
汽车用线性充电器
器件型号
bq24080-Q1(2)
bq24081-Q1
封装
封装尺寸（标称值）
紧急呼叫/备用呼叫电池
车用信息娱乐系统
汽车遥控钥匙
VSON (10)
3.00mm x 3.00mm
(1) 如需了解所有可用封装，请见数据表末尾的可订购产品附录。
(2) 产品预览
简化原理图
AC
Adapter
PACK+
Battery Pack
+
VDC
C1
bq24080-Q1
IN OUT 10
C2
0.1 mF
1
0.1 µF
GND
System
PACK–
System
Interface
2
3
4
5
NC
9
8
7
6
CE
PG
STAT1
STAT2 VBSEL
VSS ISET
RSET
1.13 kW
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
English Data Sheet: SLUSCB6
bq24080-Q1, bq24081-Q1
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
www.ti.com.cn
目录
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Timing Requirements................................................ 6
6.7 Typical Characteristics.............................................. 7
Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ....................................... 10
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 14
8
9
Application and Implementation ........................ 15
8.1 Application Information............................................ 15
8.2 Typical Application ................................................. 15
Power Supply Recommendations...................... 17
10 Layout................................................................... 18
10.1 Layout Guidelines ................................................. 18
10.2 Layout Example .................................................... 18
10.3 Thermal Considerations........................................ 19
11 器件和文档支持 ..................................................... 20
11.1 器件支持................................................................ 20
11.2 文档支持................................................................ 20
11.3 相关链接................................................................ 20
11.4 接收文档更新通知 ................................................. 20
11.5 社区资源................................................................ 20
11.6 商标....................................................................... 20
11.7 静电放电警告......................................................... 20
11.8 Glossary................................................................ 20
12 机械、封装和可订购信息....................................... 20
7
4 修订历史记录
Changes from Revision A (August 2016) to Revision B
Page
•
Changed the RθJC(top) value From: 5034 °C/W To: 50.4 °C/W in the Thermal Information table ........................................... 4
Changes from Original (May 2016) to Revision A
Page
•
•
Recommended Operating Conditions, Changed The TJ MIN value From: 0 To: –40°C........................................................ 4
Electrical Characteristics, Changed the conditions statement From: 0°C ≤ TJ ≤ 125°C To: –40°C ≤ TJ ≤ 125°C ................ 5
2
Copyright © 2015–2017, Texas Instruments Incorporated
bq24080-Q1, bq24081-Q1
www.ti.com.cn
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
5 Pin Configuration and Functions
bq24080-Q1 DRC Package
10 Pin VSON
bq24081-Q1 DRC Package
10 Pin VSON
Top View
Top View
VSS STAT2 STAT1 GND
IN
1
VSS STAT2 STAT1 GND
IN
1
5
4
3
2
5
4
3
2
6
7
8
9
10
6
7
8
9
10
GND
ISET
OUT
CE
PG
GND
ISET
OUT
TS
TE
Pin Functions
PIN
NO.
I/O
DESCRIPTION
NAME
bq24080-Q1
bq24081-Q1
CE
9
2, 7
1
–
2, 7
1
I
–
I
Charge enable input (active-low)
Ground
GND
IN
Adapter dc voltage. Connect minimum 0.1-μF capacitor to VSS
.
Charge current. External resistor to VSS sets precharge and fast-charge current, and also the
termination current value. Can be used to monitor the charge current.
ISET
6
6
I
OUT
PG
10
8
10
–
O
O
O
O
I
Charge current output. Connect minimum 0.1-μF capacitor to VSS.
Power-good status output (open-drain)
STAT1
STAT2
TE
3
3
Charge status outputs (open-drain)
4
4
–
8
Timer-enable input (active-low)
TS
–
9
I/O Temperature sense; connect to NTC in battery pack.
VSS
5
5
–
Ground
There is an internal electrical connection between the exposed thermal pad and the VSS pin of the
device. The exposed thermal pad must be connected to the same potential as the VSS pin on the
printed-circuit board. Do not use the thermal pad as the primary ground input for the device. The
VSS pin must be connected to ground at all times.
Thermal pad
–
–
–
Copyright © 2015–2017, Texas Instruments Incorporated
3
bq24080-Q1, bq24081-Q1
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
bq24080-Q1, bq24081-Q1
UNIT
MIN
MAX
7
Input voltage(2)
IN, CE, ISET, OUT, PG, STAT1, STAT2, TE, TS
–0.3
V
mA
A
Output sink/source current
Output current
STAT1, STAT2, PG
OUT
15
1.5
Operating free-air temperature range, TA
Junction temperature range, TJ
Storage temperature, Tstg
°C
°C
°C
–40
–65
125
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to VSS
.
6.2 ESD Ratings
VALUE
±2000
±500
UNIT
Human-body model (HBM), per AEC Q100-002(1)
Charged-device model (CDM), per AEC Q100-011
V(ESD)
Electrostatic discharge
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
4.5
MAX
UNIT
V
VCC
TJ
Supply voltage
6.5
Operating junction temperature range
–40
125
°C
6.4 Thermal Information
bq24080-Q1,
bq24081-Q1
THERMAL METRIC(1)
UNIT
DRC (10 PINS)
RθJA
Junction-to-ambient thermal resistance
44.3
50.4
19.7
0.7
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
19.9
4.5
RθJC(bot)
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
4
Copyright © 2015–2017, Texas Instruments Incorporated
bq24080-Q1, bq24081-Q1
www.ti.com.cn
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
6.5 Electrical Characteristics
over –40°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
INPUT CURRENT
ICC(VCC) VCC current
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VCC > VCC(min)
1.2
2
2
5
mA
Sum of currents into OUT pin,
VCC < V(SLP)
ICC(SLP)
Sleep current
μA
V
ICC(STBY)
IIB(OUT)
Standby current
CE = High, 0°C ≤ TJ ≤ 85°C
150
5
Input current on OUT pin
Charge DONE, VCC > VCC(MIN)
1
VOLTAGE REGULATION VO(REG) + V(DO−MAX) ≤ VCC, I(TERM) < IO(OUT) ≤ 1 A
VO(REG)
Output voltage
4.2
TA = 25°C
−0.35%
−1%
0.35%
1%
Voltage regulation accuracy
VO(OUT) = VO(REG), IO(OUT) = 1 A
VO(REG) + V(DO)) ≤ VCC
V(DO)
Dropout voltage (V(IN) − V(OUT)
)
350
500
mV
CURRENT REGULATION
IO(OUT)
Output current range(1)
VI(OUT) > V(LOWV)
,
VI(IN) − VI(OUT) > V(DO)
,
20
1000
mA
V
VCC ≥ 4.5 V
Voltage on ISET pin, VCC ≥ 4.5 V,
VI ≥ 4.5 V, VI(OUT) > V(LOWV)
VI − VI(OUT) > V(DO)
V(SET)
Output current set voltage
Output current set factor
,
2.463
2.5
2.538
50 mA ≤ IO(OUT) ≤ 1 A
10 mA ≤ IO(OUT) < 50 mA
1 mA ≤ IO(OUT) < 10 mA
307
296
246
322
320
320
337
346
416
K(SET)
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION
Precharge to fast-charge transition
threshold
V(LOWV)
Voltage on OUT pin
2.8
2
3
3.2
V
IO(PRECHG) Precharge range(2)
V(PRECHG) Precharge set voltage
TERMINATION DETECTION
0 V < VI(OUT) < V(LOWV), t < t(PRECHG)
100
mA
Voltage on ISET pin,
VO(REG) = 4.2 V,
0 V < VI(OUT) > V(LOWV), t < t(PRECHG)
240
255
270
mV
Charge termination detection
I(TERM)
VI(OUT) > V(RCH), t < t(TRMDET)
2
100
265
mA
mV
range(3)
Voltage on ISET pin,
VO(REG) = 4.2 V,
VI(OUT) > V(RCH), t < t(TRMDET)
Charge termination detection set
V(TERM)
voltage
235
250
BATTERY RECHARGE THRESHOLD
VO(REG)
– 0.115
VO(REG)
− 0.10
VO(REG)
− 0.085
V(RCH)
Recharge threshold
V
V
STAT1, STAT2, and PG OUTPUTS
VOL
Low-level output saturation voltage
IO = 5 mA
0.25
0.4
CE and TE INPUTS
VIL
Low-level input voltage
0
1.4
–1
V
VIH
High-level input voltage
Low-level input current
High-level input current
IIL
μA
IIH
1
TIMERS
I(FAULT)
Timer fault recovery current
200
μA
(1) See Equation 2.
(2) See Equation 1.
(3) See Equation 4.
Copyright © 2015–2017, Texas Instruments Incorporated
5
bq24080-Q1, bq24081-Q1
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
www.ti.com.cn
Electrical Characteristics (continued)
over –40°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
SLEEP COMPARATOR
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
CC ≤ VI(OUT)
V(SLP)
Sleep-mode entry threshold voltage
+ 80 mV
2.3 V ≤ VI(OUT) ≤ VO(REG)
V
V
+ 190
CC ≥ VI(OUT)
V(SLPEXIT) Sleep-mode exit threshold voltage
THERMAL SHUTDOWN THRESHOLDS
T(SHTDWN) Thermal trip threshold
Thermal hysteresis
165
15
TJ increasing
°C
UNDERVOLTAGE LOCKOUT
Undervoltage lockout
Decreasing VCC
2.4
2.5
27
2.6
V
UVLO
Hysteresis
mV
TEMPERATURE SENSE COMPARATOR (bq24081-Q1)
V(TS1)
V(TS2)
I(TS)
High-voltage threshold
Low-voltage threshold
TS pin current source
2.475
0.485
96
2.5
0.5
2.525
0.515
108
V
102
μA
6.6 Timing Requirements
MIN
NOM
MAX
UNIT
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION
V
CC(MIN) ≥ 4.5 V, tFALL = 100 ns,
Deglitch time for fast-charge to
precharge transition
10-mV overdrive,
VI(OUT) decreasing below threshold
250
375
375
375
500
ms
TERMINATION DETECTION
V
CC(MIN) ≥ 4.5 V, tFALL = 100 ns
Deglitch time for termination
detection
tTRMDET
charging current decreasing below
10-mV overdrive
250
250
500
500
ms
ms
BATTERY RECHARGE THRESHOLD
VCC(MIN) ≥ 4.5 V, tFALL = 100 ns
t(DEGL)
Deglitch time for recharge detect
decreasing below or increasing
above threshold, 10-mV overdrive
TIMERS
t(PRECHG)
t(CHG)
Precharge time
Charge time
1,584
1,800
2,016
s
s
22,176
25,200
28,224
SLEEP COMPARATOR
V(IN) decreasing below threshold,
tFALL = 100 ns, 10-mV overdrive
Sleep-mode entry deglitch time
250
250
375
375
500
500
ms
ms
TEMPERATURE SENSE COMPARATOR (bq24081-Q1)
t(DEGL) Deglitch time for temperature fault
6
Copyright © 2015–2017, Texas Instruments Incorporated
bq24080-Q1, bq24081-Q1
www.ti.com.cn
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
6.7 Typical Characteristics
450
I
= 1000 mA
O(OUT)
400
350
I
I
I
= 750 mA
= 500 mA
= 250 mA
O(OUT)
O(OUT)
O(OUT)
300
250
200
150
100
50
0
0
50
100
150
T
J
- Junction Temperature - o
C
Figure 1. Dropout Voltage vs Junction Temperature
Figure 2. VIN Hot-Plug Power-Up Sequence
Figure 4. Battery Hot-Plug During Charging Phase
Figure 3. Charge Enable Power-Up Sequence
(CE = High-to-Low)
No battery – In termination deglitch prior to STAT1 going high. VOUT (VBAT) cycling between charge and done prior to screen capture
Stat1 goes high – In done state
2-V battery is inserted during the charge done state.
Charging is initiated – STAT1 goes low and charge current is applied.
Battery is removed – VOUT goes into regulation, IOUT goes to zero, and termination deglitch timer starts running (same as state 1).
Deglitch timer expires – charge done is declared.
Figure 5. Battery Hot-Plug and Removal Power Sequence
Copyright © 2015–2017, Texas Instruments Incorporated
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bq24080-Q1, bq24081-Q1
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
www.ti.com.cn
7 Detailed Description
7.1 Overview
The device supports a precision Li-Ion, Li-Pol charging system suitable for single cells. Figure 6 shows a typical
charge profile, and Figure 7 shows an operational flow chart.
Preconditioning
Phase
Current Regulation Phase
Voltage Regulation and Charge Termination Phase
Regulation
Voltage
Regulation
Current
Charge
Voltage
Minimum
Charge
Voltage
Charge
Complete
Charge
Current
Pre-
Conditioning
and Term
Detect
Safety Timer
M0066-01
Figure 6. Typical Charging Profile
8
Copyright © 2015–2017, Texas Instruments Incorporated
bq24080-Q1, bq24081-Q1
www.ti.com.cn
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
Overview (continued)
POR
SLEEP MODE
VCC > VI(OUT)
No
checked at all
times?
Indicate SLEEP
MODE
Yes
Regulate
IO(PRECHG)
Reset and Start
t(PRECHG) Timer
VI(OUT)<V(LOWV)
?
es
Y
and
Indicate Charge-
In-Progress
No
Reset All Timers,
Start t(CHG) Timer
Regulate Current
or Voltage
and
Indicate Charge-
In-Progress
No
VI(OUT)<V(LOWV)
?
Yes
Yes
t(PRECHG)
Expired?
t(CHG) Expired?
No
No
Yes
Yes
Fault Condition
Indicate Fault
Yes
VI(OUT)<V(LOWV)
?
No
Yes
VI(OUT) >V(RCH)
?
Iterm
No
Detection
?
No
Yes
Enable I(FAULT)
Current
Turn Off Charge
Indicate DONE
VI(OUT) >V(RCH)
?
No
Yes
VI(OUT) <V(RCH)
?
No
Disable I(FAULT)
Current
Yes
F0018-01
Figure 7. Operational Flow Chart
Copyright © 2015–2017, Texas Instruments Incorporated
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ZHCSDP2B –MAY 2015–REVISED JUNE 2017
www.ti.com.cn
7.2 Functional Block Diagram
(3)
IN
OUT
ISET
V(PRECHG)
VO(REG)
V(SET)
V(RCH)
V(LOWV)
(3)
(3)
(3)
V(TERM)
V(IN)
ITS
(3)
VI(OUT) + V(SLP)
V(TS1)
TS(2)
V(UVLO)
(3)
Charge
Control,
Timers,
and
Status
V(TS2)
STAT1
CE(1)
STAT2
PG(1)
TE(2)
VSS
Copyright © 2016, Texas Instruments Incorporated
(1) bq24080-Q1 only
(2) bq24081-Q1 only
(3) Signal deglitched
10
Copyright © 2015–2017, Texas Instruments Incorporated
bq24080-Q1, bq24081-Q1
www.ti.com.cn
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
7.3 Feature Description
7.3.1 Battery Preconditioning
During a charge cycle, if the battery voltage is below the V(LOWV) threshold, the device applies a precharge
current, IO(PRECHG), to the battery. This feature revives deeply discharged cells. Resistor RSET, connected
between the ISET and VSS, determines the precharge rate. The V(PRECHG) and K(SET) parameters are specified in
the Electrical Characteristics table.
K(SET) x V(PRECHG)
IO(PRECHG)
=
RSET
(1)
The device activates a safety timer, t(PRECHG), during the conditioning phase. If the V(LOWV) threshold is not
reached within the timer period, the device turns off the charger and enunciates FAULT on the STATx pins. See
the Timer Fault and Recovery section for additional details.
7.3.2 Battery Fast-Charge Constant Current
The device offers on-chip current regulation with programmable set point. Resistor RSET, connected between the
ISET and VSS, determines the charge rate. The V(SET) and K(SET) parameters are specified in the specifications
table.
K(SET) x V(SET)
I
=
O(OUT)
RSET
(2)
7.3.3 Charge-Current Monitor
When the charge function is enabled internal circuits generate a current proportional to the charge current at the
ISET pin. This current, when applied to the external charge current programming resistor RISET generates an
analog voltage that can be monitored by an external host to calculate the current sourced from the OUT pin.
R
(ISET)
V = I x
(ISET) (OUT)
K
(ISET)
(3)
7.3.4 Battery Fast-Charge Voltage Regulation
The voltage regulation feedback is through the OUT pin. This input is tied directly to the positive side of the
battery pack. The device monitors the battery-pack voltage between the OUT and VSS pins. When the battery
voltage rises to the VO(REG) threshold, the voltage regulation phase begins and the charging current begins to
taper down.
As a safety backup, the device also monitors the charge time in the charge mode. If charge is not terminated
within this time period, t(CHG), the charger is turned off and FAULT is set on the STATx pins. See the Timer Fault
and Recovery section for additional details.
7.3.5 Charge Termination Detection and Recharge
The device monitors the charging current during the voltage regulation phase. Once the termination threshold,
I(TERM), is detected, charge is terminated. The V(TERM) and K(SET) parameters are specified in the Electrical
Characteristics table.
K(SET) x V(TERM)
IO(TERM)
=
RSET
(4)
After charge termination, the device restarts the charge once the voltage on the OUT pin falls below the V(RCH)
threshold. This feature keeps the battery at full capacity at all times.
The device monitors the charging current during the voltage regulation phase. Once the termination threshold,
I(TERM), is detected, the charge is terminated immediately.
Resistor RSET, connected between the ISET and VSS, determines the current level at the termination threshold.
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ZHCSDP2B –MAY 2015–REVISED JUNE 2017
www.ti.com.cn
Feature Description (continued)
7.3.6 Charge Status Outputs
The open-drain STAT1 and STAT2 outputs indicate various charger operations as shown in Table 1. These
status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates the open-
drain transistor is turned off.
Table 1. Status Pin Summary
CHANGE STATE
Precharge in progress
Fast charge in progress
Charge done
STAT1
ON
STAT2
ON
ON
OFF
ON
OFF
Charge suspend (temperature)
Timer fault
OFF
OFF
Sleep mode
7.3.7 PG Output (bq24080-Q1)
The open-drain power-good (PG) output pulls low when a valid input voltage is present. This output is turned off
(high-impedance) in sleep mode. The PG pin can be used to drive an LED or communicate to the host
processor.
7.3.8 Charge-Enabled (CE) Input (bq24080-Q1)
The CE digital input is used to disable or enable the charge process. A low-level signal on this pin enables the
charge and a high-level signal disables the charge and places the device in a low-power mode. A high-to-low
transition on this pin also resets all timers and timer fault conditions.
7.3.9 Timer Enabled (TE) Input (bq24081-Q1)
The TE digital input is used to disable or enable the fast-charge timer. A low-level signal on this pin enables the
fast-charge timer, and a high-level signal disables this feature.
7.3.10 Temperature Qualification (bq24081-Q1)
The bq24081-Q1 continuously monitors battery temperature by measuring the voltage between the TS and VSS
pins. An internal current source provides the bias for common 10-kΩ negative-temperature-coefficient thermistors
(NTC) (see the functional block diagram). The device compares the voltage on the TS pin with the internal V(TS1)
and V(TS2) thresholds to determine if charging is allowed. If a temperature outside the V(TS1) and V(TS2) thresholds
is detected, the device immediately suspends the charge by turning off the power FET and holding the timer
value (i.e., timers are not reset). Charge is resumed when the temperature returns within the normal range.
The allowed temperature range with a 103AT-type thermistor is 0°C to 45°C. However, the user may modify
these thresholds by adding external resistors (see Figure 8 and Figure 9).
12
Copyright © 2015–2017, Texas Instruments Incorporated
bq24080-Q1, bq24081-Q1
www.ti.com.cn
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
bq24081-Q1
ITS
VHTF
PACK+
TS
NTC
VLTF
PACK–
Copyright © 2016, Texas Instruments Incorporated
Figure 8. Default Temperature Thresholds
bq24081-Q1
ITS
VHTF
PACK+
RT1
TS
NTC
RT2
VLTF
PACK–
Copyright © 2016, Texas Instruments Incorporated
Figure 9. Temperature Thresholds Modified by External Resistors
Copyright © 2015–2017, Texas Instruments Incorporated
13
bq24080-Q1, bq24081-Q1
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
www.ti.com.cn
7.3.11 Timer Fault and Recovery
As shown in Figure 7, the device provides a recovery method to deal with timer fault conditions. The following
summarizes this method:
7.3.11.1 Condition Number 1
OUT pin voltage is above the recharge threshold (V(RCH)), and a timeout fault occurs.
Recovery method: the device waits for the OUT pin voltage to fall below the recharge threshold. This could
happen as a result of a load on the battery, self-discharge, or battery removal. Once the OUT pin voltage falls
below the recharge threshold, the device clears the fault and starts a new charge cycle. A POR, TE, or CE toggle
also clears the fault.
7.3.11.2 Condition Number 2
OUT pin voltage is below the recharge threshold (V(RCH)), and a timeout fault occurs
Recovery method: Under this scenario, the device applies the I(FAULT) current. This small current is used to detect
a battery removal condition and remains on as long as the battery voltage stays below the recharge threshold. If
the OUT pin voltage goes above the recharge threshold, then the device disables the I(FAULT) current and
executes the recovery method described for condition number 1. Once the OUT pin voltage falls below the
recharge threshold, the bq24080-Q1 clears the fault and starts a new charge cycle. A POR, TE, or CE toggle
also clears the fault.
7.4 Device Functional Modes
7.4.1 Sleep Mode
The device enters the low-power sleep mode if the input power (IN) is removed from the circuit. This feature
prevents draining the battery during the absence of input supply.
14
Copyright © 2015–2017, Texas Instruments Incorporated
bq24080-Q1, bq24081-Q1
www.ti.com.cn
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The bq2408X-Q1 device is Lithium chemistry (Lithium Ion and Lithium Polymer) charger that is intended for
automotive applications. The allows the designer to pick an automotive qualified charger for applications where
the Li chemistry is needed. Such applications may involve E-Call (back up safety call) or infotainment systems
within the automotive space. The device comes completely ready with an integrated charge current monitor and
safety timers. The LDO based charger design allows for a cost optimized safe charging algorithm.
8.2 Typical Application
1.5 kW
SOURCE
bq24080-Q1
INPUT
PACK+
VDC
GND
1
IN
OUT 10
C1
C2
+
0.1 mF
0.1 mF
1.5 kW
PACK–
9
CE
2
GND
1.5 kW
3
4
5
STAT1
STAT2
VSS
8
7
6
PG
GND
ISET
Charge Current
Translator Output
1.13 kW
RSET
Copyright © 2016, Texas Instruments Incorporated
Figure 10. Typical Application Circuit
8.2.1 Design Requirements
For this design example, use the parameters shown in Table 2.
Table 2. Design Parameters
PARAMETER
Supply voltage
VALUE
5 V
Fast-charge current
≈ 750 mA
Battery-Temperature sense (bq24081-Q1)
–2°C to 44.5°C (default setting)
Copyright © 2015–2017, Texas Instruments Incorporated
15
bq24080-Q1, bq24081-Q1
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
www.ti.com.cn
8.2.2 Detailed Design Procedure
8.2.2.1 Calculations
Program the charge current for 750 mA:
RISET = [V(SET) × K(SET) / I(OUT)
]
(5)
(6)
From Electrical Characteristics table, V(SET) = 2.5 V.
From Electrical Characteristics table, K(SET) = 322.
RISET = [2.5 V × 322 / 0.75 A] = 1.073 kΩ
Selecting the closest standard value, use a 1.07-kΩ resistor connected between ISET (pin 6) and ground.
8.2.2.2 Battery Temperature Sense (bq24081-Q1):
Use a Semitec 103AT-4 NTC thermistor connected between TS (pin 9) and ground.
RTHERM-cold = [V(TS1) / I(TS) ] = 2.5V / 100 μA = 25 kΩ
(7)
(8)
RTHERM-hot = [V(TS2) / I(TS) ] = 0.5V / 100 μA = 5 kΩ
Look up the corresponding temperature value in the manufacturer's resistance-temperature table for the
thermistor selected. For a 103AT-4 Semitec thermistor:
5 kΩ = 44.5°C
25 kΩ = 2°C
8.2.2.3 STAT Pins (All Devices) and PG Pin (bq24080-Q1):
Status pins Monitored by Processor:
Select a pullup resistor that can source more than the input bias (leakage) current of both the processor and
status pins and still provide a logic high.
RPULLUP ≤ [V(cc-pullup) – V(logic hi-min) / (I(µP-monitor) + I(STAT-OpenDrain)) ] = (3.3 V – 1.9 V) / (1 μA + 1 μA) ≤ 700 kΩ;
(9)
Connect a 100-kΩ pullup between each status pin and the VCC of the processor. Connect each status pin to
a μP monitor pin.
Status viewed by LED:
Select an LED with a current rating less than 10 mA and select a resistor to place in series with the LED to
limit the current to the desired current value (brightness).
RLED = [(V(IN) – V(LED-on)) / I(LED)] = (5 V – 2 V) / 1.5 mA = 2 kΩ.
(10)
Place an LED and resistor in series between the input and each status pin.
8.2.2.4 Selecting Input and Output Capacitors
In most applications, all that is needed is a high-frequency decoupling capacitor on the input power pin. A 0.1-μF
ceramic capacitor, placed in close proximity to the IN pin and GND pad works well. In some applications, it may
be necessary to protect against a hot plug input voltage overshoot. This is done in three ways:
1. The best way is to add an input zener, 6.2 V, between the IN pin and VSS
.
2. A low-power zener is adequate for the single event transient. Increasing the input capacitance lowers the characteristic
impedance which makes the input resistance move effective at damping the overshoot, but risks damaging the input
contacts by the high inrush current.
3. Placing a resistor in series with the input dampens the overshoot, but causes excess power dissipation.
The device only requires a small capacitor for loop stability. A 0.1-μF ceramic capacitor placed between the OUT
and GND pad is typically sufficient.
16
Copyright © 2015–2017, Texas Instruments Incorporated
bq24080-Q1, bq24081-Q1
www.ti.com.cn
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
8.2.3 Application Curves
No battery – In termination deglitch prior to STAT1 going high.
VOUT (VBAT) cycling between charge and done prior to screen
capture
Stat1 goes high – In done state
2-V battery is inserted during the charge done state.
Charging is initiated – STAT1 goes low and charge current is
applied.
Battery is removed – VOUT goes into regulation, IOUT goes to
zero, and termination deglitch timer starts running (same as
state 1).
Deglitch timer expires – charge done is declared.
Figure 12. Battery Hot-Plug and Removal Power Sequence
Figure 11. Charge Enable Power-Up Sequence
(CE = High-to-Low)
9 Power Supply Recommendations
The devices are intended to operate withing the ranges shown in Recommended Operating Conditions. Because
the input of the device on pin IN is subject to a power source that is external, care muse be taken to not exercise
the pin above the Absolute Maximum Rating of the Pin shown in the Absolute Maximum Ratings table.
Copyright © 2015–2017, Texas Instruments Incorporated
17
bq24080-Q1, bq24081-Q1
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
www.ti.com.cn
10 Layout
10.1 Layout Guidelines
It is important to pay special attention to the PCB layout. The following provides some guidelines:
•
To obtain optimal performance, the decoupling capacitor from VCC to V(IN) and the output filter capacitors from
OUT to VSS should be placed as close as possible to the device, with short trace runs to both signal and VSS
pins. The VSS pin should have short trace runs to the GND pin.
•
All low-current VSS connections should be kept separate from the high-current charge or discharge paths from
the battery. Use a single-point ground technique incorporating both the small-signal ground path and the
power ground path.
•
•
The high-current charge paths into IN and from the OUT pins must be sized appropriately for the maximum
charge current in order to avoid voltage drops in these traces.
The device is packaged in a thermally enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the device and the printed circuit board (PCB). Full PCB design
guidelines for this package are provided in the application report entitled, QFN/SON PCB Attachment
(TI Literature Number SLUA271).
10.2 Layout Example
5evice Ü1 Db5 ꢀad
Cor thermal improvement
ꢀlace ëL! to Db5 plane if the plane is on a different layer
[ow resistance path for
current flow
[ow resistance path for
current flow
5evice Ü1 ꢁq24080-ꢂ1, ꢁq24081-ꢂ1
Lnput /apacitor /1
/lose to Ü1 pin Lb
ꢃutput /apacitor /2
ꢄesistor ꢄ3 to set L{9Ç
Figure 13. Board Layout
18
Copyright © 2015–2017, Texas Instruments Incorporated
bq24080-Q1, bq24081-Q1
www.ti.com.cn
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
10.3 Thermal Considerations
The bq24080-Q1 and bq24081-Q1 are packaged in a thermally enhanced MLP package. The package includes
a thermal pad to provide an effective thermal contact between the device and the printed-circuit board (PCB).
Full PCB design guidelines for this package are provided in the application report entitled, QFN/SON PCB
Attachment (TI Literature Number SLUA271).
The most common measure of package thermal performance is thermal impedance (RθJA) measured (or
modeled) from the device junction to the air surrounding the package surface (ambient). The mathematical
expression for RθJA is:
TJ - TA
=
RqJA
P
(11)
Where:
•
•
•
TJ = device junction temperature
TA = ambient temperature
P = device power dissipation
Factors that can greatly influence the measurement and calculation of RθJA include:
•
•
•
•
•
•
•
Orientation of the device (horizontal or vertical)
Volume of the ambient air surrounding the device under test and airflow
Whether other surfaces are in close proximity to the device being tested
Use multiple 10–13 mil vias in the PowerPAD™ to copper ground plane.
Avoid cutting the ground plane with a signal trace near the power IC.
The PCB must be sized to have adequate surface area for heat dissipation.
FR4 (figerglass) thickness should be minimized.
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal Power
FET. It can be calculated from the following equation:
P = (V(IN) - V(OUT)) x IO(OUT)
(12)
Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning of
the charge cycle when the battery voltage is at its lowest. See Figure 6.
版权 © 2015–2017, Texas Instruments Incorporated
19
bq24080-Q1, bq24081-Q1
ZHCSDP2B –MAY 2015–REVISED JUNE 2017
www.ti.com.cn
11 器件和文档支持
11.1 器件支持
11.2 文档支持
《QFN/SON PCB 连接》（文献编号：SLUA271）。
11.3 相关链接
下面的表格列出了快速访问链接。类别包括技术文档、支持与社区资源、工具和软件，以及申请样片或购买产品的
快速链接。
表 3. 相关链接
器件
产品文件夹
请单击此处
请单击此处
样片与购买
请单击此处
请单击此处
技术文档
请单击此处
请单击此处
工具和软件
请单击此处
请单击此处
支持和社区
请单击此处
请单击此处
bq24080-Q1
bq24081-Q1
11.4 接收文档更新通知
要接收文档更新通知，请导航至 TI.com 上的器件产品文件夹。点击右上角的提醒我 (Alert me) 注册后，即可每周
定期收到已更改的产品信息。有关更改的详细信息，请查看任意已修订文档中包含的修订历史记录。
11.5 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
11.6 商标
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
11.7 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
11.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页面包括机械、封装和可订购信息。这些信息是指定器件的最新可用数据。这些数据发生变化时，我们可能不
会另行通知或修订此文档。如欲获取此产品说明书的浏览器版本，请参见左侧的导航栏。
20
版权 © 2015–2017, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
BQ24081QDRCRQ1
BQ24081QDRCTQ1
ACTIVE
VSON
VSON
DRC
DRC
10
10
3000 RoHS & Green
250 TBD
NIPDAU
Level-3-260C-168 HR
Call TI
-40 to 125
-40 to 125
ZACQ
PREVIEW
Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2021
OTHER QUALIFIED VERSIONS OF BQ24081-Q1 :
Catalog : BQ24081
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BQ24081QDRCRQ1
VSON
DRC
10
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
*All dimensions are nominal
Device
Package Type Package Drawing Pins
VSON DRC 10
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
BQ24081QDRCRQ1
3000
Pack Materials-Page 2
GENERIC PACKAGE VIEW
DRC 10
3 x 3, 0.5 mm pitch
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4226193/A
www.ti.com
PACKAGE OUTLINE
DRC0010J
VSON - 1 mm max height
SCALE 4.000
PLASTIC SMALL OUTLINE - NO LEAD
3.1
2.9
B
A
PIN 1 INDEX AREA
3.1
2.9
1.0
0.8
C
SEATING PLANE
0.08 C
0.05
0.00
1.65 0.1
2X (0.5)
(0.2) TYP
EXPOSED
THERMAL PAD
4X (0.25)
5
6
2X
2
11
SYMM
2.4 0.1
10
1
8X 0.5
0.30
0.18
10X
SYMM
PIN 1 ID
0.1
C A B
C
(OPTIONAL)
0.05
0.5
0.3
10X
4218878/B 07/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DRC0010J
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(1.65)
(0.5)
10X (0.6)
1
10
10X (0.24)
11
(2.4)
(3.4)
SYMM
(0.95)
8X (0.5)
6
5
(R0.05) TYP
(
0.2) VIA
TYP
(0.25)
(0.575)
SYMM
(2.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
EXPOSED METAL
EXPOSED METAL
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
SOLDER MASK
DEFINED
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4218878/B 07/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
DRC0010J
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
2X (1.5)
(0.5)
SYMM
EXPOSED METAL
TYP
11
10X (0.6)
1
10
(1.53)
10X (0.24)
2X
(1.06)
SYMM
(0.63)
8X (0.5)
6
5
(R0.05) TYP
4X (0.34)
4X (0.25)
(2.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 11:
80% PRINTED SOLDER COVERAGE BY AREA
SCALE:25X
4218878/B 07/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137
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SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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