BQ24109 [TI]

SYNCHRONOUS SWITCHMODE, LI-ION AND LI-POLYMER CHARGE-MANAGEMENT IC WITH INTEGRATED POWER FETs (bqSWITCHER⑩); 同步开关模式,锂离子和锂聚合物充电管理,集成功率FET的IC ( bqSWITCHER ™ )
BQ24109
型号: BQ24109
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

SYNCHRONOUS SWITCHMODE, LI-ION AND LI-POLYMER CHARGE-MANAGEMENT IC WITH INTEGRATED POWER FETs (bqSWITCHER⑩)
同步开关模式,锂离子和锂聚合物充电管理,集成功率FET的IC ( bqSWITCHER ™ )

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bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
SYNCHRONOUS SWITCHMODE, LI-ION AND LI-POL CHARGE MANAGEMENT  
IC WITH INTEGRATED POWERFETS (bqSWITCHERE)  
FEATURES  
DESCRIPTION  
D
Ideal For High-Efficient Charger Designs For  
Single-, Two- or Three-Cell Li-Ion and Li-Pol  
Battery Packs  
The bqSWITCHERseries are highly integrated  
Li-ion and Li-polymer switch-mode charge  
management devices targeted at a wide range of  
portable applications. The bqSWITCHERseries  
offers integrated synchronous PWM controller  
and power FETs, high-accuracy current and  
voltage regulation, charge preconditioning,  
charge status, and charge termination, in a small,  
thermally enhanced QFN package. The  
system-controlled version provides additional  
inputs for full charge management under system  
control.  
D
Integrated Synchronous Fixed-Frequency  
PWM Controller Operating at 1.1 MHz with 0  
to 100% Duty Cycle  
D
D
D
Integrated PowerFETs For Up To 2-A Charge  
Rate  
High-Accuracy Voltage and Current  
Regulation  
Available In Both Stand-Alone (Built-In  
Charge Management and Control) and  
System-Controlled (Under System  
Command) Versions  
The bqSWITCHER charges the battery in three  
phases: conditioning, constant current, and  
constant voltage. Charge is terminated based on  
D
D
Status Outputs For LED or Host Processor  
Interface Indicates Charge-In-Progress,  
Charge Completion, Fault, and AC-Adapter  
Present Conditions  
user-selectable minimum current level.  
programmable charge timer provides a safety  
backup for charge termination. The  
A
bqSWITCHER automatically re-starts the charge  
cycle if the battery voltage falls below an internal  
threshold. The bqSWITCHER automatically  
20-V Maximum Voltage Rating on IN and OUT  
Pins  
D
D
D
D
High-Side Current Sensing  
enters sleep mode when V supply is removed.  
CC  
Optional Battery Temperature Monitoring  
APPLICATIONS  
Automatic Sleep Mode for Low Power  
Consumption  
D
D
D
D
Handheld Products  
System-Controlled Version Can Be Used In  
NiMH and NiCd Applications  
Portable Media Players  
Industrial and Medical Equipment  
Portable Equipment  
D
Uses Ceramic Capacitors  
D
Reverse Leakage Protection Prevents  
Battery Drainage  
D
D
Thermal Shutdown and Protection  
Built-In Battery Detection  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
bqSWITCHERand PowerPADare trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
Copyright © 2004, Texas Instruments Incorporated  
1
www.ti.com  
bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates. PowerPAD should act as the star ground between  
PGND and VSS. See Layout section for more details.  
TYPICAL SINGLE CELL Li-ION STAND-ALONE CHARGER  
L
OUT  
bq24100RHL  
IN OUT  
10 µH  
R
(SNS)  
V
IN  
3
4
6
2
1
10 µF  
C
OUT  
IN  
OUT 20  
10 µF  
VCC  
PGND 17  
STAT1 PGND 18  
PACK+  
19 STAT2  
SNS 15  
BAT 14  
+
VTSB  
PG  
5
7
PACK  
R
R
(ISET1)  
0.1 µF  
TTC  
ISET1  
ISET2  
8
9
C
(ISET2)  
TTC  
16 CE  
R
T1  
10 VSS  
PWR PAD  
TS 12  
TEMP  
VTSB 11  
BATTERY  
PACK  
R
T2  
V
IN  
V
IN  
V
IN  
D1  
Adapter  
Present  
D3  
Charge  
D2  
Done  
UDG04033  
ORDERING INFORMATION  
(1)(2)  
T
CHARGE REGULATION VOLTAGE (V)  
INTENDED APPLICATION PART NUMBER  
MARKINGS  
CIA  
J
4.2  
Stand-alone  
Stand-alone  
bq24100RHLR  
1 or 2 cells selectable (CELLS pin 4.2 or 8.4 V)  
Externally programmable (2.1 to 15.5 V)  
4.2 (Blinking status pins)  
bq24103RHLR  
bq24105RHLR  
bq24108RHLR  
bq24113RHLR  
bq24115RHLR  
CID  
40°C to 125°C  
Stand-alone  
CIF  
Stand-alone  
CIU  
1 or 2 cells selectable (CELLS pin 4.2 or 8.4 V)  
Externally programmable (2.1 to 15.5 V)  
System-controlled  
System-controlled  
CIJ  
CIL  
(1)  
(2)  
The RHL package is available taped and reeled only. Quantities are 3,000 devices per reel.  
This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for use  
in specified lead-free soldering processes.  
2
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bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
PACKAGE DISSIPATION RATINGS  
T
< 40°C  
DERATING FACTOR  
A
PACKAGE  
θ
JA  
POWER RATING  
ABOVE T = 40°C  
A
(1)  
RHL  
46.87 °C/W  
1.81 W  
0.021 W/°C  
(1)  
This data is based on using the JEDEC High-K board, and the exposed die pad is connected to a copper pad on the board. This is connected  
to the ground plane by a 2x3 via matrix.  
ABSOLUTE MAXIMUM RATINGS(1)  
UNIT  
Supply voltage range, (with respect to V  
)
IN, VCC  
20  
0.3 to 20  
0.7 to 20  
7
SS  
STAT1, STAT2, PG, CE, CELLS, SNS, BAT  
OUT  
CMODE, TS, TTC  
VTSB  
Input voltage range, (with respect to V and PGND)  
SS  
V
3.6  
ISET1, ISET2  
3.3  
Voltage difference between SNS and BAT inputs  
1
(V  
SNS  
V  
)
BAT  
Output sink  
Output current (average)  
Operating freeair temperature range, T  
STAT1, STAT2, PG  
OUT  
10  
mA  
A
2.2  
40 to 85  
40 to 125  
65 to 150  
300  
A
Junction temperature range, T  
J
°C  
Storage temperature, T  
stg  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds  
(1)  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only,  
and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating  
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
RECOMMENDED OPERATING CONDITIONS  
MIN  
NOM  
MAX UNIT  
Supply voltage, V and IN (Tie together)  
4.35  
16.0  
V
CC  
Operating junction temperature range, T  
40  
125  
°C  
J
The IC continues to operate below V , to 3.5 V, but the specifications are not tested nor guaranteed.  
The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the IN or OUT pins. A tight layout minimizes  
min  
switching noise.  
3
www.ti.com  
bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
ELECTRICAL CHARACTERISTICS  
T = 0°C to 125°C and recommended supply voltage range (unless otherwise stated)  
J
PARAMETER  
INPUT CURRENTS  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
CC  
V
CC  
V
CC  
> V  
> V  
> V  
,
,
,
PWM switching  
PWM NOT switching  
CE = HIGH  
10  
CC(min)  
CC(min)  
CC(min)  
mA  
5
I
V
CC  
supply current  
VCC(VCC)  
315  
µA  
0°C T 65°C,  
V
= 4.2 V  
J
I(BAT)  
3.5  
5.5  
7.7  
V
CC  
< V  
or V > V  
but not in charge  
(SLP)  
CC  
(SLP)  
0°C T 65°C,  
V
I(BAT)  
= 8.4 V  
Battery discharge sleep current,  
(SNS, BAT, OUT, FB pins)  
J
I
µA  
(SLP)  
V
CC  
< V  
or V > V  
but not in charge  
(SLP)  
CC  
(SLP)  
0°C T 65°C,  
V
I(BAT)  
= 12.6 V  
J
V
CC  
< V  
or V > V  
but not in charge  
(SLP)  
CC  
(SLP)  
VOLTAGE REGULATION  
CELLS = Low, in voltage regulation  
CELLS = High, in voltage regulation  
Operating in voltage regulation  
4.2  
8.4  
4.2  
Output voltage, bq24103/13  
V
V
V
OREG  
IBAT  
Output voltage, bq24100/08  
Feedback regulation REF for  
bq24105/15 only (W/FB)  
V
I
= 25 nA typical into pin  
2.1  
IBAT  
T = 25°C  
A
0.5%  
1%  
0.5%  
1%  
Voltage regulation accuracy  
CURRENT REGULATION FAST CHARGE  
Output current range of converter  
V
LOWV  
V
(VCC)  
V  
V  
< V  
,
I(BAT)  
I(BAT)  
OREG  
I
150  
2000  
mA  
OCHARGE  
> V  
(DOMAX)  
100 mV V  
200 mV,  
  1000,  
IREG  
1V  
V
+
IREG  
RSET1  
Programmed  
Where  
Voltage regulated across R  
Accuracy  
SNS  
V
IREG  
10%  
10%  
5 kΩ ≤ RSET1 10k, Select RSET1 to  
program V  
,
IREG  
V
= I  
+ R  
IREG(measured)  
OCHARGE SNS  
(10% to +10% excludes errors due to RSET1  
and R tolerances)  
SNS  
V
V
V  
V  
(LOWV)  
I(BAT) O(REG)  
V
K
Output current set voltage  
Output current set factor  
1
V
(ISET1)  
V  
×
,
(VCC)  
I(BAT) V(DOMAX)  
V
LOWV  
V
(VCC)  
V  
< V  
I(BAT) O(REG)  
1000  
V/A  
(ISET1)  
V  
+
,
I(BAT) V(DOMAX)  
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION  
Precharge to fast-charge transition  
V
voltage threshold, BAT,  
bq24100/03/05/08 ICs only  
68  
71.4  
30  
75 %VO(REG)  
LOWV  
Deglitch time for precharge to fast  
charge transition  
Rising voltage; t  
2-mV overdrive  
, t  
= 100 ns,  
RISE FALL  
t
20  
15  
40  
ms  
I
Precharge range  
V
I(BAT)  
V
I(BAT)  
< V  
< V  
,
t < t  
t < t  
200  
mA  
mV  
V/A  
OPRECHG  
LOWV  
PRECHG  
V
K
Precharge set voltage, ISET2  
Precharge current set factor  
,
LOWV  
100  
(ISET2)  
(ISET2)  
PRECHG  
1000  
4
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bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
ELECTRICAL CHARACTERISTICS (continued)  
T = 0°C to 125°C and recommended supply voltage range (unless otherwise stated)  
J
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
100 mV V  
100 mV,  
IREG-PRE  
0.1V  
RSET2  
V
+
  1000,  
IREG*PRE  
(PGM)  
Where  
Voltage regulated across R  
Accuracy  
SNS  
V
20%  
20%  
IREG-PRE  
1.2 kΩ ≤ RSET2 10k, Select RSET1  
to program V  
IREGPRE,  
V
(Measured) = I  
× R  
IREGPRE  
OPRECHG SNS  
(20% to +20% excludes errors due to RSET1  
and R tolerances)  
SNS  
CHARGE TERMINATION (CURRENT TAPER) DETECTION  
Charge current termination detec-  
tion range  
I
V
> V  
15  
200  
mA  
TERM  
I(BAT)  
I(BAT)  
RCH  
Charge termination detection set  
voltage, ISET2  
V
K
V
> V  
100  
mV  
V/A  
TERM  
RCH  
Termination current set factor  
Charger termination accuracy  
1000  
(ISET2)  
V
I(BAT)  
> V  
20%  
20%  
40  
RCH  
Both rising and falling,  
, t = 100 ns  
2-mV overdrive  
t
Deglitch time for charge termination  
20  
30  
ms  
dg-TERM  
t
RISE FALL  
TEMPERATURE COMPARATOR AND VTSB BIAS REGULATOR  
V
V
V
Cold temperature threshold, TS  
Hot temperature threshold, TS  
Cutoff temperature threshold, TS  
LTF hysteresis  
72.8  
33.7  
28.7  
0.5  
73.5  
34.4  
29.3  
1.0  
74.2  
35.1  
29.9  
1.5  
LTF  
HTF  
TCO  
%
V
O(VTSB)  
Deglitch time for temperature fault,  
TS  
Both rising and falling,  
, t = 100 ns  
2-mV overdrive  
t
20  
30  
40  
ms  
V
dg-TS  
t
RISE FALL  
V
CC  
> V  
,
IN(min)  
V
V
TS bias output voltage  
3.15  
O(VTSB)  
I
= 10 mA  
0.1 µF C  
0.1 µF C  
1 µF,  
1 µF,  
(VTSB)  
O(VTSB)  
V
>
,
CC IN(min)  
TS bias voltage regulation accuracy  
10%  
10%  
O(VTSB)  
I
= 10 mA  
(VTSB)  
O(VTSB)  
BATTERY RECHARGE THRESHOLD  
V
Recharge threshold voltage  
Below V  
75  
20  
100  
30  
125 mV/cell  
RCH  
OREG  
V
I(BAT)  
< decreasing below threshold,  
t
Deglitch time  
40  
ms  
dg-RCH  
t
= 100 ns  
10-mV overdrive  
FALL  
STAT1, STAT2, AND PG OUTPUTS  
Low-level output saturation voltage,  
STATx  
V
I
I
= 5 mA  
0.5  
0.1  
OL(STATx)  
OL(PG)  
O
V
Low-level output saturation voltage,  
PG  
V
= 10 mA  
O
CE CMODE, CELLS INPUTS  
V
V
Low-level input voltage  
High-level input voltage  
I
I
= 5 µA  
0.0  
1.3  
0.4  
IL  
IL  
V
= 20 µA  
V
CC  
IH  
IH  
5
www.ti.com  
bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
ELECTRICAL CHARACTERISTICS (continued)  
T = 0°C to 125°C and recommended supply voltage range (unless otherwise stated)  
J
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
TTC INPUT  
t
t
Precharge timer  
1440  
25  
1800  
2160  
s
PRECHG  
CHARGE  
Programmable charge timer range  
Charge timer accuracy  
Timer multiplier  
t
= C  
K
(TTC)  
572 minutes  
10%  
×
(CHG)  
(TTC)  
0.01 µF C  
0.18 µF  
10%  
(TTC)  
K
2.6  
min/nF  
TTC  
C
Charge time capacitor range  
TTC enable threshold voltage  
0.01  
0.22  
µF  
TTC  
V
V
(TTC)  
rising  
200  
mV  
TTC_EN  
SLEEP COMPARATOR  
V
CC  
V
CC  
2.3 V V  
V  
for 1 or 2 cells  
V
IBAT  
V
IBAT  
I(OUT)  
OREG,  
+5 mV  
+75mV  
V
Sleep-mode entry threshold  
V
SLPENT  
V
CC  
V
CC  
(1)  
V
= 12.6 V,  
bq24105/15  
R
= 1 kΩ  
IN  
I(OUT)  
V
IBAT  
V
IBAT  
4 mV  
+73mV  
160  
V
t
Sleep-mode exit hysteresis,  
Deglitch time for sleep mode  
2.3 V V  
V  
40  
mV  
SLPEXIT  
I(OUT)  
OREG  
V
CC  
decreasing below threshold,  
= 100 ns, 10-mV overdrive, PMOS turns off  
5
µs  
t
FALL  
V
CC  
decreasing below threshold,  
dg-SLP  
t
= 100 ns, 10-mV overdrive, STATx pins  
20  
30  
40  
ms  
FALL  
turn off  
UVLO  
V
IC active threshold voltage  
IC active hysteresis  
V
V
rising  
falling  
3.15  
120  
3.30  
150  
3.50  
V
UVLOON  
CC  
mV  
CC  
PWM  
7 V V V  
400  
500  
130  
150  
CC  
CC(max)  
Internal P-channel MOSFET  
on-resistance  
4.5 V V 7 V  
CC  
mΩ  
7 V V V  
CC  
CC(max)  
Internal N-channel MOSFET  
on-resistance  
4.5 V V 7 V  
CC  
f
Oscillator frequency  
1.1  
MHz  
OSC  
Frequency accuracy  
9%  
9%  
D
D
Maximum duty cycle  
100%  
MAX  
MIN  
Minimum duty cycle  
0%  
t
t
Switching delay time (turn on)  
Minimum synchronous FET on time  
Synchronous FET minimum  
20  
60  
ns  
ns  
TOD  
syncmin  
50  
400  
mA  
(2)  
current-off threshold  
6
www.ti.com  
bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
ELECTRICAL CHARACTERISTICS (continued)  
T = 0°C to 125°C and recommended supply voltage range (unless otherwise stated)  
J
PARAMETER  
BATTERY DETECTION  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Battery detection current during  
time-out fault  
I
V
I(BAT)  
< V  
V  
RCH  
2
mA  
DETECT  
OREG  
I
t
I
t
Discharge current  
Discharge time  
Wake current  
Wake time  
V
V
V
V
< V  
< V  
V  
V  
V  
V  
400  
1
µA  
s
DISCHRG1  
DISCHRG1  
WAKE  
SHORT  
SHORT  
SHORT  
SHORT  
I(BAT)  
I(BAT)  
I(BAT)  
I(BAT)  
OREG  
OREG  
OREG  
OREG  
RCH  
RCH  
RCH  
RCH  
< V  
< V  
< V  
< V  
< V  
< V  
2
mA  
s
0.5  
WAKE  
Begins after termination detected,  
V  
I
Termination discharge current  
400  
262  
µA  
DISCHRG2  
V
I(BAT)  
OREG  
t
Termination time  
ms  
DISCHRG2  
OUTPUT CAPACITOR  
Required output ceramic capacitor  
range from SNS to PGND, between  
inductor and R  
C
C
4.7  
10  
47  
µF  
µF  
OUT  
SNS  
Required SNS capacitor (ceramic)  
at SNS pin  
0.1  
SNS  
PROTECTION  
Threshold over V  
to turn-off P-channel  
OREG  
V
OVP  
OVP threshold voltage  
MOSFET, STAT1, and STAT2 during charge or  
termination states  
110  
117  
121 %VO(REG)  
I
Cycle-by-cycle current limit  
Short-circuit voltage threshold, BAT  
Short-circuit current  
2.6  
1.95  
35  
3.6  
4.5  
2.05  
65  
A
LIMIT  
V
V
V
falling  
2.00  
V/cell  
mA  
SHORT  
SHORT  
I(BAT)  
I
V  
SHORT  
I(BAT)  
T
Thermal trip  
165  
10  
SHTDWN  
°C  
Thermal hysteresis  
(1)  
(2)  
For bq24105 and bq24115 only. R is connected between IN and PGND pins and needed to ensure sleep entry.  
N-channel always turns on for ~60 ns and then turns off if current is too low.  
IN  
RHL PACKAGE  
(BOTTOM VIEW)  
1
20  
STAS2  
PGND  
PGND  
CE  
SNS  
BAT  
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
STAT1  
IN  
IN  
PG  
VCC  
TTC  
ISET1  
ISET2  
NC  
TS  
11  
10  
7
www.ti.com  
bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
TERMINAL FUNCTIONS  
TERMINAL  
I/O  
Description  
bq24100  
bq24108  
NAME  
BAT  
bq24103  
14  
bq24105 bq24113 bq24115  
Battery voltage sense input. Bypass it with a capacitor to PGND if there are long  
inductive leads to battery.  
14  
14  
16  
14  
16  
14  
16  
I
I
Charger enable input. This active low input, if set high, suspends charge and  
places the device in the low-power sleep mode. Do not pull up this input to VTSB.  
16  
16  
CE  
Available on parts with fixed output voltage. Ground or float for single cell  
operation (4.2 V). For two cells operation (8.4 V) pull up this pin with a resistor to  
CELLS  
CMODE  
FB  
13  
13  
7
I
I
I
V
CC  
.
Charge mode selection: low for precharge as set by ISET2 pin and high (pull up to  
VTSB or <7 V) for fast charge as set by ISET1.  
7
Output voltage analog feedback adjustment. Connect the output of a resistive  
voltage divider powered from the battery terminals to this node to adjust the output  
battery voltage regulation.  
13  
13  
IN  
3, 4  
8
3, 4  
8
3, 4  
8
3, 4  
8
3, 4  
8
I
Charger input voltage.  
Charger current set point 1 (fast charge). Use a resistor to ground to set this  
value.  
ISET1  
I/O  
Charge current set point 2 (precharge and termination), set by a resistor  
connected to ground. A low-level CMODE signal selects the ISET2 charge rate,  
but if the battery voltage reaches the regulation set point, bqSWITCHER changes  
to voltage regulation regardless of CMODE input.  
ISET2  
9
9
9
9
9
I/O  
N/C  
13  
1
19  
1
19  
1
No connection. This pin must be left floating in the application.  
O
O
1
1
OUT  
Charge current output inductor connection.  
20  
20  
20  
20  
20  
Power good status output (open drain). The transistor turns on when a valid V  
is detected. It is turned off in the sleep mode. PG can be used to drive a LED or  
communicate with a host processor.  
CC  
5
5
5
5
5
PG  
O
PGND  
SNS  
17,18  
15  
17,18  
15  
17,18  
15  
17,18  
15  
17, 18  
15  
Power ground input  
Charge current-sense input. Battery current is sensed via the voltage drop  
developed on this pin by an external sense resistor in series with the battery pack.  
A 0.1-µF capacitor to PGND is required.  
I
Charge status 1 (open-drain output). When the transistor turns on indicates  
charge in process. When it is off and with the condition of STAT2 indicates various  
charger conditions (See Table 1)  
STAT1  
STAT2  
TS  
2
19  
12  
7
2
19  
12  
7
2
19  
12  
7
2
2
O
O
I
Charge status 2 (open-drain output). When the transistor turns on indicates  
charge is done. When it is off and with the condition of STAT1 indicates various  
charger conditions (See Table 1)  
Temperature sense input. This input monitors its voltage against an internal  
threshold to determine if charging is allowed. Use an NTC thermistor and a  
voltage divider powered from VTSB to develop this voltage. (See Figure 7)  
12  
12  
Timer and termination control. Connect a capacitor from this node to GND to set  
the bqSWITCHER timer. When this input is low the timer and termination  
detection are disabled.  
TTC  
I
I
VCC  
VSS  
6
6
6
6
6
Analog device input  
Analog ground input  
10  
10  
10  
10  
10  
TS internal bias regulator voltage. Connect capacitor (with a value between a  
0.1-µF and 1-µF) between this output and VSS.  
VTSB  
11  
11  
11  
11  
11  
O
There is an internal electrical connection between the exposed thermal pad and  
VSS. The exposed thermal pad must be connected to the same potential as the  
VSS pin on the printed circuit board. The power pad can be used as a star ground  
Exposed  
Thermal  
Pad  
Pad  
Pad  
Pad  
Pad  
Pad  
connection between V and PGND. A common ground plane may be used. VSS  
SS  
pin must be connected to ground at all times.  
8
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FUNCTIONAL BLOCK DIAGRAM  
+
9
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bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
TYPICAL CHARACTERISTICS  
EFFICIENCY  
vs  
OUTPUT CHARGE CURRENT  
EFFICIENCY  
vs  
OUTPUT CHARGE CURRENT  
100  
90  
100  
90  
80  
80  
V
IN  
= 9 V  
70  
60  
50  
70  
60  
50  
V
IN  
= 4.5 V  
V
IN  
= 16 V  
V
IN  
= 16 V  
40  
30  
40  
30  
20  
10  
0
20  
10  
V
= 4.2 V  
(BAT)  
V
= 8.4 V  
(BAT)  
1 Cell  
= 25°C  
2 Cell  
T = 25°C  
A
T
A
0
0
0.5  
1
1.5  
2
0
0.5  
1
1.5  
2
I
= Output Charge Current A  
I
= Output Charge Current A  
O(CHARGE)  
O(CHARGE)  
Figure 1  
Figure 2  
L
OUT  
10 µH  
bq24113RHL  
R
(SNS)  
V
IN  
3
4
6
2
5
7
IN  
OUT 1  
10 µF  
C
OUT  
10 µF  
IN  
OUT 20  
VCC  
PGND 17  
STAT1 PGND 18  
PG SNS 15  
CMODE BAT 14  
PACK+  
+
PACK−  
0.1 µF  
R
R
(ISET1)  
16 CE  
ISET1  
ISET2  
8
9
(ISET2)  
R
T1  
10 VSS  
TS 12  
TEMP  
13 CELLS  
VTSB 11  
R
T2  
BATTERY  
PACK  
To System  
UDG04035  
Figure 3. Typical Application Circuit (System-Controlled Version)  
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APPLICATION INFORMATION  
POR  
Check for Battery  
Presence  
Battery  
Detect?  
No  
Indicate BATTERY  
ABSENT  
Yes  
Suspend Charge  
TS Pin  
in LTF to HTF  
Range?  
No  
Indicate CHARGE  
SUSPEND  
Yes  
VBAT<VLOWV  
No  
Regulate  
IPRECHG  
Reset and Start  
T30min timer  
Yes  
Indicate Charge  
InProgress  
Suspend Charge  
TS pin  
in LTF to TCO  
range?  
Reset and Start  
FSTCHG timer  
No  
Indicate CHARGE  
SUSPEND  
No  
Regulate  
Current or Voltage  
Yes  
VBAT<VLOWV  
Yes  
TS pin  
in LTF to HTF  
range?  
Indicate Charge−  
InProgress  
No  
Suspend Charge  
Yes  
TS Pin  
in LTF to TCO  
Range?  
No  
Indicate CHARGE  
SUSPEND  
T30min  
Expired?  
No  
Yes  
No  
TS pin  
in LTF to HTF  
range?  
FSTCHG Timer  
Expired?  
No  
VBAT<VLOWV  
No  
Yes  
Yes  
Yes  
Yes  
Fault Condition  
Enable I  
DETECT  
No  
ITERM detection?  
Indicate Fault  
No  
Yes  
Battery  
Replaced?  
(Vbat < Vrch?)  
Turn Off Charge  
Enable I  
for  
DISCHG  
tDISCHG2  
Indicate Charge−  
InProgress  
Yes  
*NOTE: If the TTC pin is  
pulled low, the safety timer  
and termination are  
Charge Complete  
VBAT < VRCH  
?
No  
disabled; the charger  
continues to regulate, and  
the STAT pins indicate  
charge in progress.  
Indicate DONE  
*
Battery Removed  
If the TTC pin is pulled high  
(VTSB), only the safety  
timer is disabled  
Yes  
Indicate BATTERY  
ABSENT  
(termination is normal).  
Figure 4. Stand-Alone Version Operational Flow Chart  
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POR  
SLEEP MODE  
Vcc > V  
Checked at All  
Times  
I(BAT)  
No  
No  
Indicate SLEEP  
MODE  
Yes  
/CE=Low  
Yes  
Regulate  
I
O(PRECHG)  
CMODE=Low  
Yes  
Indicate Charge−  
InProgress  
No  
Yes  
/CE=High  
No  
Regulate Current  
or Voltage  
Yes  
Indicate Charge−  
InProgress  
CMODE=High  
or  
Yes  
V
in V  
REG  
IBAT  
Yes  
No  
CMODE=Low  
No  
No  
/CE=High  
Yes  
Turn Off Charge  
Indicate DONE  
Yes  
No  
/CE=Low  
Yes  
Figure 5. System-Controlled Operational Flow Chart  
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FUNCTIONAL DESCRIPTION FOR STANDALONE VERSION (bq2410x)  
The bqSWITCHERsupports a precision Li-ion or Li-polymer charging system for single-, two- or three-cell  
applications. See Figure 4 and Figure 5 for operational flow charts and Figure 6 for a typical charge profile.  
Precharge  
Phase  
Voltage Regulation and  
Charge Termination Phase  
Current Regulation Phase  
Regulation Voltage  
Regulation Current  
Charge Voltage  
V
LOW  
V
SHORT  
Charge Current  
Precharge  
and Termination  
I
SHORT  
Programmable  
Safety Timer  
Precharge  
Timer  
UDG04037  
Figure 6. Typical Charging Profile  
Temperature Qualification  
The bqSWITCHER continuously monitors battery temperature by measuring the voltage between the TS pin  
and VSS pin. A negative temperature coefficient thermistor (NTC) and an external voltage divider typically  
develop this voltage. The bqSWITCHER compares this voltage against its internal thresholds to determine if  
charging is allowed. To initiate a charge cycle, the battery temperature must be within the V  
-to-V  
(LTF)  
(HTF)  
thresholds. If battery temperature is outside of this range, the bqSWITCHER suspends charge and waits until  
the battery temperature is within the V -to-V range. During the charge cycle (both precharge and fast  
(LTF)  
(HTF)  
charge), the battery temperature must be within the V  
-to-V  
thresholds. If battery temperature is outside  
(LTF)  
(TCO)  
of this range, the bqSWITCHER suspends charge and waits until the battery temperature is within the  
-to-V range. The bqSWITCHER suspends charge by turning off the PWM and holding the timer value  
V
(LTF)  
(HTF)  
(i.e., timers are not reset during a suspend condition). Note that the bias for the external resistor divider is  
provided from the VTSB output. Applying a constant voltage between the V  
pin disables the temperature-sensing feature.  
-to-V  
thresholds to the TS  
(LTF)  
(HTF)  
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V
CC  
Charge Suspend  
Charge Suspend  
V
(LTF)  
Temperature Range  
to Initiate Charge  
Temperature Range  
During Charge Cycle  
V
V
(HTF)  
(TCO)  
Charge Suspend  
Charge Suspend  
V
SS  
Figure 7. TS Pin Thresholds  
Battery Preconditioning (Precharge)  
On power up, if the battery voltage is below the V  
threshold, the bqSWITCHER applies a precharge  
LOWV  
current, I  
safety timer, t  
, to the battery. This feature revives deeply discharged cells. The bqSWITCHER activates a  
PRECHG  
, during the conditioning phase. If the V  
threshold is not reached within the timer  
PRECHG  
LOWV  
period, the bqSWITCHER turns off the charger and enunciates FAULT on the STATx pins. In the case of a  
FAULT condition, the bqSWITCHER reduces the current to I . I is used to detect a battery  
DETECT DETECT  
replacement condition. Fault condition is cleared by POR or battery replacement.  
The magnitude of the precharge current, I , is determined by the value of programming resistor,  
O(PRECHG)  
R
(ISET2)  
, connected to the ISET2 pin.  
K
  V  
(ISET2)  
(ISET2)  
+ ǒR  
(SNS)Ǔ  
I
O(PRECHG)  
  R  
(ISET2)  
(1)  
where  
D
D
D
D
R
V
is the external current-sense resistor  
is the output voltage of the ISET2 pin  
SNS  
(ISET2)  
(ISET2)  
(ISET2)  
K
V
is the V/A gain factor  
and K are specified in the Electrical Characteristics table.  
(ISET2)  
Battery Charge Current  
The battery charge current, I  
, is established by setting the external sense resistor, R  
, and the  
(SNS)  
O(CHARGE)  
resistor, R , connected to the ISET1 pin.  
(ISET1)  
In order to set the current, first choose R  
based on the regulation threshold V  
across this resistor. Let  
(SNS)  
IREG  
V
IREG  
= 100 mV to start and calculate the R  
value needed.  
SNS  
V
IREG  
OCHARGE  
R
+
(SNS)  
I
(2)  
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If this value is not a standard sense resistor value, choose the next larger value. Using the selected standard  
value, solve for V  
.
IREG  
V
+ R  
  I  
(SNS) OCHARGE  
IREG  
(3)  
(4)  
The value of R  
is then calculated based on the following equation:  
(ISET1)  
K
  V  
  R  
ISET1  
ISET1  
1000 V  
R
+
+
SET1  
I
V
OCHARGE  
SNS  
IREG  
where  
D
D
D
D
D
V
I
is the voltage regulated across R  
is the battery charge current  
IREG  
SNS  
OCHARGE  
R
V
is the external current sense resistor  
is the output voltage of the ISET1 pin  
SNS  
(ISET1)  
K(ISET1) is the V/A gain factor (see electrical characteristics table)  
The following provide a more detailed design procedure and example for this parameter:  
1. Select the charge current.  
Example:  
I  
= 2 A  
OCHARGE  
OPRECHG  
I  
= 200 mA  
2. Select the sense resistor value. Ensure that the power rating of the sense resistor is not exceeded  
Example:  
Let V  
= 100 mV (S/B from 100200 mV)  
IREG  
V
IREG  
100 mV  
2 A  
Solve for R  
+
+
+ 50 mW  
SNS  
I
OCHARGE  
Check availability for R  
. Use value that is equal (next larger value if not available).  
SNS  
Check for power dissipation  
  ǒIOCHARGEǓ2  
2
(
)
P
+ R  
+ 0.05 W   2 A + 0.2 W  
(SNS)  
(SNS)  
(5)  
Select 0805 or 1206 size rated at 0.25 W  
15  
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3. Determine R  
.
(ISET1)  
V  
= 1 V  
(ISET1)  
K  
= 1000 V/A  
(ISET1)  
K
R
  V  
(ISET1)  
1000 VńA   1 V  
0.05 W   2 A  
(ISET1)  
R
+
+
+
+ 10 kW  
(ISET1)  
  I  
(SNS)  
OCHARGE  
(6)  
(7)  
4. Determine R  
(ISET2)  
V  
K  
= 0.1 V  
(ISET2)  
(ISET2)  
= 1000V/A  
K
R
  V  
(ISET2)  
1000 VńA   0.1 V  
0.05 W   0.2 A  
(ISET2)  
R
+
+ 10 kW  
(ISET2)  
  I  
(SNS)  
OPRECHG  
R
SENSE  
SNS  
BAT  
V
= 1 V  
(ISET1)  
ISET1  
I
(ISET1)  
R
(ISET1)  
V
= 0.1 V  
(ISET2)  
ISET2  
R
I
(ISET2)  
(ISET2)  
VSS  
UDG04036  
Figure 8. Program Charge Current with R  
and R  
(ISET2)  
(ISET1)  
Battery Voltage Regulation  
The voltage regulation feedback occurs through the BAT pin. This input is tied directly to the positive side of the  
battery pack. The bqSWITCHER monitors the battery-pack voltage between the BAT and VSS pins. The  
bqSWITCHER is offered in two fixed-voltage versions: 4.2 V and 8.4 V as selected by the CELLS input. A low  
or floating input on the CELLS selects single-cell mode (4.2 V) while a high-input selects two-cell mode.  
For device options that include adjustable output voltage, the voltage regulation feedback is through the FB pin.  
A resistor divider is used from the battery output voltage to GND. BAT pin remains connected directly to the  
battery output voltage for current sensing with respect to SNS.  
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Charge Termination And Recharge  
The bqSWITCHER monitors the charging current during the voltage regulation phase. Once the termination  
threshold, I , is detected, the bqSWITCHER terminates charge. The termination current level is selected  
TERM  
by the value of programming resistor, R  
, connected to the ISET2 pin.  
(ISET2)  
K
+ ǒR  
  V  
(ISET2)  
TERM  
I
TERM  
(SNS)Ǔ  
  R  
(ISET2)  
(8)  
where  
D
D
D
D
R
V
is the external current-sense resistor  
is the output of the ISET2 pin  
is the A/V gain factor  
(SNS)  
TERM  
K
V
(ISET2)  
and K  
are specified in the Electrical Characteristics table  
TERM  
(ISET2)  
As a safety backup, the bqSWITCHER also provides a programmable charge timer. The charge time is  
programmed by the value of a capacitor connected between the TTC pin and GND by the following formula:  
t
+ C  
  K  
(TTC) (TTC)  
CHARGE  
(9)  
where  
D
C
K
is the capacitor connected to the TTC pin  
is the multiplier  
(TTC)  
D
(TTC)  
A new charge cycle is initiated when one of the following conditions are detected:  
D
D
D
D
The battery voltage falls below the V  
threshold  
RCH  
Power-on reset (POR), if battery voltage is below the V  
CE toggle  
threshold  
RCH  
TTC pin, described as follows.  
In order to disable the charge termination and safety timer, the user can pull the TTC input below the V  
TTC_EN  
threshold. Going above this threshold enables the termination and safety timer features and also reset the timer.  
Tying TTC high to VTSB disables the safety timer only.  
Sleep Mode  
The bqSWITCHER enters the low-power sleep mode if the VCC pin is removed from the circuit. This feature  
prevents draining the battery during the absence of VCC.  
Charge Status Outputs  
The open-drain STAT1 and STAT2 outputs indicate various charger operations as shown in the following table.  
These status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates  
that the open-drain transistor is turned off.  
Table 1. Status Pins Summary  
Charge State  
STAT1  
ON  
STAT2  
OFF  
ON  
Charge-in-progress  
Charge complete  
OFF  
OFF  
(1)  
Charge suspend, timer fault, overvoltage, sleep mode, battery absent  
OFF  
(1)  
bq2411x IC do not have timer fault or battery absent modes  
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Table 2. Status Pins Summary (bq24108 only)  
Charge State  
STAT1  
OFF  
STAT2  
OFF  
OFF  
ON  
Battery absent  
Charge-in-progress  
Charge complete  
ON  
OFF  
Battery over discharge, V  
< V  
ON/OFF (0.5 Hz)  
ON/OFF (0.5 Hz)  
ON/OFF (0.5 Hz)  
ON/OFF (0.5 Hz)  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
I(BAT)  
(SC)  
Charge suspend, (due to TS pin and internal thermal protection)  
Precharge timer fault  
Fast charge timer fault  
Sleep mode  
PG Output  
The open-drain PG (power good) indicates when the AC-to-DC adapter (i.e., V ) is present. The output turns  
CC  
ON when sleep-mode exit threshold, V  
, is detected. This output is turned off in the sleep mode. The  
SLPEXIT  
PG pin can be used to drive an LED or communicate to the host processor.  
CE Input (Charge Enable)  
The CE digital input is used to disable or enable the charge process. A low-level signal on this pin enables the  
charge and a high-level V signal disables the charge. A high-to-low transition on this pin also resets all timers  
CC  
and fault conditions. Note that the CE pin cannot be pulled up to VTSB voltage. This may create power-up  
issues.  
Battery Absent Detection  
For applications with removable battery packs, bqSWITCHER provides a battery absent detection scheme to  
reliably detect insertion and/or removal of battery packs.  
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POR or V  
Yes  
RCH  
Detection routine runs on power up  
and if V drops below refresh  
threshold due to removing battery  
or discharging battery.  
BAT  
Enable  
(DETECT)  
I
for t  
(DETECT)  
BATTERY  
PRESENT,  
Begin Charge  
No  
V
I(BAT)  
<V  
(LOWV)  
Yes  
Apply I  
(WAKE)  
(WAKE)  
for t  
BATTERY  
PRESENT,  
Begin Charge  
V
>
I(BAT)  
No  
V
O(REG)  
V  
RCH  
Yes  
BATTERY  
ABSENT  
Figure 9. Battery Absent Detection for bq2410x ICs only  
The voltage at the BAT pin is held above the battery recharge threshold, V , by the charged battery following  
RCH  
fast charging. When the voltage at the BAT pin falls to the recharge threshold, either by a load on the battery  
or due to battery removal, the bqSWITCHER begins a battery absent detection test. This test involves enabling  
a detection current, I  
precharge threshold, V  
, for a period of t  
. Following this, the precharge current, I  
and checking to see if the battery voltage is below the  
DETECT  
DETECT  
is applied for a period of t  
OPRECHG DETECT  
LOWV  
and the battery voltage is checked again to ensure that it is above the recharge threshold. The purpose of this  
current is to attempt to close a battery pack with an open protector, if one is connected to the bqSWITCHER.  
Passing both of the discharge and charging tests indicates a battery absent fault at the STAT pins. Failure of  
either test starts a new charge cycle. For the absent battery condition, the voltage on the BAT pin rises and falls  
between the V  
and V  
thresholds indefinitely.  
LOWV  
OREG  
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Timer Fault Recovery  
As shown in Figure 5, bqSWITCHER provides a recovery method to deal with timer fault conditions. The  
following summarizes this method.  
Condition #1  
V
I(BAT)  
above recharge threshold (V  
V  
) and timeout fault occurs.  
OREG  
RCH  
Recovery method: bqSWITCHER waits for the battery voltage to fall below the recharge threshold. This could  
happen as a result of a load on the battery, self-discharge or battery removal. Once the battery falls below the  
recharge threshold, the bqSWITCHER clears the fault and enters the battery absent detection routine. A POR  
or CE or TTE toggle also clears the fault.  
Condition #2  
Charge voltage below recharge threshold (V  
) and timeout fault occurs  
RCH  
Recovery method: Under this scenario, the bqSWITCHER applies the I  
current. This small current is  
DETECT  
used to detect a battery removal condition and remains on as long as the battery voltage stays below the  
recharge threshold. If the battery voltage goes above the recharge threshold, then the bqSWITCHER disables  
the I  
current and executes the recovery method described for condition #1. Once the battery falls below  
DETECT  
the recharge threshold, the bqSWITCHER clears the fault and enters the battery absent detection routine. A  
POR or CE toggle also clears the fault.  
Output Overvoltage Protection (Applies To All Versions)  
The bqSWITCHER provides a built-in overvoltage protection to protect the detect and other components  
against damages if the battery voltage gets too high, as when the battery is suddenly removed. When an  
overvoltage condition is detected, this feature turns off the PWM and STATx pins. The fault is cleared once V  
IBAT  
drops to the recharge threshold (V  
V  
).  
OREG  
RCH  
FUNCTIONAL DESCRIPTION FOR SYSTEM-CONTROLLED VERSION (bq2411x)  
For applications requiring charge management under the host system control, the bqSWITCHER (bq2411x)  
offers a number of control functions. The following section describes these functions.  
Precharge And Fast Charge Control  
A low-level signal on the CMODE pin forces the bqSWITCHER to charge at the precharge rate set on the ISET2  
pin. A high-level signal forces charge at fast charge rate as set by the ISET1 pin. If the battery reaches the  
voltage regulation level, V  
, the bqSWITCHER transitions to voltage regulation phase regardless of the  
OREG  
status of the CMODE input.  
Charge Termination And Safety Timers  
The charge timers and termination are disabled in the system-controlled versions of the bqSWITCHER. The  
host system can use the CE input to enable or disable charge. When an overvoltage condition is detected, the  
charger process stops, and all power FETs are turned off.  
Inductor, Capacitor, and Sense Resistor Selection Guidelines  
The bqSWITCHER provides internal loop compensation. With this scheme, best stability occurs when LC  
resonant frequency, f is approximately 16 kHz (8 kHz to 32 kHz). Equation (10) can be used to calculate the  
o
value of the output inductor and capacitor. Table 2 provides a summary of typical component values for various  
charge rates.  
1
f +  
0
2p   ǸL  
  C  
OUT  
OUT  
(10)  
20  
www.ti.com  
bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
Table 3. Output Components Summary  
CHARGE CURRENT  
Output inductor, L  
0.5 A  
22 µH  
4.7 µF  
0.2 Ω  
1 A  
2 A  
4.7 µH  
10 µH  
10 µF  
0.1 Ω  
OUT  
Output capacitor, C  
22 µF (or 2 × 10 µH) ceramic  
0.05 Ω  
OUT  
(SNS)  
Sense resistor, R  
THERMAL CONSIDERATIONS  
The SWITCHER is packaged in a thermally enhanced MLP package. The package includes a thermal pad to  
provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB design  
guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment Application  
Note (SLUA271).  
The most common measure of package thermal performance is thermal impedance (θ ) measured (or  
JA  
modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical  
expression for θ is:  
JA  
TJ * TA  
q(JA)  
+
P
(11)  
Where:  
T = chip junction temperature  
J
T = ambient temperature  
A
P = device power dissipation  
Factors that can greatly influence the measurement and calculation of θ include:  
JA  
D
D
D
D
D
Whether or not the device is board mounted  
Trace size, composition, thickness, and geometry  
Orientation of the device (horizontal or vertical)  
Volume of the ambient air surrounding the device under test and airflow  
Whether other surfaces are in close proximity to the device being tested  
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal power  
FET. It can be calculated from the following equation:  
P = [Vin × lin Vbat × Ibat]  
Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning  
of the charge cycle when the battery voltage is at its lowest. (See Figure 6.)  
PCB LAYOUT CONSIDERATION  
It is important to pay special attention to the PCB layout. The following provides some guidelines:  
D
To obtain optimal performance, the power input capacitors, connected from input to PGND should be placed  
as close as possible to the bqSWITCHER. The output inductor should be placed directly above the IC and  
the output capacitor connected between the inductor and PGND of the IC. The intent is to minimize the  
current path loop area from the OUT pin through the LC filter and back to the GND pin. The sense resistor  
should be adjacent to the junction of the inductor and output capacitor. Route the sense leads connected  
across the Rsns back to the IC, close to each other (minimize loop area) or on top of each other on adjacent  
layers (do not route the sense leads through a high-current path). Use an optional capacitor downstream  
from the sense resistor if long (inductive) battery leads are used.  
21  
www.ti.com  
bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
D
D
Place all small signal components (C  
components such that routing interrupts power stage currents). All small control signals should be routed  
away from the high current paths.  
, RSET1/2 and TS) close to their respective IC pin (do not place  
TTC  
The PWB should have a ground plane (return) connected directly to the return of all components through  
vias (3 vias per capacitor for power-stage capacitors, 3 vias for the IC PGND, 1 via per capacitor for small  
signal components). A star ground design approach is typically used to keep circuit block currents isolated  
(high-power/low-small signal) which reduces noise coupling and ground bounce issues. A single ground  
plane for this design gives good results. With this small layout and a single ground plane, there is not a  
ground bounce issue, and having the components segregated minimizes coupling between signals.  
D
D
The high-current charge paths into IN and from the OUT pins must be sized appropriately for the maximum  
charge current in order to avoid voltage drops in these traces. The PGND pins should be connected to the  
ground plane to return current through the internal low-side FET. The thermal vias in the IC PowerPAD™  
provide the return path connection.  
The bqSWITCHER is packaged in a thermally enhanced MLP package. The package includes a thermal  
pad to provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB  
design guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment  
Application Note (SLUA271). Six 1013 mil vias are a minimum number of recommended vias, placed in  
the IC’s power pad, connecting it to a ground thermal plane on the opposite side of the PWB. This plane  
must be at the same potential as Vss and PGND of this IC.  
D
See the User Guide (SLUU200) for an example of good layout.  
WAVEFORMS: All waveforms are taken at Lout (IC Out pin). V = 7.6 V and the battery was set to 2.6 V, 3.5  
IN  
V, and 4.2 V for the three waveforms. When the top switch of the converter is on, the waveform is at ~7.5 V, and  
when off, the waveform is near ground. Note that the ringing on the switching edges is small. This is due to a  
tight layout (minimized loop areas), a shielded inductor (closed core), and using a low-inductive scope ground  
lead (i.e., short with minimum loop) .  
22  
www.ti.com  
bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
Precharge: The current is low in precharge so the bottom synchronous FET turns off after its minimum on-time  
which explains the step between ~0 V and 0.5 V. When the bottom FET and top FET are off, the current  
conducts through the body diode of the bottom FET which results in a diode drop below the ground potential.  
The initial negative spike is the delay turning on the bottom FET, which is to prevent shoot-through current as  
the top FET is turning off.  
Fast Charge: This is captured during the constant-current phase. The two negative spikes are the result of the  
short delay when switching between the top and bottom FETs. The break-before-make action prevents current  
shoot-through and results in a body diode drop below ground potential during the break time.  
23  
www.ti.com  
bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
Charge during Voltage Regulation and Approaching Termination: Note that this waveform is similar to the  
precharge waveform. The difference is that the battery voltage is higher so the duty cycle is slightly higher. The  
bottom FET stays on longer because there is more of a current load than during precharge; it takes longer for  
the inducator current to ramp down to the current threshold where the synchronous FET is disabled.  
24  
www.ti.com  
bq24100, bq24103, bq24105  
bq24108, bq24113, bq24115  
SLUS606B JUNE 2004 REVISED NOVEMBER 2004  
Application Note: Charging Battery and Powering System Without Affecting Battery Charge and  
Termination.  
L
OUT  
bq24100RHL  
IN OUT  
10 µH  
R
(SNS)  
V
IN  
3
4
6
2
1
R
10 µF  
(SYS)  
C
OUT  
IN  
OUT 20  
10 µF  
VCC  
PGND 17  
STAT1 PGND 18  
PACK+  
19 STAT2  
SNS 15  
BAT 14  
+
PG  
5
7
PACK−  
VTSB  
VTSB  
R
R
(ISET1)  
0.1 µF  
TTC  
ISET1  
ISET2  
8
9
C
(ISET2)  
TTC  
16 CE  
R
T1  
10 VSS  
PWR PAD  
TS 12  
TEMP  
VTSB 11  
BATTERY  
PACK  
R
T2  
V
IN  
V
IN  
V
IN  
D1  
Adapter  
Present  
D3  
Charge  
D2  
Done  
UDG04033  
The bqSWITCHER was designed as a stand-alone battery charger but can be easily adapted to power a system  
load, while considering a few minor issues.  
Advantages:  
1. The charger controller is based only on what current goes through the current-sense resistor (so precharge,  
constant current, and termination all work well), and is not affected by the system load.  
2. The input voltage has been converted to a usable system voltage with good efficiency from the input.  
3. Extra external FETs are not needed to switch power source to the battery.  
4. The TTC pin can be grounded to disable termination and keep the converter running and the battery fully  
charged, or let the switcher terminate when the battery is full and then run off of the battery via the sense  
resistor.  
Other Issues:  
1. If the system load current is large (1 A) the IR drop across the battery impedance causes the battery  
voltage to drop below the refresh threshold and start a new charge. The charger would then terminate due  
to low charge current. Therefore, the charger would cycle between charging and termination. If the load is  
smaller, the battery would have to discharge down to the refresh threshold resulting in a much slower  
cycling. Note that grounding the TTC pin keeps the converter on continuously.  
2. If TTC is grounded, the battery is kept at 4.2 V (not much different than leaving a fully charged battery set  
unloaded).  
3. The efficiency takes a 23% hit when discharging through the sense resistor to the system.  
25  
www.ti.com  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Mar-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
QFN  
QFN  
Drawing  
BQ24100RHL  
PREVIEW  
ACTIVE  
RHL  
20  
20  
50  
TBD  
Call TI  
Call TI  
BQ24100RHLR  
RHL  
3000  
Pb-Free  
(RoHS)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
BQ24103RHLR  
BQ24105RHLR  
BQ24108RHLR  
BQ24113RHLR  
BQ24115RHLR  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
QFN  
QFN  
QFN  
QFN  
QFN  
RHL  
RHL  
RHL  
RHL  
RHL  
20  
20  
20  
20  
20  
3000  
3000  
3000  
3000  
3000  
Pb-Free  
(RoHS)  
Pb-Free  
(RoHS)  
Pb-Free  
(RoHS)  
Pb-Free  
(RoHS)  
Pb-Free  
(RoHS)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to discontinue  
any product or service without notice. Customers should obtain the latest relevant information before placing  
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms  
and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
deems necessary to support this warranty. Except where mandated by government requirements, testing of all  
parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for  
their products and applications using TI components. To minimize the risks associated with customer products  
and applications, customers should provide adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,  
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process  
in which TI products or services are used. Information published by TI regarding third-party products or services  
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.  
Use of such information may require a license from a third party under the patents or other intellectual property  
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Resale of TI products or services with statements different from or beyond the parameters stated by TI for that  
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Following are URLs where you can obtain information on other Texas Instruments products and application  
solutions:  
Products  
Applications  
Audio  
Amplifiers  
amplifier.ti.com  
www.ti.com/audio  
Data Converters  
dataconverter.ti.com  
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www.ti.com/automotive  
DSP  
dsp.ti.com  
Broadband  
Digital Control  
Military  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/military  
Interface  
Logic  
interface.ti.com  
logic.ti.com  
Power Mgmt  
Microcontrollers  
power.ti.com  
Optical Networking  
Security  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
microcontroller.ti.com  
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Wireless  
www.ti.com/wireless  
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Copyright 2005, Texas Instruments Incorporated  

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