BQ24304DSGTG4 [TI]
OVERVOLTAGE AND OVERCURRENT PROTECTION IC AND Li+ CHARGER FRONT-END PROTECTION IC; 过压和过流保护IC和锂离子充电器前端保护IC
| 型号： | BQ24304DSGTG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OVERVOLTAGE AND OVERCURRENT PROTECTION IC AND Li+ CHARGER FRONT-END PROTECTION IC |
| 文件： | 总23页 (文件大小：873K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
bq24300
bq24304
bq24305
www.ti.com ........................................................................................................................................................ SLUS764B–AUGUST 2007–REVISED JUNE 2008
OVERVOLTAGE AND OVERCURRENT PROTECTION IC AND
Li+ CHARGER FRONT-END PROTECTION IC
1
FEATURES
•
•
•
•
Thermal Shutdown
2
•
Provides Protection for Three Variables:
Enable Function
–
–
–
Input Overvoltage
Small 2 mm × 2 mm 8-Pin SON Package
LDO Mode Voltage Regulation Options:
Input Overcurrent with Current Limiting
Battery Overvoltage
–
–
–
5.5V on bq24300
4.5V on bq24304
5.0V on bq24305
•
•
•
30V Maximum Input Voltage
Optional Input Reverse Polarity Protection
High Immunity Against False Triggering Due to
Voltage Spikes
APPLICATIONS
•
•
Bluetooth Headsets
Low-Power Handheld Devices
•
Robust Against False Triggering Due to
Current Transients
DESCRIPTION
The bq24300 and bq24304 are highly integrated circuits designed to provide protection to Li-ion batteries from
failures of the charging circuit. The IC continuously monitors the input voltage, the input current, and the battery
voltage. The device operates like a linear regulator: for voltages up to the Input Overvoltage threshold, the output
is held at 5.5V (bq24300), 5.0V (bq24305) or 4.5V (bq24304). In case of an input overvoltage condition, if the
overvoltage condition persists for more than a few microseconds, the IC removes power from the charging circuit
by turning off an internal switch. In the case of an overcurrent condition, it limits the current to a safe value for a
blanking duration before turning the switch off. Additionally, the IC also monitors its own die temperature and
switches off if it becomes too hot.
The IC also offers optional protection against reverse voltage at the input with an external P-channel MOSFET.
PINOUT
APPLICATION SCHEMATIC
AC Adapter
VDC
OUT
IN
1
8
6
IN
VSS
1
2
3
4
8
OUT
NC
1 μF
bq24080
GND
1 μF
Charger IC
7
bq2430x
VBAT
bq24300
bq24304
bq24305
SYSTEM
PGATE
NC
6
100 kW
VBAT
CE
5
5
2
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2008, Texas Instruments Incorporated
bq24300
bq24304
bq24305
SLUS764B–AUGUST 2007–REVISED JUNE 2008........................................................................................................................................................ www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION(1)
DEVICE(2)
bq24300
bq24304
bq24305
OUTPUT REGULATION VOLTAGE
PACKAGE
MARKING
BZA
5.5V
4.5V
5.0V
2mm x 2mm SON
2mm x 2mm SON
2mm x 2mm SON
CBS
CHD
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) To order a 3000 pcs reel add R to the part number, or to order a 250 pcs reel add T to the part number.
PACKAGE DISSIPATION RATINGS
(1)
PACKAGE
RθJC
RθJA
DSG
5°C/W
75°C/W
(1) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. The pad is
connected to the ground plane by a 2x3 via matrix.
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
PIN
VALUE
–0.3 to 30
–0.3 to 12
–0.3 to 7
2000
UNIT
V
IN, PGATE (with respect to VSS)
OUT (with respect to VSS)
Input voltage
V
CE, VBAT (with respect to VSS)
V
All (Human Body Model per JESD22-A114-E)
All (Machine Model per JESD22-A115-A)
V
200
V
ESD Withstand voltage
All (Charged Device Model per JESD22-C101-C)
500
V
IN (IEC 61000-4-2) (with IN pin bypassed to VSS with 1.0-µF low-ESR
ceramic capacitor)
15 (Air Discharge) 8
(Contact)
kV
Junction temperature, TJ
Storage temperature, TSTG
–40 to 150
–65 to 150
300
°C
°C
°C
Lead temperature (soldering, 10 seconds)
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
3.3
0
MAX UNIT
VIN
TJ
Input voltage range
Junction temperature
30
V
125
°C
2
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Product Folder Link(s): bq24300 bq24304 bq24305
bq24300
bq24304
bq24305
www.ti.com ........................................................................................................................................................ SLUS764B–AUGUST 2007–REVISED JUNE 2008
ELECTRICAL CHARACTERISTICS
over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
POWER-ON-RESET
TEST CONDITIONS
MIN
TYP
MAX UNIT
VUVLO
Under-voltage lock-out, input
power detected threshold
CE = Low, VIN increasing from 0V to 3V
CE = Low, VIN decreasing from 3V to 0V
2.5
2.7
2.8
V
VHYS-UVLO
Hysteresis on UVLO
200
260
8
300 mV
ms
tDGL(PGOOD)
Deglitch time, input power
detected status
CE = Low, time measured from
VIN 0V → 4V 1µs rise time, to output turning ON
IN
bq24300
340
410
65
400
Operating
IDD
VIN = 5V, CE = Low, no load on OUT pin
CE = High, VIN = 5V
µA
µA
bq24304,
current
500
bq24305
ISTDBY
Standby current
95
INPUT TO OUTPUT CHARACTERISTICS
VDO Drop-out voltage IN to OUT
OUTPUT VOLTAGE REGULATION
bq24300
CE = Low, VIN = 4 V, IOUT = 250 mA
CE = Low, VIN = 6 V, IOUT = 250 mA
45
75 mV
5.30
4.36
4.85
5.5
4.5
5.0
5.70
Output
voltage
VO(REG)
bq24304
bq24305
4.64
5.15
V
V
INPUT OVERVOLTAGE PROTECTION
Input overvoltage protection
threshold
CE = Low, VIN increasing from 4V to 12V
CE = Low, VIN decreasing from 12V to 4V
VOVP
10.2
60
10.5
100
64
10.8
VHYS-OVP
Hysteresis on OVP
160 mV
Blanking time, on OVP
CE = Low, Time measured from
VIN 4V → 12V, 1µs rise time, to output turning OFF
tBLANK(OVP)
µs
Recovery time from input
overvoltage condition
CE = Low, Time measured from
VIN 12V → 4V, 1µs fall time, to output turning ON
tON(OVP)
8
ms
INPUT OVERCURRENT PROTECTION
Input overcurrent protection
range
IOCP
CE = Low, VIN = 5 V
CE = Low
250
300
5
350 mA
ms
Blanking time, input
tBLANK(OCP)
overcurrent detected
Recovery time from input
tREC(OCP)
CE = Low
64
ms
overcurrent condition
BATTERY OVERVOLTAGE PROTECTION
Battery overvoltage protection CE = Low, VIN > 4.3V, VVBAT increasing
BVOVP
4.30
200
4.35
275
4.40
V
threshold
from 4.2 V to 4.5 V
Hysteresis on BVOVP
CE = Low, VIN > 4.3V, VVBAT decreasing
from 4.5 V to 3.9 V
VHYS-BOVP
IVBAT
320 mV
Input bias current on VBAT
pin
VVBAT = 4.4 V, TJ = 25°C
10
nA
Deglitch time, battery
overvoltage detected
CE = Low, VIN > 4.4V, time measured from
VVBAT 4.2V → 4.5V, 1µs rise time to output turning OFF
tDGL(BOVP)
176
14
µs
P-FET GATE DRIVER
VGCLMP
Gate driver clamp voltage
VIN > 15V
13
15
V
THERMAL PROTECTION
Thermal shutdown
temperature
TJ(OFF)
140
20
150
°C
°C
TJ(OFF-HYS)
Thermal shutdown hysteresis
LOGIC LEVELS ON CE
VIL
VIH
Low-level input voltage
High-level input voltage
0
0.4
V
V
1.4
Copyright © 2007–2008, Texas Instruments Incorporated
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bq24300
bq24304
bq24305
SLUS764B–AUGUST 2007–REVISED JUNE 2008........................................................................................................................................................ www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
IIL
Low-level input current
High-level input current
1
µA
µA
IIH
VCE = 1.8V
15
Q1
IN
OUT
Charge Pump,
Bandgap,
Bias Gen
VREF
VISNS
VREF
VREF
Current Limiting Loop
VO(REG) Loop
OFF
OCP Comparator
VREF - D
t
BLANK(OCP)
VISNS
VIN
CONTROL
AND STATUS
CE
V
OVP Comparator
REF
t
BLANK(OVP)
VIN
V
REF
t
DGL(PGOOD)
UVLO
VBAT
PGATE
level shift
VREF
THERMAL
SHUTDOWN
t
DGL(BOVP)
V
IN
V
GCLMP
VSS
Figure 1. Simplified Block Diagram
4
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Product Folder Link(s): bq24300 bq24304 bq24305
bq24300
bq24304
bq24305
www.ti.com ........................................................................................................................................................ SLUS764B–AUGUST 2007–REVISED JUNE 2008
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
IN
NO.
1
I
Input power, connect to external DC supply. Connect external 0.1µF (minimum) ceramic capacitor to VSS
Ground terminal
VSS
PGATE
NC
2
–
3
O
Gate drive for optional external P-FET
4, 7
5
Do not connect to any external circuit. These pins may have internal connections used for test purposes.
Chip enable input. Active low. When CE = Hi, the input FET is off. Internally pulled down.
Battery voltage sense input. Connect to pack positive terminal through a resistor.
CE
I
I
VBAT
6
8
O
Output terminal to the charging system. Connect external 1µF capacitor (minimum) ceramic capacitor to
VSS
OUT
There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device.
The thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do
not use the thermal pad as the primary ground input for the device. VSS pin must be connected to ground at
all times.
Thermal PAD
–
1
2
3
8
7
OUT
NC
IN
VSS
bq24300
bq24304
bq24305
VBAT
6
5
PGATE
NC
CE
4
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bq24300
bq24304
bq24305
SLUS764B–AUGUST 2007–REVISED JUNE 2008........................................................................................................................................................ www.ti.com
TYPICAL OPERATING PERFORMANCE
Test conditions (unless otherwise noted) for typical operating performance are: VIN = 5 V, CIN = 1 µF, COUT = 1µF,
RBAT = 100 kΩ, ROUT = 22Ω, TA = 25°C (see Figure 22 - Typical Application Circuit)
V
IN
V
IN
V
t
OUT
DGL(PGOOD)
V
OUT
I
OUT
I
OUT
Figure 2. Normal Power-On Showing Soft-Start.
Figure 3. Power-On with Input Overvoltage.
VIN 0 V to 6.0 V, tR = 20µs
VIN 0 V to 12.0 V, tR = 50 µs
12.8V
11.5V
V
IN
V
IN
5.92V
5.9V
V
V
OUT
OUT
t
BLANK(OVP)
Figure 4. bq24300 OVP Response for Input Step.
VIN 6.0 V to 10.3 V, tR = 2µs. Shows Immunity to Ringing
Figure 5. bq24300 OVP Response for Input Step.
VIN 6.0 V to 11.0 V, tR = 5µs. Shows OVP Blanking Time
6
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Product Folder Link(s): bq24300 bq24304 bq24305
bq24300
bq24304
bq24305
www.ti.com ........................................................................................................................................................ SLUS764B–AUGUST 2007–REVISED JUNE 2008
TYPICAL OPERATING PERFORMANCE
V
< V
OVP
V
< V
V
< V
IN
IN
UVLO IN
O(REG)
V
IN
t
ON(OVP)
V
V
IN
OUT
V
OUT
Figure 6. OUT Pin Response to Slow Input Ramp
Figure 7. bq24300 Recovery from Input OVP.
VIN 11.0 V to 5.0 V, tF = 400 µs
R
= 22W
OUT
V
OUT
V
IN
R
= 13W
OUT
V
OUT
I
limited to 300mA
OUT
I
OUT
I
t
OUT
REC(OCP)
t
BLANK(OCP)
Figure 8. OCP, Powering up with OUT Pin Shorted to VSS
Figure 9. OCP, Showing Current Limiting and
OCP Blanking. ROUT 22Ω to 13Ω for 2.6 ms to 22Ω
R
= 22W
OUT
R
V
OUT
= 13W
OUT
V
OUT
I
OUT
I
limited to 300mA
BLANK(OCP)
OUT
I
OUT
t
Figure 10. OCP, Showing Current Limiting and
Figure 11. Zoom-in on Turn-off Region of Figure 10,
Showing Soft-Stop
OCP Blanking. ROUT 22Ω to 13Ω
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bq24300
bq24304
bq24305
SLUS764B–AUGUST 2007–REVISED JUNE 2008........................................................................................................................................................ www.ti.com
TYPICAL OPERATING PERFORMANCE (continued)
V
VBAT
t
DGL(BOVP)
V
OUT
Figure 12. Battery OVP. VVBAT Steps from 4.3 V to 4.5 V.
Shows tDGL(BOVP) and Soft-Stop
UNDERVOLTAGE LOCKOUT
vs
FREE-AIR TEMPERATURE
DROPOUT VOLTAGE (IN to OUT)
vs
FREE-AIR TEMPERATURE
2.75
2.7
80
70
VIN Increasing
2.65
60
50
40
bq24304, VIN = 4 V
2.6
bq24300, VIN = 5 V
2.55
2.5
VIN Decreasing
30
20
2.45
2.4
-50
-30
-10
10
30 50
Temperature - °C
70
90
110
130
0
50
100
150
Temperature - °C
Figure 13.
Figure 14.
REGULATION VOLTAGE (OUT pin)
vs
OVP THRESHOLD
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
10.6
5.53
5.52
4.53
10.55
10.5
4.52
bq24304
VIN Increasing
5.51
5.5
4.51
4.5
10.45
10.4
bq24300
10.35
10.3
VIN Decreasing
5.49
4.4
0
20
40
60
80
100
120
0
20
60
80
100
120
40
Temperature - °C
Temperature - °C
Figure 15.
Figure 16.
8
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bq24300
bq24304
bq24305
www.ti.com ........................................................................................................................................................ SLUS764B–AUGUST 2007–REVISED JUNE 2008
TYPICAL OPERATING PERFORMANCE (continued)
OCP THRESHOLD
vs
FREE-AIR TEMPERATURE
BATTERY OVP THRESHOLDS
vs
FREE-AIR TEMPERATURE
4.4
315
4.35
310
305
BVOVP (VVBAT Increasing)
4.3
4.25
300
295
4.2
4.15
290
285
4.1
Bat-OVP Recovery (VVBAT Decreasing)
4.05
-50
-30
-10
10
30
50
70
90
110
130
0
20
40
60
80
100
120
Temperature - °C
Temperature - °C
Figure 17.
Figure 18.
LEAKAGE CURRENT (BAT pin)
vs
FREE-AIR TEMPERATURE
SUPPLY CURRENT
vs
INPUT VOLTAGE
2.5
900
800
2
700
600
CE = L
1.5
500
400
1
300
200
CE = H
0.5
100
0
0
0
5
10
15
20
25
30
35
0
20
40
60
80
100
120
VIN - V
Temperature - °C
Figure 19.
Figure 20.
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bq24300
bq24304
bq24305
SLUS764B–AUGUST 2007–REVISED JUNE 2008........................................................................................................................................................ www.ti.com
TYPICAL OPERATING PERFORMANCE (continued)
PGATE VOLTAGE
vs
INPUT VOLTAGE
18
16
14
12
10
8
6
4
2
0
0
5
10
15
20
25
30
35
VIN - V
Figure 21.
10
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Product Folder Link(s): bq24300 bq24304 bq24305
bq24300
bq24304
bq24305
www.ti.com ........................................................................................................................................................ SLUS764B–AUGUST 2007–REVISED JUNE 2008
TYPICAL APPLICATION CIRCUITS
AC Adapter
1
8
6
VDC
GND
IN
OUT
COUT
1 μF
CIN
1 μF
bq24080
Charger IC
bq2430x
RBAT
SYSTEM
VBAT
100 KΩ
2
5
Figure 22. Overvoltage, Overcurrent, and Battery Overvoltage Protection
AC Adapter
VDC
QEXT
100 kW
1 μF
1
GND
IN
8
OUT
bq24080
Charger IC
PGATE
3
1 μF
bq2430x
100 kW
SYSTEM
VBAT
6
RBAT
47 kW
5
CE
RCE
2
Figure 23. OVP, OCP, BATOVP With Input Reverse-Polarity Protection
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bq24300
bq24304
bq24305
SLUS764B–AUGUST 2007–REVISED JUNE 2008........................................................................................................................................................ www.ti.com
DETAILED FUNCTIONAL DESCRIPTION
The bq24300 and bq24304 are highly integrated circuits designed to provide protection to Li-ion batteries from
failures of the charging circuit. The IC continuously monitors the input voltage, the input current and the battery
voltage, and protects down-stream circuitry from damage if any of these parameters exceeds safe values. The IC
also monitors its own die temperature and switches off if it becomes too hot.
The IC also offers optional protection against reverse voltage at the input with an external P-channel MOSFET.
POWER DOWN
The device remains in power down mode when the input voltage at the IN pin is below the under-voltage
threshold VUVLO. The FET Q1 (see Figure 1) connected between IN and OUT pins is off.
POWER-ON RESET
The device resets all internal timers when the input voltage at the IN pin exceeds the UVLO threshold. The gate
driver for the external P-FET is enabled. The IC then waits for duration tDGL(PGOOD) for the input voltage to
stabilize. If, after tDGL(PGOOD), the input voltage and battery voltage are safe, FET Q1 is turned ON. The IC has a
soft-start feature to control the inrush current. This soft-start minimizes voltage ringing at the input (the ringing
occurs because the parasitic inductance of the adapter cable and the input bypass capacitor form a resonant
circuit). Figure 2 shows the power-up behavior of the device. Because of the deglitch time at power-on, if the
input voltage rises rapidly to beyond the OVP threshold, the device will not switch on at all, as shown in Figure 3.
OPERATION
The device continuously monitors the input voltage, the input current and the battery voltage as described in
detail in the following sections:
Input Overvoltage Protection
As long as the input voltage is less than VO(REG), the output voltage tracks the input voltage (less the drop caused
by RDSON of Q1). If the input voltage is greater than VO(REG) (plus the RDSON drop) and less than VOVP, the
device acts like a series linear regulator, with the output voltage regulated to VO(REG). If the input voltage rises
above VOVP, the output voltage is clamped to VO(REG) for a blanking duration tBLANK(OVP). If the input voltage
returns below VOVP within tBLANK(OVP), the device continues normal operation (see Figure 4). This provides
protection against turning power off due to transient overvoltage spikes while still protecting the system.
However, if the input voltage remains above VOVP for more than tBLANK(OVP), the internal FET is turned off,
removing power from the circuit (see Figure 5). When the input voltage comes back to a safe value, the device
waits for tON(OVP) then switches on Q1 and goes through the soft-start routine (see Figure 7).
Figure 6 describes graphically the behavior of the OUT pin over the entire range of input voltage variation.
Input Overcurrent Protection
The device can supply load current up to IOCP continuously. If the load current tries to exceed this threshold, the
current is limited to IOCP for a maximum duration of tBLANK(OCP). If the load current returns to less than IOCP before
tBLANK(OCP) times out, the device continues to operate (see Figure 9). However, if the overcurrent situation
persists for tBLANK(OCP), FET Q1 is turned off for a duration of tREC(OCP). It is then turned on again and the current
is monitored all over again (see Figure 10 and Figure 8).
To prevent the input voltage from spiking up due to the inductance of the input cable, Q1 is not turned off rapidly
in an overcurrent fault condition. Instead, the gate drive of Q1 is reduced slowly, resulting in a “soft-stop”, as
shown in Figure 11.
Battery Overvoltage Protection
The battery overvoltage threshold BVOVP is internally set to 4.35V. If the battery voltage exceeds the BVOVP
threshold for longer than tDGL(BOVP), FET Q1 is turned off (see Figure 12). This switch-off is also a soft-stop. Q1 is
turned ON (soft-start) once the battery voltage drops to BVOVP – VHYS-BOVP
.
12
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bq24300
bq24304
bq24305
www.ti.com ........................................................................................................................................................ SLUS764B–AUGUST 2007–REVISED JUNE 2008
Thermal Protection
If the junction temperature of the device exceeds TJ(OFF), FET Q1 is turned off. The FET is turned back on when
the junction temperature falls below TJ(OFF) – TJ(OFF-HYS)
.
Enable Function
The IC has an enable pin which can be used to enable or disable the device. When the CE pin is driven high, the
internal FET is turned off. When the CE pin is low, the FET is turned on if other conditions are safe. The CE pin
has an internal pull-down resistor of 200 kΩ (typical) and can be left floating.
PGATE Pin
When used with an external P-Channel MOSFET, in addition to OVP, OCP and Battery-OVP, the device offers
protection against input reverse polarity up to –30V. When operating with normal polarity, the IC first turns on
due to current flow through the body-diode of the FET QEXT. The PGATE pin then goes low, turning ON QEXT
.
For input voltages larger than VGCLMP, the voltage on the PGATE pin is driven to VIN – VGCLMP. This ensures that
the gate to source voltage seen by QEXT does not exceed –VGCLMP
.
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Any State
If VIN < VUVLO,
go to Power Down
Power Down
All IC functions OFF
No
V
> V
?
IN
UVLO
Yes
Reset
Timers reset
Q1 off
Turn on PGATE
No
CE = Low ?
Yes
V
< V
?
Turn off Q1
IN
OVP
No
Yes
I < I
?
Wait t
REC(OCP)
Turn off Q1
OCP
No
Yes
V
< BV ?
OVP
Turn off Q1
VBAT
No
No
T
< T
?
Turn off Q1
J
J(OFF)
Yes
Turn on Q1
Figure 24. Flow Diagram
14
Submit Documentation Feedback
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): bq24300 bq24304 bq24305
bq24300
bq24304
bq24305
www.ti.com ........................................................................................................................................................ SLUS764B–AUGUST 2007–REVISED JUNE 2008
APPLICATION INFORMATION
Selection of RBAT
:
It is strongly recommended that the battery not be tied directly to the VBAT pin of the device, as under some
failure modes of the IC, the voltage at the IN pin may appear on the VBAT pin. This voltage can be as high as
30V, and applying 30V to the battery in case of the failure of the device can be hazardous. Connecting the VBAT
pin through RBAT prevents a large current from flowing into the battery in case of failure of the IC. In the interests
of safety, RBAT should have a very high value. The problem with a large RBAT is that the voltage drop across this
resistor because of the VBAT bias current IVBAT causes an error in the BVOVP threshold. This error is over and
above the tolerance on the nominal 4.35V BVOVP threshold.
Choosing RBAT in the range 100KΩ to 470kΩ is a good compromise. In the case of IC failure, with RBAT equal to
100kΩ, the maximum current flowing into the battery would be (30V – 3V) × 100kΩ = 246µA, which is low
enough to be absorbed by the bias currents of the system components. RBAT equal to 100kΩ would result in a
worst-case voltage drop of RBAT X IVBAT ≈ 1mV. This is negligible compared to the internal tolerance of 50mV on
the BVOVP threshold.
If the Bat-OVP function is not required, the VBAT pin should be connected to VSS.
Selection of RCE:
The CE pin can be used to enable and disable the IC. If host control is not required, the CE pin can be tied to
ground or left un-connected, permanently enabling the device.
In applications where external control is required, the CE pin can be controlled by a host processor. As in the
case of the VBAT pin (see above), the CE pin should be connected to the host GPIO pin through as large a
resistor as possible. The limitation on the resistor value is that the minimum VOH of the host GPIO pin less the
drop across the resistor should be greater than VIH of the bq2430x CE pin. The drop across the resistor is given
by RCE X IIH.
Selection of Input and Output Bypass Capacitors:
The input capacitor CIN in Figure 22 and Figure 23 is for decoupling, and serves an important purpose.
Whenever there is a step change downwards in the system load current, the inductance of the input cable
causes the input voltage to spike up. CIN prevents the input voltage from overshooting to dangerous levels. It is
strongly recommended that a ceramic capacitor of at least 1µF be used at the input of the device. It should be
located in close proximity to the IN pin.
COUT in Figure 23 is also important: If a very fast (< 1µs rise-time) overvoltage transient occurs at the input, the
current that charges COUT causes the device’s current-limiting loop to kick in, reducing the gate-drive to FET Q1.
This results in improved performance for input overvoltage protection. COUT should also be a ceramic capacitor of
at least 1µF, located close to the OUT pin. COUT also serves as the input decoupling capacitor for the charging
circuit downstream of the protection IC.
PCB Layout Guidelines:
1. This device is a protection device, and is meant to protect down-stream circuitry from hazardous voltages.
Potentially, high voltages may be applied to this IC. It has to be ensured that the edge-to-edge clearances of
PCB traces satisfy the design rules for the maximum voltages expected to be seen in the system.
2. The device uses SON packages with a PowerPAD™. For good thermal performance, the PowerPAD should
be thermally coupled with the PCB ground plane. In most applications, this will require a copper pad directly
under the IC. This copper pad should be connected to the ground plane with an array of thermal vias.
3. CIN and COUT should be located close to the IC. Other components like RBAT should also be located close to
the IC.
Copyright © 2007–2008, Texas Instruments Incorporated
Submit Documentation Feedback
15
Product Folder Link(s): bq24300 bq24304 bq24305
PACKAGE OPTION ADDENDUM
www.ti.com
11-Jul-2008
PACKAGING INFORMATION
Orderable Device
BQ24300DSGR
BQ24300DSGRG4
BQ24300DSGT
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SON
DSG
8
8
8
8
8
8
8
8
8
8
8
8
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SON
SON
SON
SON
SON
SON
SON
SON
SON
SON
SON
DSG
DSG
DSG
DSG
DSG
DSG
DSG
DSG
DSG
DSG
DSG
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
BQ24300DSGTG4
BQ24304DSGR
BQ24304DSGRG4
BQ24304DSGT
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
BQ24304DSGTG4
BQ24305DSGR
BQ24305DSGRG4
BQ24305DSGT
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
BQ24305DSGTG4
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Jul-2008
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Jun-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
BQ24300DSGR
BQ24300DSGT
BQ24304DSGR
BQ24304DSGT
BQ24305DSGR
BQ24305DSGT
SON
SON
SON
SON
SON
SON
DSG
DSG
DSG
DSG
DSG
DSG
8
8
8
8
8
8
3000
250
179.0
179.0
179.0
179.0
179.0
179.0
8.4
8.4
8.4
8.4
8.4
8.4
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
1.2
1.2
1.2
1.2
1.2
1.2
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
Q2
Q2
Q2
Q2
Q2
Q2
3000
250
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Jun-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
BQ24300DSGR
BQ24300DSGT
BQ24304DSGR
BQ24304DSGT
BQ24305DSGR
BQ24305DSGT
SON
SON
SON
SON
SON
SON
DSG
DSG
DSG
DSG
DSG
DSG
8
8
8
8
8
8
3000
250
195.0
195.0
195.0
195.0
195.0
195.0
200.0
200.0
200.0
200.0
200.0
200.0
45.0
45.0
45.0
45.0
45.0
45.0
3000
250
3000
250
Pack Materials-Page 2
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and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
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Products
Applications
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Automotive
Broadband
Digital Control
Medical
Amplifiers
Data Converters
DSP
Clocks and Timers
Interface
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
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Copyright © 2008, Texas Instruments Incorporated
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