BQ25071QWDQCTQ1 [TI]

汽车类单节电池、1A、磷酸铁锂电池线性充电器 | DQC | 10 | -40 to 125;
BQ25071QWDQCTQ1
型号: BQ25071QWDQCTQ1
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

汽车类单节电池、1A、磷酸铁锂电池线性充电器 | DQC | 10 | -40 to 125

电池 光电二极管
文件: 总23页 (文件大小:710K)
中文:  中文翻译
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bq25071-Q1  
ZHCSEY1 APRIL 2016  
bq25071-Q1 采用 50mA LDO 的汽车级 1A、单节 LiFePO4 线性电池充电  
1 特性  
3 说明  
1
适用于汽车电子 应用  
具有符合 AEC-Q100 标准的下列结果:  
bq25071-Q1 是一款高度集成的 LiFePO4 线性电池充  
电器,面向空间受限的汽车 应用。该器件由 USB 端口  
或交流适配器供电,并为单节 LiFePO4 电池提供高达  
1A 的充电电流。30V 的额定输入电压支持未经稳压的  
低成本适配器。  
器件温度 1 级:-40°C 125°C 的环境运行温  
度范围  
器件人体放电模式 (HBM) 静电放电 (ESD) 分类  
等级 H2  
bq25071-Q1 具有一个电源输出,可在对电池充电的同  
时为系统供电。输入电流既可通过 ISET 输入编程设定  
100mA 1A 范围内,也可以在 USB500 模式下配  
置。另外,IC 中还集成了一个 4.9V ±10% 50mA  
LDO,用于为低功耗外部电路供电。  
器件组件充电模式 (CDM) ESD 分类等级 C5  
单节 LiFePO4 充电算法  
30V 额定输入电压,具有 10.5V 过压保护 (OVP)  
50mA 集成低压降线性稳压器 (LDO)  
可编程充电电流(通过 ISET EN 端子编程)  
热调节和保护  
LiFePO4 充电算法可消除锂电池充电周期中所用的恒  
压模式控制下常见的电流逐渐减小过程,可大幅缩短充  
电时间。在这种情况下,电池将快速充电至过充电压,  
然后降至较低的浮充电压阈值。该充电器集成了具有充  
电电流和电压感应功能的功率级,可在电流和电压调节  
环路中获得高级别的精度。内部控制环路可在整个充电  
周期内监视 IC 结温,并在温度超过内部温度阈值时减  
小充电电流。  
软启动特性可降低浪涌电流  
电池负温度系数 (NTC) 监视  
充电状态指示  
具有可湿性侧面的 10 引脚小外形尺寸无引线  
(SON) (2mm × 3mm) 封装  
2 应用  
汽车用紧急呼叫  
器件信息 (1)  
汽车远程信息处理  
车辆全球定位系统 (GPS) 跟踪  
车载网络视频摄像机  
智能钥匙  
部件号  
封装  
封装尺寸(标称值)  
bq25071-Q1  
WSON (10)  
2.00mm x 3.00mm  
(1) 如需了解所有可用封装,请见数据表末尾的可订购产品附录。  
汽车娱乐备用电池  
应用电路原理图  
Pull-Up  
bq25071-Q1  
CHG  
STATUS  
VDD  
USB or TA  
VBUS  
GND  
D+  
IN  
OUT  
D-  
ABB  
EN  
BAT  
TS  
PACK+  
TEMP  
ISET  
GND  
PACK-  
VCHG DET  
USB DET  
LDO  
PWRPD  
VUSBIN  
ACDET  
GPIO  
Copyright © 2016, Texas Instruments Incorporated  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
English Data Sheet: SLUSCD6  
 
 
 
bq25071-Q1  
ZHCSEY1 APRIL 2016  
www.ti.com.cn  
目录  
8.2 Functional Block Diagram ....................................... 10  
8.3 Feature Description................................................. 11  
8.4 Device Functional Modes........................................ 13  
Application and Implementation ........................ 15  
9.1 Application Information............................................ 15  
9.2 Typical Application ................................................. 15  
9.3 System Examples ................................................... 17  
1
2
3
4
5
6
7
特性.......................................................................... 1  
应用.......................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
Device Comparison Table..................................... 3  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 4  
7.1 Absolute Maximum Ratings ..................................... 4  
7.2 ESD Ratings.............................................................. 4  
7.3 Recommended Operating Conditions....................... 4  
7.4 Thermal Information.................................................. 4  
7.5 Electrical Characteristics........................................... 5  
7.6 Timing Requirements................................................ 6  
7.7 Typical Characteristics.............................................. 7  
7.8 Typical Characteristics.............................................. 8  
Detailed Description .............................................. 9  
8.1 Overview ................................................................... 9  
9
10 Power Supply Recommendations ..................... 18  
11 Layout................................................................... 18  
11.1 Layout Guidelines ................................................. 18  
11.2 Layout Example .................................................... 18  
12 器件和文档支持 ..................................................... 19  
12.1 社区资源................................................................ 19  
12.2 ....................................................................... 19  
12.3 静电放电警告......................................................... 19  
12.4 Glossary................................................................ 19  
13 机械、封装和可订购信息....................................... 19  
8
4 修订历史记录  
日期  
修订版本  
注释  
2016 4 月  
*
最初发布版本。  
2
Copyright © 2016, Texas Instruments Incorporated  
 
bq25071-Q1  
www.ti.com.cn  
ZHCSEY1 APRIL 2016  
5 Device Comparison Table  
PART NUMBER  
bq25071QWDQCRQ1  
bq25071QWDQCTQ1  
VBAT(OVCH)  
3.7 V  
VBAT(FLOAT)  
3.5 V  
V(OVP)  
10.5 V  
10.5 V  
V(LDO)  
4.9 V  
4.9 V  
3.7 V  
3.5 V  
6 Pin Configuration and Functions  
DQC Package  
10-Pin WSON  
Top View  
IN  
ISET  
1
2
3
10  
9
OUT  
GND  
CHG  
8
GND  
LDO  
TS  
4
5
7
6
EN  
BAT  
Pin Functions  
PIN  
NAME  
I/O  
DESCRIPTION  
NO.  
Input power supply. IN is connected to the external DC supply (AC adapter or USB port). Bypass IN to GND  
with at least a 0.1 μF ceramic capacitor.  
IN  
1
I
Input current programming bias pin. Connect a resistor from ISET to GND to program the input current limit  
when the user programmable mode is selected by grounding the EN pin. The resistor range is between 1 kΩ  
and 10 kΩ to set the current between 100 mA and 1 A.  
ISET  
2
O
GND  
LDO  
3, 9  
4
Ground pin. Connect to the thermal pad and the ground plane of the circuit.  
LDO output. LDO is regulated to 4.9V and drives up to 50 mA. Bypass LDO to GND with a 0.1 μF ceramic  
O
capacitor. LDO is enabled when V(UVLO) < VIN < V(OVP)  
.
Battery pack NTC monitoring input. Connect a resistor divider from LDO to GND with TS connected to the  
center tap to set the charge temperature window. The battery pack NTC is connected in parallel with the  
bottom resistor of the divider. See the Detailed Design Procedure section for details on the selecting the  
proper component values.  
TS  
5
6
7
I
I
I
BAT  
EN  
BAT is the sense input for the battery voltage. Connect BAT and OUT to the battery.  
Enable input. Drive EN high to disable the IC. Connect EN to GND to place the bq25071-Q1Q in the user  
programmable mode using the ISET input where the input current is programmed. Leave EN floating to place  
the bq25071-Q1Q in USB500 mode. See the Input Current Limit Control (EN) section for details on using the  
EN interface.  
Charge status indicator open-drain output. CHG is pulled low while the device is charging the battery. CHG  
goes high impedance when the battery is fully charged.  
CHG  
OUT  
8
O
O
System output connection. Bypass the OUT to GND with a 1 μF ceramic capacitor. Connect OUT and BAT  
together.  
10  
There is an internal electrical connection between the exposed thermal pad and the GND pin of the device.  
The thermal pad must be connected to the same potential as the GND pin on the printed circuit board. Do not  
use the thermal pad as the primary ground input for the device. GND pin must be connected to ground at all  
times.  
Thermal  
Pad  
Pad  
Copyright © 2016, Texas Instruments Incorporated  
3
bq25071-Q1  
ZHCSEY1 APRIL 2016  
www.ti.com.cn  
7 Specifications  
(1)  
7.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)  
MIN  
–0.3  
–0.3  
–0.3  
MAX  
30  
UNIT  
V
IN (with respect to GND)  
Input Voltage  
EN, TS (with respect to GND)  
7
V
Output Voltage  
BAT, OUT, LDO, CHG, ISET (with respect to GND)  
7
V
Input Current (Continuous)  
Output Current (Continuous)  
Output Current (Continuous)  
Output Sink Current  
IN  
1.2  
1.2  
100  
5
A
BAT  
LDO  
CHG  
A
mA  
mA  
°C  
°C  
Junction temperature, TJ  
Storage temperature, TSTG  
–40  
–65  
150  
150  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage  
values are with respect to the network ground pin unless otherwise noted.  
7.2 ESD Ratings  
VALUE  
±3000  
±1000  
UNIT  
Human-body model (HBM), per aec q100-002(1)  
Charged-device model (CDM), per AEC Q100-011  
V(ESD)  
Electrostatic discharge  
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.  
7.3 Recommended Operating Conditions  
MIN  
MAX UNITS  
3.75  
VIN  
IIN  
IN operating voltage  
Input current, IN  
8
V
(1)  
1
1
A
A
IOUT Output Current in charge mode, OUT  
TJ Junction Temperature  
-40  
125  
°C  
(1) Charge current may be limited at low input voltages due to the dropout of the device.  
7.4 Thermal Information  
bq25071-Q1  
(1)  
THERMAL METRIC  
DQC (WSON)  
10 PINS  
61.6  
UNIT  
RθJA  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
RθJC(top)  
RθJB  
65.5  
22.8  
°C/W  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
1.5  
ψJB  
22.7  
RθJC(bot)  
5.5  
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.  
4
Copyright © 2016, Texas Instruments Incorporated  
bq25071-Q1  
www.ti.com.cn  
ZHCSEY1 APRIL 2016  
7.5 Electrical Characteristics  
Over junction temperature range–40°C TJ 125°C and recommended supply voltage (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNITS  
INPUT  
V(UVLO)  
Under-voltage lock-out  
Hysteresis on V(UVLO)  
VIN: 0 V 4 V  
3.15  
3.30  
300  
3.55  
V
VHYS(UVLO)  
VIN: 4 V 0 V  
mV  
Input power good if VIN > VBAT  
VIN(SLP)  
V(BAT) = 3.6 V, VIN: 3.5 V 4 V  
+
30  
24  
75  
55  
150  
95  
mV  
mV  
Valid input source threshold VIN(SLP) above  
VBAT  
VIN(SLP)  
Input power good if VIN > VBAT  
VIN(SLP)  
+
V(BAT) = 3.6 V, VIN: 4 V 3.5 V  
VHYS(INSLP)  
VOVP  
Hysteresis on VIN(SLP)  
V(BAT) = 3.6 V, VIN: 4 V 3.5 V  
VIN: 5 V 11 V  
32  
10.5  
100  
mV  
V
Input over-voltage protection threshold  
Hysteresis on OVP  
10.2  
10.8  
VHYS(OVP)  
VIN: 11 V 5 V  
mV  
QUIESCENT CURRENT  
IBAT(PDWN)  
Battery current into BAT, No input connected VIN = 0 V (1), V(CHG) = Low  
6
0.25  
0.5  
2
μA  
EN = HI, VIN = 5.5V  
IIN(STDBY)  
Standby current into IN pin  
EN = HI, VIN V(OVP)  
mA  
EN = HI, VIN > V(OVP)  
BATTERY CHARGER FAST-CHARGE  
TA = -40°C to 125°C, IOUT = 50 mA,  
VIN = 5 V  
3.455  
3.5 3.545  
3.5 3.539  
VBAT(REG)  
Battery charge regulation voltage  
V
TA = 25°C, VIN = 5 V, IOUT = 50 mA  
3.455  
3.55  
100  
VBAT(OVCH)  
IIN(RANGE)  
Battery overcharge voltage threshold  
3.7  
3.81  
1000  
500  
V
User programmable input current limit range  
R(ISET) = 1 kΩ to 1 0kΩ, EN = VSS  
EN = FLOAT  
mA  
435  
467  
IIN(LIM)  
Input current limit, or fast-charge current  
mA  
EN = VSS  
KISET/RISET  
R(ISET) = 1 kΩ to 10 kΩ, EN = VSS  
4.35 V < VIN 8 V  
,
,
860  
1000  
1000  
500  
1130  
1185  
900  
AΩ  
KISET  
Fast charge current factor TA 85°C  
R(ISET) = 1 kΩ to 10 kΩ, EN = VSS  
3.75 V < VIN 4.35 V  
815  
AΩ  
VDO(IN-OUT)  
VIN – VOUT  
VIN = 4.2 V, IOUT = 0.75 A  
mV  
ISET SHORT CIRCUIT PROTECTION  
R(ISET): 900 Ω → 300 Ω, IOUT latches  
RISET(MAX)  
Highest resistor value considered a short fault off, Cycle power to reset, Fault range >  
1.10 A  
720  
2
Ω
Maximum OUT current limit regulation  
(Clamp)  
IOUT(CL)  
1
A
PRE-CHARGE AND CHARGE DONE  
V(LOWV)  
Pre-charge to fast-charge transition threshold  
0.5  
0.7  
45  
0.9  
V
Precharge current to BAT during precharge  
mode  
I(PRECHARGE)  
V(BAT) = 0 V to 0.7 V  
V(BAT) falling  
41.5  
49.5  
mA  
RECHARGE OR REFRESH  
V(RCH)  
Recharge detection threshold hysteresis  
150  
200  
4.9  
350  
5.1  
mV  
V
LDO  
VIN = 5 V to 8 V,  
I(LDO) = 0 mA to 50 mA  
V(LDO)  
LDO Output Voltage  
4.7  
60  
I(LDO)  
V(DO)  
Maximum LDO Output Current  
Dropout Voltage  
mA  
mV  
VIN = 4.5V, I(LDO) = 50 mA  
200  
350  
(1) Force V(CHG)  
Copyright © 2016, Texas Instruments Incorporated  
5
bq25071-Q1  
ZHCSEY1 APRIL 2016  
www.ti.com.cn  
Electrical Characteristics (continued)  
Over junction temperature range–40°C TJ 125°C and recommended supply voltage (unless otherwise noted)  
PARAMETER  
LOGIC LEVELS ON EN  
TEST CONDITIONS  
MIN  
TYP  
MAX UNITS  
VIL  
Logic low input voltage  
Logic high input voltage  
Logic FLOAT input voltage  
0.4  
V
V
VIH  
1.4  
V(FLT)  
600  
850  
1100  
1
mV  
Maximum leakage sink or source current to  
keep in FLOAT  
I(FLTlkg)  
µA  
µA  
Minimal drive current from an external device  
for Low or High  
IEN(DRIVE)  
8
BATTERY-PACK NTC MONITOR (TS)  
V(COLD)  
V(CUTOFF)  
V(HOT)  
TS Cold Threshold  
V(TS) Rising  
23.6  
12  
25  
1
25.8 %VLDO  
%VLDO  
TS Cold Cutoff Threshold  
TS Hot Threshold  
V(TS) Falling  
V(TS) Falling  
V(TS) Rising  
12.5  
1
13.2 %VLDO  
%VLDO  
VHOT(HYS)  
CHG OUTPUT  
VOL  
TS Hot Cutoff Threshold  
Output LOW voltage  
Leakage current  
I(SINK) = 1 mA  
CHG = 5 V  
0.45  
1
V
IIH  
μA  
THERMAL REGULATION  
TJ(REG)  
Temperature Regulation Limit  
TJ rising  
TJ rising  
TJ falling  
125  
155  
20  
°C  
°C  
°C  
TJ(OFF)  
Thermal shutdown temperature  
Thermal shutdown hysteresis  
TJ(OFF-HYS)  
7.6 Timing Requirements  
MIN  
TYP  
MAX  
UNIT  
INPUT  
tBLK(OVP)  
Input overvoltage blanking time  
100  
100  
μs  
μs  
Time measured from VIN: 11 V 5 V  
1 μs fall-time to LDO = HI,  
V(BAT) = 3.5 V  
tREC(OVP)  
Input overvoltage recovery time  
Delay time, input power loss to  
charger turn-off  
Time measured from VIN: 5 V 2.5 V  
1 μs fall-time  
tDGL(NO-IN)  
32  
ms  
ms  
ISET SHORT CIRCUIT PROTECTION  
Deglitch time transition from I(SET)  
short to IOUT disable  
PRE-CHARGE AND CHARGE DONE  
Deglitch time on pre-charge to fast-  
tDGL(SHORT)  
Clear fault by cycling V(BUS) or EN  
1.5  
tDGL1(LOWV)  
25  
25  
ms  
ms  
charge transition  
Deglitch time on fast-charge to pre-  
charge transition  
tDGL2(LOWV)  
RECHARGE OR REFRESH  
Deglitch time, recharge threshold  
detected  
BATTERY-PACK NTC MONITOR (TS)  
tdgl(TS) Deglitch for TS Fault  
tDGL(RCH)  
V(BAT) falling to New Charge Cycle  
Fault detected on TS to stop charge  
25  
25  
ms  
ms  
6
Copyright © 2016, Texas Instruments Incorporated  
bq25071-Q1  
www.ti.com.cn  
ZHCSEY1 APRIL 2016  
7.7 Typical Characteristics  
VIN = 5 V, VBAT = 3.2 V, I (CHG) = 280 mA, Typical Application Circuit  
1.5  
1.4  
1.3  
4
3.5  
3
1.6  
1.4  
1.2  
1
1.2  
1.1  
1
V(BAT)  
V(CHG)  
I(BAT)  
2.5  
2
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.8  
0.6  
0.4  
0.2  
0
1.5  
1
0.5  
0
0:00:00  
0
1:12:00  
2:24:00 3:36:00  
Elapsed Time (hh:mm:ss)  
4:48:00  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature (°C)  
G007  
VIN = 4.5 V  
TA = –40°C to 125°C  
IOUT = 1 A  
Figure 1. Voltage and Current vs Elapsed Time  
Figure 2. Dropout Voltage vs Temperature  
3.55  
3.54  
3.53  
3.52  
3.51  
3.5  
10.6  
10.58  
10.56  
10.54  
10.52  
10.5  
3.49  
3.48  
3.47  
3.46  
3.45  
10.48  
10.46  
10.44  
10.42  
10.4  
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9  
Charge Current (A)  
1
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
G008  
Temperature (èC)  
D001  
TA = –40°C to 125°C  
Figure 3. Battery Regulation Voltage vs Charge Current  
Figure 4. OVP Threshold vs Temperature  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
1.1  
500 mA Current Limit  
1 A Current Limit  
100mA Current Limit  
500mA Current Limit  
1.05  
1
0.95  
0.9  
0.85  
0.8  
Thermal Regulation  
0.75  
0.7  
0.65  
0.6  
0.55  
0.5  
0.45  
0.4  
2.5  
2.75  
3
Battery Voltage (V)  
3.25  
3.5  
5
6
7
8
9
10  
G011  
Input Voltage (V)  
D102  
VIN = 5 V  
Figure 6. Input Current Limit vs Battery Voltage  
Figure 5. Charge Current vs Input Voltage  
Copyright © 2016, Texas Instruments Incorporated  
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bq25071-Q1  
ZHCSEY1 APRIL 2016  
www.ti.com.cn  
7.8 Typical Characteristics  
VBAT = 3.2 V, I (CHG) = 318 mA, Typical Application Circuit  
3.52  
3.5  
20  
-6 sigma  
-5 sigma  
Typical  
+5 sigma  
+6 sigma  
15  
10  
5
3.48  
3.46  
3.44  
3.42  
3.4  
0
-5  
-10  
-15  
3.5  
4
4.5  
5
5.5  
6
6.5  
7
7.5  
8
3.5  
4
4.5  
5
5.5  
6
6.5  
7
7.5  
8
Input Voltage (V)  
Input Voltage (V)  
D100  
D101  
Figure 7. Charge Current Accuracy vs Input Voltage  
Figure 8. Input Voltage vs Battery Charge Regulation  
Voltage  
8
Copyright © 2016, Texas Instruments Incorporated  
bq25071-Q1  
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ZHCSEY1 APRIL 2016  
8 Detailed Description  
8.1 Overview  
The bq25071-Q1 is a highly integrated, automotive qualified, linear, LiFePO4 battery charger targeted at space-  
limited automotive applications. It accepts power from either a USB port or AC adapter and charges a single-cell  
LiFePO4 battery with up to 1 A of charge current. The 30 V input rating with 10.5 V input overvoltage protection  
supports low-cost unregulated adapters.  
The bq25071-Q1 has a single power output that simultaneously charges the battery and powers the system. The  
input current is programmable from 100 mA up to 1 A using the ISET input or configurable for USB500. There is  
also a 4.9 V ±10% 50 mA LDO is integrated into the IC for supplying low power external circuitry.  
The LiFePO4 charging algorithm removes the constant voltage mode control typically used in Li-Ion battery  
charge cycles which reduces charge time significantly. Instead, the battery is fast charged to the overcharge  
voltage and then allowed to relax to a lower float charge voltage threshold. The charger power stage and charge  
current sense functions are fully integrated. The charger function has high accuracy current and voltage  
regulation loops, and charge status display. During the charge cycle, an internal control loop monitors the IC  
junction temperature and reduces the charge current if an internal temperature threshold is exceeded.  
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8.2 Functional Block Diagram  
[5h  
+
v2  
v1  
hÜÇ  
.!Ç  
Lb  
+
TJ(REG)  
TJ  
Charge Pump  
IIN(REG)  
+
1.5V  
+
VBAT(REG)  
L{9Ç  
VIN(SLP)  
L[La  
+
+
VIN  
VBAT  
VUVLO  
VIN  
UVLO Comparator  
Sleep Comparator  
+
+
VOVP  
VIN  
VBAT  
VBAT(REG)  
Overcharge Comparator  
OVP Comparator  
9b  
Ç{  
Charge Control  
/ID  
Status Output  
VLDO  
TS Cold  
+
Disable  
+
TS Hot  
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8.3 Feature Description  
8.3.1 Input Overvoltage Protection  
The bq25071-Q1 contains an input overvoltage protection circuit that disables the LDO output and charging  
when the input voltage rises above V(OVP). This prevents damage from faulty adapters. The OVP circuitry  
contains an 100 μs blanking period that prevents ringing on the input from line transients from tripping the OVP  
circuitry falsely. If an adapter with an output greater than V(OVP) is plugged in, the IC completes soft-start power  
up and then shuts down if the voltage remains above V(OVP) after 100 μs. The LDO remains off and charging  
remains disabled until the input voltage falls below V(OVP)  
.
8.3.2 Undervoltage Lockout (UVLO)  
The bq25071-Q1 remains in power down mode when the input voltage is below the undervoltage lockout  
threshold (V(UVLO)). During this mode, the control input (EN) is ignored. The LDO, the charge FET connected  
between IN and OUT are off and the status output (CHG) is high impedance. Once the input voltage rises above  
V(UVLO), the internal circuitry is turned on and the normal operating procedures are followed.  
8.3.3 External NTC Monitoring (TS)  
The bq25071-Q1 features a flexible, voltage based external battery pack temperature monitoring input. The TS  
input connects to the NTC thermistor in the battery pack to monitor battery temperature and prevent dangerous  
over-temperature conditions. During charging, the voltage at TS is continuously monitored. If the voltage at the  
TS pin is outside of the operating range (V(HOT) to V(COLD) for longer than the built in 25 ms deglitch time,  
charging is suspended. When the voltage measured at TS returns to within the operation window, charging  
resumes. When a battery pack temperature fault occurs charging is suspended, but the CHG output remains low  
and continues to indicate charging.  
The temperature thresholds are programmed using a resistor divider from LDO to GND with the NTC thermistor  
connected to the center tap from TS to GND. See Figure 9 for the circuit example. The value of R1 and R2 are  
calculated using the following equations:  
-R2 ´ RHOT ´ (0.125 - 1)  
R1 =  
0.125 ´ (R2 + RHOT)  
(1)  
-RHOT ´ RCOLD ´ (0.125 - 0.250)  
R2 =  
RHOT ´ 0.250 ´ (0.125 - 1) + RCOLD ´ 0.125 ´ (1 - 0.250)  
(2)  
RHOT is the expected thermistor resistance at the programmed hot threshold; RCOLD is the expected thermistor  
resistance at the programmed cold threshold.  
LDO  
R1  
VCOLD  
PACK+  
TS  
TEMP  
+
PACK-  
VHOT  
R2  
+
bq25071-Q1  
For applications that do not require the TS monitoring function, set R1 = 490 kΩ and R2 = 100 kΩ to set the TS  
voltage at a valid level and maintain charging.  
Figure 9. NTC Monitoring Function  
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Feature Description (continued)  
8.3.4 50-mA LDO (LDO)  
The LDO output of the bq25071-Q1 is a low dropout linear regulator (LDO) that supplies up to 50 mA while  
regulating to V(LDO). The LDO is active whenever the input voltage is above V(UVLO) and below V(OVP). It is not  
affected by the EN input. The LDO output is used to power and protect circuitry such as USB transceivers from  
transients on the input supply.  
8.3.5 Charge Status Indicator (CHG)  
The bq25071-Q1 contains an open drain CHG output that indicates charging state and faults. When charging a  
battery in precharge or fastcharge mode, the CHG output is pulled to GND. Once the BAT output reaches the  
overcharge voltage threshold, CHG goes high impedance to signal the battery is fully charged. When the battery  
voltage drops below the recharge voltage threshold the CHG output is pulled low to signal the host of a new  
charge cycle. Connect CHG to the required logic level voltage through a 1 kΩ to 100 kΩ resistor to use the signal  
with a microprocessor. I(CHG) must be below 5 mA.  
The IC monitors the CHG pin when no input is connected to verify if the system circuitry is active. If the voltage  
at CHG is logic being drive low when no input is connected, the TS circuit is turned off for a low quiescent current  
state. Once the voltage at CHG increases above logic high, the TS circuit is turned on.  
8.3.6 Input Current Limit Control (EN)  
The bq25071-Q1 contains a 3-state that controls the input current limit. Drive EN low to program the input current  
limit to the user defined value programmed using ISET. Drive EN high to place the bq25071-Q1 in USB suspend  
mode. In USB suspend mode, the input current into bq25071-Q1 is reduced. Leaving EN unconnected or  
connected to a high impedance source programs the USB500 input current limit.  
Table 1. EN Input Definition  
EN  
Low  
Hi-Z  
Hi  
MODE  
ISET  
USB500  
USB Suspend  
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8.4 Device Functional Modes  
8.4.1 Charging Operation  
The bq25071-Q1 uses a charge algorithm that is unique to LiFePO4 chemistry cells. The current taper typically  
seen as part of the constant voltage mode control usually present in Li-Ion battery charge cycles is replaced with  
a floating regulation voltage with minimal charging current. This dramatically decreases the charge time. When  
the bq25071-Q1 is enabled by EN, the battery voltage is monitored to verify which stage of charging must be  
used. When V(BAT) < V(LOWV), the bq25071-Q1 charges in precharge mode; when V(BAT) > V(LOWV), the normal  
charge cycle is used.  
8.4.1.1 Charger Operation with Minimum System Voltage Mode Enabled  
Constant Current  
Fast Charge  
Float-Voltage  
Regulation  
PRECHARGE  
VOUT(OVCH)  
VOUT(REG)  
IFASTCHG  
CHG = Hi-Z  
Battery and  
Output  
Voltage  
VLOWV  
Battery  
Current  
IPRECHG  
Figure 10. Typical Charging Cycle with Minimum System Voltage Enabled  
8.4.1.2 Precharge Mode (V(BAT) V(LOWV)  
)
The bq25071-Q1 enters precharge mode when VBAT V(LOWV). Upon entering precharge mode, the battery is  
charged with a 47.5 mA current and CHG goes low.  
8.4.1.3 Fast Charge Mode  
Once V(BAT) > V(LOWV), the bq25071-Q1 enters constant current (CC) mode where charge current is regulated  
using the internal MOSFETs between IN and OUT. The total current is shared between the output load and the  
battery. Once the battery voltage charges up to VBAT(OVCH), the CHG output goes high indicating the charge cycle  
is complete and the bq25071-Q1 switches the battery regulation voltage to VBAT(REG). The battery voltage is  
allowed to relax down to VBAT(REG). The charger remains enabled and regulates the output to VBAT(REG). If at any  
time the battery falls below V(RCH), the charge cycle restarts.  
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Device Functional Modes (continued)  
8.4.2 Programmable Input Current Limit (ISET)  
When the charger is enabled, and the user programmable current limit is selected by the EN input, internal  
circuits generate a current proportional to the input current at the ISET input. The current out of ISET is 1/1000  
(±10%) of the charge current. This current, when applied to the external charge current programming resistor, R1  
( Figure 11), generates an analog voltage that is regulated to program the fast charge current. Connect a resistor  
from ISET to GND to program the input current limit using the following equation:  
K(ISET)  
1000A ´W  
I(IN_LIM)  
=
=
R(ISET)  
R(ISET)  
(3)  
I(IN_LIM) is programmable from 100 mA to 1 A. The voltage at ISET can be monitored by an external host to  
calculate the charging current to the battery. The input current is related to the ISET voltage using the following  
equation:  
1000  
´
I
= V  
IN  
(ISET)  
R(ISET)  
(4)  
Monitoring the ISET voltage allows for the host to calculate the actual charging current and therefore perform  
more accurate termination. The input current to the system must be monitored and subtracted from the current  
into the bq25071-Q1 which is show by V(ISET)  
.
8.4.3 Sleep Mode  
If the IN pin voltage is between V(UVLO) and V(BAT)+ VIN(SLP), the charge current is disabled, the safety timer  
counting stops (not reset) and the CHG pin is high impedance. As the input voltage rises and the charger exits  
sleep mode, the safety timer continues to count, charge is enabled and the CHG pin returns to its previous state.  
8.4.4 Thermal Regulation and Thermal Shutdown  
The bq25071-Q1 contains a thermal regulation loop that monitors the die temperature continuously. If the  
temperature exceeds TJ(REG), the device automatically reduces the charging current to prevent the die  
temperature from increasing further. In some cases, the die temperature continues to rise despite the operation  
of the thermal loop, particularly under high VIN conditions. If the die temperature increases to TJ(OFF), the IC is  
turned off. Once the device die temperature cools by TJ(OFF-HYS), the device turns on and returns to thermal  
regulation. Continuous overtemperature conditions result in the pulsing of the load current. If the junction  
temperature of the device exceeds TJ(OFF), the charge FET is turned off. The FET is turned back on when the  
junction temperature falls below TJ(OFF) – TJ(OFF-HYS)  
.
Note that these features monitor the die temperature of the bq25071-Q1. This is not synonymous with ambient  
temperature. Self heating exists due to the power dissipated in the IC because of the linear nature of the battery  
charging algorithm.  
14  
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9 Application and Implementation  
NOTE  
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
9.1 Application Information  
The typical application circuit uses a single output which charges the battery and powers the system. Additionally  
a 50-mA LDO can supply a low power external circuit.  
The bq25071EVM-658 evaluation module (EVM) is a complete charger module for evaluating the bq25071-Q1.  
Refer to SLUUB49.  
9.2 Typical Application  
V
GPIO  
R2  
100 kW  
bq25071-Q1  
STATUS  
VDD  
USB or TA  
CHG  
OUT  
VBUS  
GND  
D+  
IN  
C1  
0.1 mF  
C2  
1 mF  
D-  
ABB  
EN  
BAT  
TS  
PACK+  
TEMP  
ISET  
GND  
R1  
1 kW  
PACK-  
VCHG DET  
USB DET  
LDO  
PWRPD  
C2  
0.1 mF  
R5  
1.5 kW  
R3  
1.5 kW  
VUSBIN  
ACDET  
R4  
1.5 kW  
GPIO  
Copyright © 2016, Texas Instruments Incorporated  
Figure 11. bq25071-Q1 Typical Application Circuit  
9.2.1 Design Requirements  
Table 2. Design Parameters  
PARAMETER  
EXAMPLE VALUE  
5 V ±5%  
Input supply range  
Output voltage range  
Output current rating  
3.5 V  
1000 mA  
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9.2.2 Detailed Design Procedure  
9.2.2.1 Selection of Input and Output Capacitors  
In most applications, all that is needed is a high-frequency decoupling capacitor on the input power pin. For  
normal charging applications, a 0.1 μF ceramic capacitor, placed in close proximity to the IN pin and GND pad  
works best. In some applications, depending on the power supply characteristics and cable length, it may be  
necessary to increase the input filter capacitor to avoid exceeding the OVP voltage threshold during adapter hot  
plug events where the ringing exceeds the deglitch time.  
The charger in the bq25071-Q1 requires a capacitor from OUT to GND for loop stability. Connect a 1 μF ceramic  
capacitor from OUT to GND close to the pins for best results. More output capacitance may be required to  
minimize the output drop during large load transients.  
The LDO also requires an output capacitor for loop stability. Connect a 0.1 μF ceramic capacitor from LDO to  
GND close to the pins. For improved transient response, this capacitor may be increased.  
9.2.2.2 Thermal Considerations  
The bq25071-Q1 is packaged in a thermally enhanced QFN package. The package includes a thermal pad to  
provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB design  
guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment Application  
Note (SLUA271).  
The most common measure of package thermal performance is thermal impedance (θJA) measured (or modeled)  
from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for θJA  
is:  
Where:  
T
- T  
A
J
q
=
JA  
P
D
(5)  
TJ = chip junction temperature  
TA = ambient temperature  
PD = device power dissipation  
Factors that can greatly influence the measurement and calculation of θJA include:  
Whether or not the device is board mounted  
Trace size, composition, thickness, and geometry  
Orientation of the device (horizontal or vertical)  
Volume of the ambient air surrounding the device under test and airflow  
Whether other surfaces are in close proximity to the device being tested  
The device power dissipation, PD, is a function of the charge rate and the voltage drop across the internal  
PowerFET. It can be calculated from the following equation when a battery pack is being charged:  
PD = (VIN – VOUT) × IOUT  
Due to the charge profile of LiFePO4 batteries the maximum power dissipation is typically seen at the beginning  
of the charge cycle when the battery voltage is at its lowest. See the charging profile, Figure 10. If the board  
thermal design is not adequate the programmed fast charge rate current may not be achieved under maximum  
input voltage and minimum battery voltage, as the thermal loop can be active, effectively reducing the charge  
current to avoid excessive IC junction temperature.  
16  
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9.2.3 Application Curves  
5V/div  
V(CTRL)  
V(LDO)  
IOUT  
5V/div  
5V/div  
VIN  
5V/div  
V(LDO)  
200mA/div  
200mA/div  
2V/div  
IOUT  
2V/div  
V(CHG)  
V(CHG)  
10ms/div  
20ms/div  
V(CTRL) = 0 V  
Figure 13. Charger Enable Using EN  
Figure 12. Adapter Plug-In With Battery Connected  
5V/div  
5V/div  
V(CTRL)  
5V/div  
5V/div  
V(LDO)  
VIN  
V(LDO)  
200mA/div  
IOUT  
1A/div  
2V/div  
IOUT  
2V/div  
V(CHG)  
V(CHG)  
400μs/div  
40μs/div  
VIN = 5 V to 12 V  
Figure 14. Charger Disable Using EN  
Figure 15. OVP Fault  
9.3 System Examples  
R1  
D1  
0.1mF  
USB or Adapter  
CHG  
OUT  
VBUS  
GND  
D+  
IN  
C4  
C3  
C2  
22 mF  
C2  
1 mF  
1 mF  
0.1mF  
D-  
bq25071-Q1  
U1  
EN  
BAT  
TS  
PACK+  
TEMP  
R3  
R4  
11.3kW  
24.3kW  
ISET  
GND  
R2  
1 kW  
PACK-  
LDO  
PWRPD  
C5  
0.1mF  
Copyright © 2016, Texas Instruments Incorporated  
Figure 16. Schematic  
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10 Power Supply Recommendations  
In a typical application, the system is powered by a USB port or USB wall adapter.  
The wide input voltage range supports low cost and unregulated adapters.  
The minimum input voltage - where the charging process starts with a reduced charging current - could be 3.75  
V when the battery voltage is below 3.5 V. The minimum input voltage can be up to 3.875 V when the battery is  
close to be fully charged (Please refer to the Sleep Mode) or there is no battery presented. The maximum  
recommended operating input voltage is up to 8 V; the overvoltage protection kicks in at 10.5 V and the  
maximum input voltage rating is 30 V Input Rating.  
11 Layout  
11.1 Layout Guidelines  
It is important to pay special attention to the PCB layout. The following provides some guidelines:  
To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter  
capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq25071-Q1, with  
short trace runs to both IN, OUT and GND (thermal pad).  
All low-current GND connections should be kept separate from the high-current charge or discharge paths  
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the  
power ground path.  
The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum  
charge current in order to avoid voltage drops in these traces.  
The bq25071-Q1 is packaged in a thermally enhanced SON package. The package includes a thermal pad to  
provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is  
also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full  
PCB design guidelines for this package are provided in the application note entitled: QFN/SON PCB  
Attachment Application Note (SLUA271).  
11.2 Layout Example  
The bottom plane is a ground plane that is connected to the top through vias.  
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12 器件和文档支持  
12.1 社区资源  
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective  
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of  
Use.  
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration  
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help  
solve problems with fellow engineers.  
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and  
contact information for technical support.  
12.2 商标  
E2E is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
12.3 静电放电警告  
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损  
伤。  
12.4 Glossary  
SLYZ022 TI Glossary.  
This glossary lists and explains terms, acronyms, and definitions.  
13 机械、封装和可订购信息  
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对  
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本,请查阅左侧的导航栏。  
版权 © 2016, Texas Instruments Incorporated  
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只有那些 TI 特别注明属于军用等级或增强型塑料TI 组件才是设计或专门用于军事/航空应用或环境的。购买者认可并同 意,对并非指定面  
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接口  
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www.ti.com.cn/medical  
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Copyright © 2016, 德州仪器半导体技术(上海)有限公司  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
BQ25071QWDQCRQ1  
BQ25071QWDQCTQ1  
ACTIVE  
ACTIVE  
WSON  
WSON  
DQC  
DQC  
10  
10  
3000 RoHS & Green  
250 RoHS & Green  
SN  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
-40 to 125  
-40 to 125  
11V  
11V  
SN  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
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Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
重要声明和免责声明  
TI 均以原样提供技术性及可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资  
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所述资源可供专业开发人员应用TI 产品进行设计使用。您将对以下行为独自承担全部责任:(1) 针对您的应用选择合适的TI 产品;(2) 设计、  
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邮寄地址:上海市浦东新区世纪大道 1568 号中建大厦 32 楼,邮政编码:200122  
Copyright © 2020 德州仪器半导体技术(上海)有限公司  

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