BQ27220 [TI]
具有预编程化学成分的单节电池组/系统侧 CEDV 电池电量监测计;
| 型号： | BQ27220 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有预编程化学成分的单节电池组/系统侧 CEDV 电池电量监测计 电池 |
| 文件： | 总25页 (文件大小：793K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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bq27220
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
bq27220 单节 CEDV 电量监测计
1 特性
3 说明
1
•
单节串联锂离子电池电量监测计
德州仪器 (TI) bq27220 电池电量监测计是一款单节电
池电量监测计，只需进行少量用户配置和系统微控制器
固件开发工作即可快速实现系统调通。 bq27220 器件
采用补偿放电结束电压 (CEDV) 算法进行电量检测，
可提供诸如剩余电量 (mAh)、充电状态 (%)、续航时间
（分钟）、电池电压 (mV)、温度 (°C) 和健康状况 (%)
等信息。
–
–
–
–
驻留在电池组或系统主板上
支持嵌入式或可拆除电池
由集成低压降稳压器 (LDO) 的电池直接供电
支持低值 (10mΩ) 外部感测电阻
•
•
超低功耗：正常模式下为 50µA，休眠模式下为
9µA
基于补偿放电结束电压 (CEDV) 技术的电池电量监
测
bq27220 电池电量监测计在正常模式 (50μA) 和休眠模
式 (9μA) 下均具有超低功耗，有助于延长电池运行时
间。可配置中断有助于节省系统功耗，释放主机使其停
止继续轮询。外部热敏电阻为精确温度感测提供支持。
–
–
用平滑滤波器报告剩余电量和充电状态 (SOC)
针对电池老化、自放电以及温度和速率变化进行
自动调节
–
提供电池健康（老化）状况的估计
客户可以使用 ROM 中预载的 CEDV 参数，或者使用
通过 TI 网络工具 GAUGEPARCAL 生成的定制化学参
数。生成的定制参数可在系统上电时通过主机编程到器
件 RAM 中，客户也可以将该参数编程到板载一次性可
编程 (OTP) 存储器中。
•
微控制器外设支持：
–
–
400kHz I2C™串行接口
可配置的 SOC 中断或
电池低电量数字输出警告
–
内部温度传感器、
主机报告的温度或
外部热敏电阻
通过 bq27220 器件进行电池电量监测时，只需将
PACK+ (P+) 与 PACK- (P-) 连接至可拆卸电池组或嵌
入式电池电路即可。微型 9 焊球、1.62mm ×
1.58mm、间距为 0.5mm 的 NanoFree™芯片级封装
(DSBGA)，是空间受限类应用的 理想选择。
2 应用
•
•
•
•
•
•
•
智能手机和功能手机
平板电脑
器件信息(1)
可穿戴产品
器件型号
bq27220
封装
封装尺寸（标称值）
楼宇自动化
YZF (9)
1.62mm x 1.58mm
便携式医疗/工业手持终端
便携式音频设备
游戏机
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
简化电路原理图（系统侧）
SRN
SRP
SCL
VSYS
2
I C
Bus
Coulomb
Counter
SDA
CPU
Battery Pack
GPOUT
B
AT
PACKP
T
ADC
Li-Ion
Cell
BIN
Protection
IC
VDD
1 µF
2.2 µF
1.8 V
LDO
PACKN
VSS
NFET NFET
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLUSCB7
bq27220
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
www.ti.com.cn
目录
6.13 Typical Characteristics............................................ 8
Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information.................................................. 5
6.5 Supply Current .......................................................... 5
6.6 Digital Input and Output DC Characteristics............. 5
7
7.2 Functional Block Diagram (System-Side
Configuration)............................................................. 9
7.3 Feature Description................................................... 9
7.4 Device Functional Modes........................................ 11
Application and Implementation ........................ 12
8.1 Application Information............................................ 12
8.2 Typical Applications ................................................ 12
Power Supply Recommendation........................ 15
9.1 Power Supply Decoupling....................................... 15
8
9
10 Layout................................................................... 15
10.1 Layout Guidelines ................................................. 15
10.2 Layout Example .................................................... 16
11 器件和文档支持 ..................................................... 17
11.1 文档支持................................................................ 17
11.2 社区资源................................................................ 17
11.3 商标....................................................................... 17
11.4 静电放电警告......................................................... 17
11.5 Glossary................................................................ 17
12 机械、封装和可订购信息....................................... 17
6.7 LDO Regulator, Wake-up, and Auto-Shutdown DC
Characteristics ........................................................... 6
6.8 LDO Regulator, Wake-up, and Auto-shutdown AC
Characteristics ........................................................... 6
6.9 ADC (Temperature and Cell Measurement)
Characteristics ........................................................... 6
6.10 Integrating ADC (Coulomb Counter) Characteristics
................................................................................... 6
6.11 I2C-Compatible Interface Communication Timing
Characteristics ........................................................... 7
6.12 SHUTDOWN and WAKE-UP Timing ...................... 8
4 修订历史记录
日期
修订版本
注释
2016 年 4 月
A
“产品预览”至“量产数据”
2
Copyright © 2016, Texas Instruments Incorporated
bq27220
www.ti.com.cn
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
5 Pin Configuration and Functions
Top View
3
2
1
C
B
A
Bottom View
1
2
3
C
B
A
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
BAT
NUMBER
LDO regulator input and battery voltage measurement input. Kelvin sense connect to the positive
battery terminal (PACKP). Connect a capacitor (1 µF) between BAT and VSS. Place the capacitor
close to the gauge.
C3
PI, AI(1)
Battery insertion detection input. If OpConfig [BI_PU_EN] = 1 (default), a logic low on the pin is
detected as battery insertion. For a removable pack, the BIN pin can be connected to VSS
through a pulldown resistor on the pack, typically the 10-kΩ thermistor; the system board should
use a 1.8-MΩ pullup resistor to VDD to ensure the BIN pin is high when a battery is removed. If
the battery is embedded in the system or in the pack, it is recommended to leave [BI_PU_EN] =
1 and use a 10-kΩ pulldown resistor from BIN to VSS. If [BI_PU_EN] = 0, then the host must
inform the gauge of battery insertion and removal with the BAT_INSERT and BAT_REMOVE
subcommands. A 10-kΩ pulldown resistor should be placed between BIN and VSS, even if this
pin is unused.
BIN
B1
DI
NOTE: The BIN pin must not be shorted directly to VCC or VSS and any pullup resistor on the BIN
pin must be connected only to VDD and not an external voltage rail. If an external thermistor is
used for temperature input, the thermistor should be connected between this pin and VSS
.
(1) IO = Digital input-output, AI = Analog input, P = Power connection
Copyright © 2016, Texas Instruments Incorporated
3
bq27220
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
www.ti.com.cn
Pin Functions (continued)
PIN
TYPE
DESCRIPTION
NAME
NUMBER
This open-drain output can be configured to indicate BAT_LOW when the OpConfig
[BATLOWEN] bit is set. By default [BATLOWEN] is cleared and this pin performs an interrupt
function (SOC_INT) by pulsing for specific events, such as a change in state-of-charge. Signal
polarity for these functions is controlled by the [GPIOPOL] configuration bit. This pin should not
be left floating, even if unused; therefore, a 10-kΩ pullup resistor is recommended. If the device
is in SHUTDOWN mode, toggling GPOUT makes the gauge exit SHUTDOWN. It is
recommended to connect GPOUT to a GPIO of the host MCU so that in case of any inadvertent
shutdown condition, the gauge can be commanded to come out of SHUTDOWN.
GPOUT
A1
DO
SCL
SDA
SRN
A3
A2
C2
DIO
DIO
AI
Slave I2C serial bus for communication with system (Master). Open-drain pins. Use with external
10-kΩ pullup resistors (typical) for each pin. If the external pullup resistors will be disconnected
from these pins during normal operation, recommend using external 1-MΩ pulldown resistors to
VSS at each pin to avoid floating inputs.
Coulomb counter differential inputs expecting an external 10-mΩ, 1% sense resistor. For system-
side configurations, Kelvin sense connect SRP to the positive battery terminal (PACKP) side of
the external sense resistor. Kelvin sense connect SRN to the other side of the external sense
resistor with the positive connection to the system (VSYS). For pack-side configurations with low-
side sensing, connect SRP to PACK– and SRN to Cell–. See the Simplified Schematic.
No calibration is required. The fuel gauge is pre-calibrated for a standard 10-mΩ, 1% sense
resistor.
SRP
C1
AI
1.8-V regulator output. Decouple with a 2.2-μF ceramic capacitor to VSS. This pin is not intended
to provide power for other devices in the system.
VDD
VSS
B3
B2
PO
PI
Ground pin
6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
MAX
UNIT
V
VBAT
VSR
BAT pin input voltage range
6
SRP and SRN pins input voltage range
Differential voltage across SRP and SRN. ABS(SRP – SRN)
VDD pin supply voltage range (LDO output)
Open-drain IO pins (SDA, SCL)
VBAT + 0.3
V
2
V
VDD
VIOD
VIOPP
TA
–0.3
–0.3
–0.3
–40
–65
2
6
V
V
Push-pull IO pins (BIN)
VDD + 0.3
85
V
Operating free-air temperature range
°C
°C
Storage temperature, Tstg
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
±1500
±250
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
Electrostatic
discharge
V(ESD)
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
4
Copyright © 2016, Texas Instruments Incorporated
bq27220
www.ti.com.cn
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
6.3 Recommended Operating Conditions
TA = 30°C and VBAT = 3.6 V (unless otherwise noted)
MIN
NOM
MAX
UNIT
External input capacitor for internal LDO
between BAT and VSS
(1)
CBAT
0.1
μF
Nominal capacitor values specified.
Recommend a 5% ceramic X5R-type
capacitor located close to the device.
External output capacitor for internal LDO
between VDD and VSS
(1)
CLDO18
2.2
μF
External pullup voltage for open-drain
pins (SDA, SCL, GPOUT)
(1)
VPU
1.62
3.6
V
(1) Specified by design. Not production tested.
6.4 Thermal Information
bq27220
THERMAL METRIC(1)
YZF (DSBGA)
9 PINS
64.1
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJCtop
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
59.8
52.7
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.3
ψJB
28.3
RθJCbot
2.4
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953
6.5 Supply Current
TA = 30°C and VBAT = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
ILOAD > Sleep Current(2)
ILOAD < Sleep Current(2)
MIN
TYP
50
9
MAX
UNIT
μA
(1)
ICC
NORMAL mode current
SLEEP mode current
(1)
ISLP
μA
Fuel gauge in host commanded
SHUTDOWN mode.
(1)
ISD
SHUTDOWN mode current
0.6
μA
(LDO regulator output disabled)
(1) Specified by design. Not production tested.
(2) Wake Comparator Disabled.
6.6 Digital Input and Output DC Characteristics
TA = –40°C to 85°C, typical values at TA = 30°C and VBAT = 3.6 V (unless otherwise noted)(Force Note1)(1)
PARAMETER
Input voltage, high(2)
TEST CONDITIONS
MIN
VPU × 0.7
1.4
TYP
MAX
UNIT
V
VIH(OD)
VIH(PP)
VIL
External pullup resistor to VPU
(3)
Input voltage, high
V
Input voltage, low(2) (3)
Output voltage, low(2)
Output source current, high(2)
Output sink current, low(2)
Input capacitance(2)(3)
0.6
0.6
0.5
–3
5
V
VOL
V
IOH
mA
mA
pF
IOL(OD)
(1)
CIN
Input leakage current
(SCL, SDA, BIN, GPOUT)
Ilkg
1
μA
(1) Specified by design. Not production tested.
(2) Open Drain pins: (SCL, SDA, GPOUT)
(3) Push-Pull pin: (BIN)
Copyright © 2016, Texas Instruments Incorporated
5
bq27220
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
www.ti.com.cn
6.7 LDO Regulator, Wake-up, and Auto-Shutdown DC Characteristics
TA = –40°C to 85°C, typical values at TA = 30°C and VBAT = 3.6 V (unless otherwise noted)(Force Note1)(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
4.5
UNIT
V
VBAT
VDD
BAT pin regulator input
Regulator output voltage
2.45
1.85
2
V
VBAT undervoltage lock-out
LDO wake-up rising threshold
UVLOIT+
UVLOIT–
V
V
V
VBAT undervoltage lock-out
LDO auto-shutdown falling threshold
1.95
GPOUT (input) LDO Wake-up rising LDO Wake-up from SHUTDOWN
edge threshold(2)
mode
(1)
VWU+
1.2
(1) Specified by design. Not production tested.
(2) If the device is commanded to SHUTDOWN via I2C with VBAT > UVLOIT+, a wake-up rising edge trigger is required on GPOUT.
6.8 LDO Regulator, Wake-up, and Auto-shutdown AC Characteristics
TA = –40°C to 85°C, typical values at TA = 30°C and VBAT = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Time delay from SHUTDOWN
command to LDO output disable.
(1)
(1)
tSHDN
tSHUP
SHUTDOWN entry time
250
ms
Minimum low time of GPOUT (input)
in SHUTDOWN before WAKEUP
SHUTDOWN GPOUT low time
Initial VDD output delay
10
μs
(1)
tVDD
13
8
ms
Time delay from rising edge of
GPOUT (input) to nominal VDD
output.
(1)
tWUVDD
Wake-up VDD output delay
ms
ms
Time delay from rising edge of BAT
to the Active state. Includes
firmware initialization time.
tPUCD
Power-up communication delay
250
(1) Specified by design. Not production tested.
6.9 ADC (Temperature and Cell Measurement) Characteristics
TA = –40°C to 85°C; typical values at TA = 30°C and VBAT = 3.6 V (unless otherwise noted) (Force Note1)(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIN(BAT)
BAT pin voltage measurement
range
Voltage divider enabled
2.45
4.5
V
tADC_CONV Conversion time
Effective resolution
125
15
ms
bits
(1) Specified by design. Not tested in production.
6.10 Integrating ADC (Coulomb Counter) Characteristics
TA = –40°C to 85°C; typical values at TA = 30°C and VBAT = 3.6 V (unless otherwise noted)(Force Note1)(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Input voltage range of SRN, SRP
pins
VSRCM
VSS
VBAT
V
Input differential voltage range of
VSRP–VSRN
VSRDM
± 80
mV
tSR_CONV
Conversion time
Single conversion
Single conversion
1
s
Effective Resolution
16
bits
(1) Specified by design. Not tested in production.
6
Copyright © 2016, Texas Instruments Incorporated
bq27220
www.ti.com.cn
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
6.11 I2C-Compatible Interface Communication Timing Characteristics
TA = –40°C to 85°C; typical values at TA = 30°C and VBAT = 3.6 V (unless otherwise noted) (Force Note1)(1)
MIN
NOM
MAX
UNIT
Standard Mode (100 kHz)
td(STA) Start to first falling edge of SCL
tw(L)
4
4.7
4
μs
μs
μs
μs
ns
ns
μs
SCL pulse duration (low)
SCL pulse duration (high)
Setup for repeated start
Data setup time
tw(H)
tsu(STA)
tsu(DAT)
th(DAT)
tsu(STOP)
t(BUF)
4.7
250
0
Host drives SDA
Host drives SDA
Data hold time
Setup time for stop
4
Bus free time between stop and
start
Includes Command Waiting Time
66
μs
tf
SCL or SDA fall time(1)
SCL or SDA rise time(1)
Clock frequency(2)
300
300
100
ns
ns
tr
fSCL
kHz
Fast Mode (400 kHz)
td(STA) Start to first falling edge of SCL
tw(L)
600
1300
600
600
100
0
ns
ns
ns
ns
ns
ns
ns
SCL pulse duration (low)
SCL pulse duration (high)
Setup for repeated start
Data setup time
tw(H)
tsu(STA)
tsu(DAT)
th(DAT)
tsu(STOP)
t(BUF)
Host drives SDA
Host drives SDA
Data hold time
Setup time for stop
600
Bus free time between stop and
start
Includes Command Waiting Time
66
μs
tf
SCL or SDA fall time(1)
SCL or SDA rise time(1)
Clock frequency(2)
300
300
400
ns
ns
tr
fSCL
kHz
(1) Specified by design. Not production tested.
(2) If the clock frequency (fSCL) is > 100 kHz, use 1-byte write commands for proper operation. All other transactions types are supported at
400 kHz. (See I2C Interface and I2C Command Waiting Time.)
t
t
t
t
t
f
t
r
(BUF)
SU(STA)
w(H)
w(L)
SCL
SDA
t
t
t
d(STA)
su(STOP)
f
t
r
t
t
su(DAT)
h(DAT)
REPEATED
START
STOP
START
Figure 1. I2C-Compatible Interface Timing Diagram
Copyright © 2016, Texas Instruments Incorporated
7
bq27220
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
www.ti.com.cn
6.12 SHUTDOWN and WAKE-UP Timing
tPUCD
tSHUP
tPUCD
tVDD
tSHDN
tWUVDD
BAT
VDD
2
_
SHUTDOWN
ENABLE
I C Bus
SHUTDOWN
*
GPOUT
Off
WAKE-UP
Active
SHUTDOWN
WAKE-UP
Active
State
* GPOUT is configured as an input for wake-up signaling.
Figure 2. SHUTDOWN and WAKE-UP Timing Diagram
6.13 Typical Characteristics
0.6%
0.5%
0.4%
0.3%
0.2%
0.1%
0
0.45%
0.4%
0.35%
0.3%
0.25%
0.2%
0.15%
0.1%
0.05%
0
-0.1%
-50
0
50
100
-60
-40
-20
0
20
40
60
80
100
Temperature (èC)
Temperature (èC)
D001
D002
Figure 3. Current Accuracy Error vs. Temperature
Figure 4. Voltage Accuracy Error vs. Temperature
0
-1%
-2%
-3%
-4%
-5%
-6%
-50
0
50
100
Temperature (èC)
D003
Figure 5. Internal Temperature Accuracy Error vs. Temperature
8
Copyright © 2016, Texas Instruments Incorporated
bq27220
www.ti.com.cn
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
7 Detailed Description
7.1 Overview
The bq27220 fuel gauge accurately predicts the battery capacity and other operational characteristics of a single
Li-based rechargeable cell. It can be interrogated by a system processor to provide cell information such as
state-of-charge (SoC). The bq27220 monitors charge and discharge activity by sensing the voltage across a
small value resistor (10 mΩ typical) between the SRP and SRN pins and in series with the battery. By integrating
charge passing through the battery, the battery’s SOC is adjusted during battery charge or discharge.
The fuel gauging is derived from the Compensated End of Discharge Voltage (CEDV) method, which uses a
mathematical model to correlate remaining state of charge (RSOC) and voltage near to the end of discharge
state. This requires a full discharge cycle for a single point FCC update. The implementation models cell voltage
(OCV) as a function of battery state of charge (SOC), temperature, and current. The impedance is also a function
of SOC and temperature, all of which can be satisfied by using seven parameters: EMF, C0, R0, T0, R1, TC, C1.
NOTE
The following formatting conventions are used in this document:
Commands: italics with parentheses() and no breaking spaces, for example, Control().
Data Flash: italics, bold, and breaking spaces, for example, Design Capacity.
Register bits and flags: italics with brackets [ ], for example, [TDA]
Data flash bits: italics, bold, and brackets [ ], for example, [LED1]
Modes and states: ALL CAPITALS, for example, UNSEALED mode.
7.2 Functional Block Diagram (System-Side Configuration)
SRN
SCL
SDA
VSYS
2
I C
Bus
Coulomb
Counter
SRP
CPU
Battery Pack
GPOUT
B
AT
PACKP
T
ADC
Li-Ion
Cell
BIN
Protection
IC
VDD
1 µF
2.2 µF
1.8 V
LDO
PACKN
VSS
NFET NFET
7.3 Feature Description
Information is accessed through a series of commands called Standard Commands. Further capabilities are
provided by the additional Extended Commands set. Both sets of commands, indicated by the general format
Command), are used to read and write information within the control and status registers, as well as its data
locations. Commands are sent from the system to the gauge using the I2C serial communications engine, and
can be executed during application development, system manufacture, or end-equipment operation.
The fuel gauge measures the charging and discharging of the battery by monitoring the voltage across a small-
value sense resistor. When a cell is attached to the fuel gauge, cell impedance is computed based on cell
current, cell open-circuit voltage (OCV), and cell voltage under loading conditions.
The fuel gauge uses an integrated temperature sensor for estimating cell temperature. Alternatively, the host
processor can provide temperature data for the fuel gauge.
Copyright © 2016, Texas Instruments Incorporated
9
bq27220
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
www.ti.com.cn
Feature Description (continued)
For more details, see the bq27220 Technical Reference Manual (SLUUBD4).
The external temperature sensing is optimized with the use of a high accuracy negative temperature coefficient
(NTC) thermistor with R25 = 10.0 kΩ ±1%. B25/85 = 3435K ± 1% (such as Semitec NTC 103AT) on the BIN pin.
Alternatively, the bq27220 can also be configured to use its internal temperature sensor or receive temperature
data from the host processor. The bq27220 uses temperature to monitor the battery-pack environment, which is
used for fuel gauging and cell protection functionality.
7.3.1 Communications
7.3.1.1 I2C Interface
The fuel gauge supports the standard I2C read, incremental read, quick read, one-byte write, and incremental
write functions. The 7-bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as
1010101. The first 8 bits of the I2C protocol are, therefore, 0xAA or 0xAB for write or read, respectively.
Host generated
ADDR[6:0] 0 A
Gauge generated
S
CMD[7:0]
(a) 1-byte write
A
DATA [7:0]
A
P
S
ADDR[6:0]
1
A
DATA [7:0]
(b) quick read
DATA [7:0]
N P
S
ADDR[6:0] 0 A
CMD[7:0]
A
Sr
ADDR[6:0]
1
A
N P
(c) 1- byte read
S
ADDR[6:0] 0 A
CMD[7:0]
A
Sr
ADDR[6:0]
1
A
DATA [7:0]
A
A
. . .
DATA [7:0]
A . . . A P
N P
(d) incremental read
S
ADDR[6:0] 0 A
CMD[7:0]
A
DATA [7:0]
DATA [7:0]
(e) incremental write
(S = Start, Sr = Repeated Start, A = Acknowledge, N = No Acknowledge , and P = Stop).
Figure 6. I2C Interface Read and Write Functions
The quick read returns data at the address indicated by the address pointer. The address pointer, a register
internal to the I2C communication engine, increments whenever data is acknowledged by the fuel gauge or the
I2C master. “Quick writes” function in the same manner and are a convenient means of sending multiple bytes to
consecutive command locations (such as two-byte commands that require two bytes of data).
The following command sequences are not supported:
Figure 7. Attempt to Write a Read-Only Address (NACK After Data Sent By Master)
Figure 8. Attempt to Read an Address Above 0x6B (NACK Command)
7.3.1.2 I2C Time Out
The I2C engine releases both SDA and SCL if the I2C bus is held low for 2 seconds. If the fuel gauge is holding
the lines, releasing them frees them for the master to drive the lines. If an external condition is holding either of
the lines low, the I2C engine enters the low-power SLEEP mode.
10
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ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
Feature Description (continued)
7.3.1.3 I2C Command Waiting Time
To ensure proper operation at 400 kHz, a t(BUF) ≥ 66 μs bus-free waiting time must be inserted between all
packets addressed to the fuel gauge. In addition, if the SCL clock frequency (fSCL) is > 100 kHz, use individual 1-
byte write commands for proper data flow control. Figure 9 shows the standard waiting time required between
issuing the control subcommand the reading the status result. For read-write standard commands, a minimum of
2 seconds is required to get the result updated. For read-only standard commands, there is no waiting time
required, but the host must not issue any standard command more than two times per second. Otherwise, the
gauge could result in a reset issue due to the expiration of the watchdog timer.
S
S
S
ADDR [6:0] 0 A
ADDR [6:0] 0 A
ADDR [6:0] 0 A
CMD [7:0]
CMD [7:0]
CMD [7:0]
A
A
A
DATA [7:0]
DATA [7:0]
ADDR [6:0]
A
A
P
P
66ms
66ms
Sr
1
A
DATA [7:0]
A
DATA [7:0]
N P
66ms
Waiting time inserted between two 1-byte write packets for a subcommand and reading results
(required for 100 kHz < fSCL £ 400 kHz)
S
S
ADDR [6:0] 0 A
ADDR [6:0] 0 A
CMD [7:0]
CMD [7:0]
A
A
DATA [7:0]
ADDR [6:0]
A
DATA [7:0]
DATA [7:0]
A
P
66ms
DATA [7:0]
Sr
1
A
A
N P
66ms
Waiting time inserted between incremental 2-byte write packet for a subcommand and reading results
(acceptable for fSCL £ 100 kHz)
S
ADDR [6:0] 0 A
DATA [7:0]
CMD [7:0]
DATA [7:0]
A
Sr
ADDR [6:0]
66ms
1
A
DATA [7:0]
A
DATA [7:0]
A
A
N P
Waiting time inserted after incremental read
Figure 9. Standard Waiting Time
7.3.1.4 I2C Clock Stretching
A clock stretch can occur during all modes of fuel gauge operation. In SLEEP mode, a short ≤ 100-µs clock
stretch occurs on all I2C traffic as the device must wake-up to process the packet. In the other modes
(INITIALIZATION, NORMAL), a ≤ 4-ms clock stretching period may occur within packets addressed for the fuel
gauge as the I2C interface performs normal data flow control.
7.4 Device Functional Modes
To minimize power consumption, the fuel gauge has several power modes: INITIALIZATION, NORMAL, and
SLEEP. The fuel gauge passes automatically between these modes, depending upon the occurrence of specific
events, though a system processor can initiate some of these modes directly. For more details, see the bq27220
Technical Reference Manual (SLUUBD4).
Copyright © 2016, Texas Instruments Incorporated
11
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ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
www.ti.com.cn
8 Application and Implementation
NOTE
Information in the following application section is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The bq27220 fuel gauge is a microcontroller peripheral that provides system-side or pack-side fuel gauging for
single-cell Li-Ion batteries. The device requires minimal configuration and uses One-Time Programmable (OTP)
Non-Volatile Memory (NVM). Battery fuel gauging with the fuel gauge requires connections only to PACK+ and
PACK– for a removable battery pack or embedded battery circuit. To allow for optimal performance in the end
application, special considerations must be taken to ensure minimization of measurement error through proper
printed circuit board (PCB) board layout. Such requirements are detailed in Design Requirements.
8.2 Typical Applications
Ext VCC
EXT_VCC
GND
TP4
EXT_VCC
J3
VDD
VDD
J4
R2
1.8 Meg
PGND
EXT_VCC
BIN
JP1
JP2
EXT_VCC
R3
5.1k
J2
R4 R5
10.0k 10.0k
GPOUT
GPOUT
J1
4
SDA
3
2
1
SDA
SCL
SCL
VSS
U1
VDD
TP5
C3
B3
BAT
VDD
VDD
C1
0.47 µF 2.2 µF
PGND
A3
A2
C1
C2
SCL
SDA
SRP
SRN
C3
Recommended to be connected
to a GPIO on the host.
A1
B1
GPOUT
BIN
GPOUT
BIN
B2
VSS
PGND PGND
Cell+
TP1
J6
Load+
TP2
Pack+
PGND
Cell+
1
2
3
Charger+
BIN
BIN
Cell–
J5
C2
1 µF
R8
10.0k
Load-
TP3
J7
Charger-
Pack+
R1
0.01
PGND
Figure 10. Typical Application for Pack-Side Using Low-Side Sensing
8.2.1 Design Requirements
As shipped from the Texas Instruments factory, many bq27220 parameters in OTP NVM are left in the
unprogrammed state (zero). This partially programmed configuration facilitates customization for each end
application. Upon device reset, the contents of OTP are copied to associated volatile RAM-based data memory
blocks. For proper operation, all parameters in RAM-based data memory require initialization — either by
updating data memory parameters in a lab/evaluation situation or by programming the OTP for customer
production. The bq27220 Technical Reference Manual (SLUUBD4) shows the default value and a typically
expected value appropriate for most of applications.
12
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ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
Typical Applications (continued)
8.2.2 Detailed Design Procedure
8.2.2.1 BAT Voltage Sense Input
A ceramic capacitor at the input to the BAT pin is used to bypass AC voltage ripple to ground, greatly reducing
its influence on battery voltage measurements. It proves most effective in applications with load profiles that
exhibit high-frequency current pulses (that is, cell phones) but is recommended for use in all applications to
reduce noise on this sensitive high-impedance measurement node.
8.2.2.2 Integrated LDO Capacitor
The fuel gauge has an integrated LDO with an output on the VDD pin of approximately 1.8 V. A capacitor with a
value of at least 2.2 μF should be connected between the VDD pin and VSS. The capacitor must be placed close
to the gauge IC and have short traces to both the VDD pin and VSS. This regulator must not be used to provide
power for other devices in the system.
8.2.2.3 Sense Resistor Selection
Any variation encountered in the resistance present between the SRP and SRN pins of the fuel gauge will affect
the resulting differential voltage, and derived current, that it senses. As such, it is recommended to select a
sense resistor with minimal tolerance and temperature coefficient of resistance (TCR) characteristics. The
standard recommendation based on the best compromise between performance and price is a 1% tolerance, 50-
ppm drift sense resistor with a 1-W power rating.
8.2.3 External Thermistor Support
The fuel gauge temperature sensing circuitry is designed to work with a negative temperature coefficient-type
(NTC) thermistor with a characteristic 10-kΩ resistance at room temperature (25°C). The default curve-fitting
coefficients configured in the fuel gauge specifically assume a Semitec 103AT type thermistor profile and so that
is the default recommendation for thermistor selection purposes. Moving to a separate thermistor resistance
profile (for example, JT-2 or others) requires an update to the default thermistor coefficients, which can be
modified in RAM to ensure highest accuracy temperature measurement performance.
Copyright © 2016, Texas Instruments Incorporated
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ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
www.ti.com.cn
Typical Applications (continued)
8.2.4 Application Curves
0.6%
0.5%
0.4%
0.3%
0.2%
0.1%
0
0.45%
0.4%
0.35%
0.3%
0.25%
0.2%
0.15%
0.1%
0.05%
0
-0.1%
-50
0
50
100
-60
-40
-20
0
20
40
60
80
100
Temperature (èC)
Temperature (èC)
D001
D002
Figure 11. Current Accuracy Error vs. Temperature
Figure 12. Voltage Accuracy Error vs. Temperature
0
-1%
-2%
-3%
-4%
-5%
-6%
-50
0
50
100
Temperature (èC)
D003
Figure 13. Internal Temperature Accuracy Error vs. Temperature
14
Copyright © 2016, Texas Instruments Incorporated
bq27220
www.ti.com.cn
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
9 Power Supply Recommendation
9.1 Power Supply Decoupling
The battery connection on the BAT pin is used for two purposes:
•
•
To supply power to the fuel gauge, and
To provide an input for voltage measurement of the battery.
A capacitor of value of at least 1 µF should be connected between BAT and VSS. The capacitor must be placed
close to the gauge IC and have short traces to both the BAT pin and VSS
.
The fuel gauge has an integrated LDO with an output on the VDD pin of approximately 1.8 V. A capacitor of value
of at least 2.2 µF should be connected between the VDD pin and VSS. The capacitor must be placed close to the
gauge IC and have short traces to both the VDD pin and VSS. This regulator must not be used to provide power
for other devices in the system.
10 Layout
10.1 Layout Guidelines
•
•
•
•
A capacitor of value of at least 2.2 µF is connected between the VDD pin and VSS. The capacitor must be
placed close to the gauge IC and have short traces to both the VDD pin and VSS. This regulator must not be
used to provide power for other devices in the system.
It is required to have a capacitor of at least 1.0 µF connect between the BAT pin and VSS if the connection
between the battery pack and the gauge BAT pin has the potential to pick up noise. The capacitor should be
placed close to the gauge IC and have short traces to both the BAT pin and VSS
.
If the external pullup resistors on the SCL and SDA lines will be disconnected from the host during low-power
operation, it is recommended to use external 1-MΩ pulldown resistors to VSS to avoid floating inputs to the I2C
engine.
The value of the SCL and SDA pullup resistors should take into consideration the pullup voltage and the bus
capacitance. Some recommended values, assuming a bus capacitance of 10 pF, can be seen in Table 1.
Table 1. Recommended Values for SCL and SDA Pullup Resistors
VPU
1.8 V
3.3 V
Range
400 Ω ≤ RPU ≤ 37.6 kΩ
Typical
Range
900 Ω ≤ RPU ≤ 29.2 kΩ
Typical
RPU
10 kΩ
5.1 kΩ
•
•
If the host is not using the GPOUT functionality, then it is recommended that GPOUT be connected to a
GPIO of the host so that in the cases where the device is in SHUTDOWN, toggling GPOUT can wake the
gauge from the SHUTDOWN state.
If the battery pack thermistor is not connected to the BIN pin, the BIN pin should be pulled down to VSS with a
10-kΩ resistor.
•
•
•
The BIN pin should not be shorted directly to VDD or VSS
The actual device ground is pin B2 (VSS).
.
The SRP and SRN pins should be Kelvin connected to the RSENSE terminals. SRP to the battery pack side of
RSENSE and SRN to the system side of the RSENSE
Kelvin connect the BAT pin to the battery PACKP terminal.
.
•
Copyright © 2016, Texas Instruments Incorporated
15
bq27220
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
www.ti.com.cn
10.2 Layout Example
Kelvin connect SRP
and SRN connections
right at Rsense
terminals
RSENSE
VSYSTEM
If battery pack’s
thermistor will not be
connected to BIN pin, a
10-kΩ pulldown resistor
should be connected to
the BIN pin.
VDD
BAT
Battery Pack
PACK+
TS
CBAT
The BIN pin should not be
shorted directly to VDD or
RBIN
Li-Ion
Cell
VSS.
+
VDD
Vpullup( do not pull to gauge VDD)
CVDD
RTHERM
Protection
IC
Place close to
gauge IC. Trace
to pin and VSS
should be short
SCL
PACK-
RSDA
RSCL
RGPOUT
NFET
NFET
SCL
Via connects to Power Ground
SDA
GPOUT
Figure 14. EVM Board Layout
16
版权 © 2016, Texas Instruments Incorporated
bq27220
www.ti.com.cn
ZHCSEX1A –MARCH 2016–REVISED APRIL 2016
11 器件和文档支持
11.1 文档支持
11.1.1 相关文档ꢀ
•
•
•
•
•
《bq27220 技术参考》手册（文献编号：SLUUBD4）
《bq27220 快速入门指南》（文献编号：SLUUAP7）
《单节电池电量监测计电路设计》(SLUA456)
《bq27500 和 bq27501 主要设计注意事项》(SLUA439)
《手持式电池电子产品中的 ESD 和 RF 迁移》(SLUA460)
11.2 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 商标
NanoFree, E2E are trademarks of Texas Instruments.
I2C is a trademark of NXP Semiconductors, N.V.
All other trademarks are the property of their respective owners.
11.4 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2016, Texas Instruments Incorporated
17
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
BQ27220YZFR
BQ27220YZFT
ACTIVE
ACTIVE
DSBGA
DSBGA
YZF
YZF
9
9
3000 RoHS & Green
250 RoHS & Green
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
BQ27220
BQ27220
SNAGCU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Jun-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BQ27220YZFR
BQ27220YZFT
DSBGA
DSBGA
YZF
YZF
9
9
3000
250
180.0
180.0
8.4
8.4
1.78
1.78
1.78
1.78
0.69
0.69
4.0
4.0
8.0
8.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Jun-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
BQ27220YZFR
BQ27220YZFT
DSBGA
DSBGA
YZF
YZF
9
9
3000
250
182.0
182.0
182.0
182.0
20.0
20.0
Pack Materials-Page 2
PACKAGE OUTLINE
YZF0009
DSBGA - 0.625 mm max height
SCALE 8.000
DIE SIZE BALL GRID ARRAY
A
B
E
BALL A1
CORNER
D
C
0.625 MAX
SEATING PLANE
0.05 C
BALL TYP
0.35
0.15
1 TYP
SYMM
C
1
TYP
SYMM
B
A
D: Max = 1.651 mm, Min = 1.59 mm
E: Max = 1.61 mm, Min = 1.55 mm
0.5
TYP
3
1
2
0.35
0.25
9X
0.015
0.5 TYP
C A B
4219558/A 10/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
YZF0009
DSBGA - 0.625 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
9X ( 0.245)
(0.5) TYP
1
2
3
A
SYMM
B
C
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 40X
0.05 MIN
0.05 MAX
METAL UNDER
SOLDER MASK
(
0.245)
METAL
(
0.245)
EXPOSED
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4219558/A 10/2018
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
See Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).
www.ti.com
EXAMPLE STENCIL DESIGN
YZF0009
DSBGA - 0.625 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
(R0.05) TYP
3
9X ( 0.25)
1
2
A
B
(0.5) TYP
SYMM
METAL
TYP
C
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE: 40X
4219558/A 10/2018
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
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