BQ27Z561YPHR-R2 [TI]

适用于 1 节锂离子电池组的 Impedance track 电池电量监测计解决方案 | YPH | 12 | -40 to 85;
BQ27Z561YPHR-R2
型号: BQ27Z561YPHR-R2
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

适用于 1 节锂离子电池组的 Impedance track 电池电量监测计解决方案 | YPH | 12 | -40 to 85

电池
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中文:  中文翻译
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BQ27Z561-R2  
ZHCSKS9B FEBRUARY 2020 REVISED NOVEMBER 2022  
适用1 芯锂离子电池组的  
BQ27Z561-R2 Impedance Track™ 电池电量监测计解决方案  
1 特性  
3 说明  
• 支持低1mΩ高侧和低侧电流检测电阻  
• 支持电池组侧监测包括增强型健康状(SOH) 算  
• 基于预测OCV 的快QMax 更新选项  
SHA-256 认证响应器用于提高电池组安全性  
• 精密的充电算法  
德州仪器 (TI) BQ27Z561-R2 Impedance Track电量  
监测计解决方案是一个高度集成的高精度单芯电池电量  
监测计有闪存可编程的定制精简指令集 CPU  
(RISC) 和锂离子和锂聚合物电池SHA-256 认证。单  
节电池包括并联电芯可提高容量。  
BQ27Z561-R2 电量监测计通过 I2C 兼容接口和 HDQ  
单线接口进行通信并具有几个可帮助简化准确电量监  
测的关键功能。通过集成的温度检测功能内部和外部  
选项),可实现系统和电池温度测量。  
JEITA  
– 增强型充电  
RSOC() 充电补偿选项  
• 两个独立ADC  
器件信息  
– 支持电流和电压同步采样  
– 高精度库伦计数器输入失调电压误< 1µV  
典型值)  
器件型号(1)  
BQ27Z561  
BQ27Z561-R2  
封装尺寸标称值)  
封装  
DSBGA (12)  
1.67mm × 2.05mm  
• 低电(2V) 运行  
• 宽量程电流应用1mA 5A)  
• 高电平有效或者低脉冲或电平中断引脚  
• 支持电池跳闸(BTP)  
(1) 如需了解所有可用封装请参阅数据表末尾的可订购产品附  
录。  
= Recommended for IEC ESD  
1
• 节能模式典型电池组运行范围条件)  
= Optional alternate connection  
2
Highside Protection  
PACKP  
– 典型睡眠模式< 11μA  
– 典型深度睡眠模式< 9μA  
– 典型休眠模式< 3μA  
C5  
0.1 F  
1
R1  
10 ꢀ  
1
C4  
0.1 F  
BAT  
C1  
1.0 uF  
PACKN  
R2  
1 Kꢀ  
1
BAT_SNS  
1
INT  
INT  
– 典型关断模式< 1.9μA  
CELLP  
Li-Ion  
Cell  
R2  
1 Kꢀ  
• 内部和外部温度检测功能  
PULS  
CE  
TS  
PULS  
CE  
2
R9  
100 ꢀ  
• 诊断使用寿命数据监控器和黑盒记录器  
• 适用于高速编程和数据访问400kHz I2C 总线通  
信接口  
SCL  
C2  
0.1 F  
SCL  
SDA  
CELLN  
RT1  
103AT  
SDA/HDQ  
R8  
100 ꢀ  
VSS  
SRP  
SRN  
GND  
C3  
0.1 F  
• 用于主机通信的单线HDQ  
• 紧凑12 DSBGA (YPH)  
R3  
1mœ  
10mꢀ  
Lowside Protection  
PACKN  
2 应用  
简化原理图  
智能手机  
数码相机视频摄像机  
平板电脑计算  
便携式和可佩戴式健康设备  
便携式音频设备  
本文档旨在为方便起见提供有TI 产品中文版本的信息以确认产品的概要。有关适用的官方英文版本的最新信息请访问  
www.ti.com其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前请务必参考最新版本的英文版本。  
English Data Sheet: SLUSE22  
 
 
 
 
BQ27Z561-R2  
ZHCSKS9B FEBRUARY 2020 REVISED NOVEMBER 2022  
www.ti.com.cn  
Table of Contents  
1 特性................................................................................... 1  
2 应用................................................................................... 1  
3 说明................................................................................... 1  
4 Revision History.............................................................. 2  
5 说明.........................................................................3  
6 Pin Configuration and Functions...................................3  
7 Specifications.................................................................. 4  
7.1 Absolute Maximum Ratings........................................ 4  
7.2 ESD Ratings............................................................... 4  
7.3 Recommended Operating Conditions.........................4  
7.4 Thermal Information....................................................5  
7.5 Supply Current............................................................5  
7.6 Internal 1.8-V LDO (REG18).......................................5  
7.7 I/O (PULS, INT)...........................................................5  
7.8 Chip Enable (CE)........................................................5  
7.9 Internal Temperature Sensor...................................... 6  
7.10 NTC Thermistor Measurement Support....................6  
7.11 Coulomb Counter (CC)............................................. 6  
7.12 Analog Digital Converter (ADC)................................6  
7.13 Internal Oscillator Specifications...............................7  
7.14 Voltage Reference1 (REF1)......................................7  
7.15 Voltage Reference2 (REF2)......................................7  
7.16 Flash Memory........................................................... 7  
7.17 I2C I/O....................................................................... 7  
7.18 I2C Timing 100 kHz.............................................. 8  
7.19 I2C Timing 400 kHz.............................................. 8  
7.20 HDQ Timing.............................................................. 8  
7.21 Typical Characteristics............................................10  
8 Detailed Description......................................................11  
8.1 Overview................................................................... 11  
8.2 Functional Block Diagram......................................... 11  
8.3 Feature Description...................................................11  
8.4 Device Functional Modes..........................................13  
9 Applications and Implementation................................14  
9.1 Application Information............................................. 15  
9.2 Typical Applications.................................................. 15  
9.3 Power Supply Recommendations.............................18  
9.4 Layout....................................................................... 18  
10 Device and Documentation Support..........................20  
10.1 Device Support....................................................... 20  
10.2 Documentation Support.......................................... 20  
10.3 Receiving Notification of Documentation Updates..20  
10.4 支持资源..................................................................20  
10.5 Trademarks.............................................................20  
10.6 Electrostatic Discharge Caution..............................20  
10.7 术语表..................................................................... 20  
11 Mechanical, Packaging, and Orderable  
Information.................................................................... 20  
4 Revision History  
以前版本的页码可能与当前版本的页码不同  
Changes from Revision A (November 2021) to Revision B (November 2022)  
Page  
Removed the CE reference in this section; added a new, separate section for CE........................................... 5  
Added the Chip Enable (CE) section for the CE pin thresholds that are assured by design..............................5  
Changes from Revision * (February 2020) to Revision A (November 2021)  
Page  
• 更改了器件信息中的封装尺寸.............................................................................................................................1  
Copyright © 2022 Texas Instruments Incorporated  
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BQ27Z561-R2  
ZHCSKS9B FEBRUARY 2020 REVISED NOVEMBER 2022  
www.ti.com.cn  
5 说明)  
集成SHA-256 功能有助于在系统和电池组之间实现安全识别。借助中断BTP 功能BQ27Z561-R2 器件可在  
发生特定充电状态 (SOC)、电压或温度故障时通知系统。通过低电压运行即使在深度放电情况下系统也能够  
持续监控电池的状态。在低活跃度情况下可以将此器件设置为低功耗库伦计(CC) 模式从而在显著减小工作  
电流的情况下继续进行库伦计数。  
6 Pin Configuration and Functions  
1
2
3
D
C
B
A
SRP  
BAT  
CE  
SRN  
TS  
BAT_SNS  
NU  
VSS  
SCL  
INT  
PULS  
SDA/HDQ  
Not to scale  
6-1. Pin Diagram  
6-1. Pin Functions  
PIN  
TYPE(1)  
DESCRIPTION  
NAME  
BAT  
NO.  
Battery voltage measurement input. Kelvin battery sense connection to BAT_SNS. Connect a  
capacitor (1 µF) between BAT and VSS. Place the capacitor close to the gauge.  
D2  
P
CE  
D3  
C2  
A1  
A2  
B1  
C3  
I
Active-high chip enable  
BAT_SNS  
INT  
AI  
O
Battery sense  
Interrupt for voltage, temperature, and state of charge (programmable active high or low)  
Programmable pulse width with active-high or -low option  
Temperature input for ADC  
PULS  
TS  
O
AI  
NC  
NU  
Makes no external connection  
Serial clock for I2C interface that requires an external pullup when used. It can be left floating if  
unused.  
SCL  
SDA/HDQ  
SRP  
B3  
A3  
D1  
I/O  
I/O  
I
Serial data for I2C interface and one-wire interface for HDQ (selectable) that requires an external  
pullup when used. It can be left floating if unused.  
Analog input pin connected to the internal coulomb counter peripheral for integrating a small  
voltage between SRP (positive side) and SRN  
Analog input pin connected to the internal coulomb counter peripheral for integrating a small  
voltage between SRP (positive side) and SRN  
SRN  
VSS  
C1  
B2  
I
P
Device ground  
(1) P = Power Connection, O = Digital Output, AI = Analog Input, I = Digital Input, I/O = Digital Input/Output, NU = Not Used  
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BQ27Z561-R2  
ZHCSKS9B FEBRUARY 2020 REVISED NOVEMBER 2022  
www.ti.com.cn  
7 Specifications  
7.1 Absolute Maximum Ratings  
Over operating free-air temperature range (unless otherwise noted)(1)  
MIN  
0.3  
0.3  
0.3  
0.3  
0.3  
40  
40  
65  
MAX  
UNIT  
V
BAT  
6
6
INT, PULS, CE  
V
Input Voltage  
SRP, SRN, BAT_SNS  
TS  
VBAT + 0.3  
V
V
2.1  
6
SCL, SDA/HDQ  
V
Operating ambient temperature, TA  
Operating junction temperature, TJ  
Storage temperature, Tstg  
85  
°C  
°C  
°C  
125  
150  
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply  
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If  
outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and  
this may affect device reliability, functionality, performance, and shorten the device lifetime.  
7.2 ESD Ratings  
VALUE  
UNIT  
Human-body model (HBM) on all pins, per ANSI/ESDA/  
JEDEC JS-001(1)  
±1500  
V(ESD) Electrostatic discharge  
V
Charged-device model (CDM) on all pins, per ANSI/ESDA/  
JEDEC JS-002(2)  
±500  
(1) JEDEC document JEP155 states that 500-V HBM enables safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM enables safe manufacturing with a standard ESD control process.  
7.3 Recommended Operating Conditions  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
MIN  
NOM  
MAX  
UNIT  
VBAT  
CBAT  
Supply voltage  
No operating restrictions  
2.0  
5.5  
V
External capacitor from BAT to  
VSS  
1
0
0
µF  
V
VTS  
Temperature sense  
Input and output pins  
1.8  
VPULS  
,
VBAT  
V
VINT, VCE  
VSCL  
VSDA/HDQ  
,
Communication pins  
0
VBAT  
V
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BQ27Z561-R2  
ZHCSKS9B FEBRUARY 2020 REVISED NOVEMBER 2022  
www.ti.com.cn  
7.4 Thermal Information  
Over-operating free-air temperature range (unless otherwise noted)  
BQ27Z561-R2  
THERMAL METRIC(1)  
DSBGA (YPH)  
(12 PINS)  
64.1  
UNIT  
RθJA  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
RθJC(top)  
RθJB  
59.8  
52.7  
°C/W  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
0.3  
ψJT  
28.3  
ψJB  
RθJC(bot)  
2.4  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics Application  
Report.  
7.5 Supply Current  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
60  
11  
9
MAX  
UNIT  
µA  
INORMAL  
Standard operating conditions  
ISLEEP  
Sense resistor current below SLEEP mode threshold  
Sense resistor current below DEEP SLEEP mode threshold  
CE = VIH, OFF state with ability to wake from valid communication  
CE = VIL  
µA  
IDEEPSLEEP  
IHIBERNATE  
IOFF  
µA  
3
µA  
0.5  
µA  
7.6 Internal 1.8-V LDO (REG18)  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
1.6  
TYP  
MAX  
2.0  
UNIT  
VREG18  
VPORth  
VPORhy  
Regulator output voltage  
POR threshold  
1.8  
V
V
V
Rising threshold  
1.45  
1.7  
POR hysteresis  
0.1  
7.7 I/O (PULS, INT)  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
VIH  
VIL  
VOL  
CI  
High-level input voltage  
Low-level input voltage low  
Output voltage low  
VREG18 = 1.8 V  
1.15  
VREG18 = 1.8 V  
0.50  
0.4  
V
VREG18 = 1.8 V, IOL = 1 mA  
V
Input capacitance  
5
pF  
µA  
Ilkg  
Input leakage current  
1
7.8 Chip Enable (CE)  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
High-level input voltage (assured by  
design)  
VIH  
VIL  
VREG18 = 1.8 V  
0.75 × VBAT  
V
Low-level input voltage low (assured  
by design)  
VREG18 = 1.8 V  
0.25 × VBAT  
V
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BQ27Z561-R2  
ZHCSKS9B FEBRUARY 2020 REVISED NOVEMBER 2022  
www.ti.com.cn  
7.9 Internal Temperature Sensor  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
1.65  
0.17  
TYP  
1.73  
0.18  
MAX  
UNIT  
VTEMPP  
1.8  
Internal temperature sensor voltage  
drift  
V(TEMP)  
mV/°C  
0.19  
V
TEMPP VTEMPN (assured by design)  
7.10 NTC Thermistor Measurement Support  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
RNTRC(PU)  
Internal pullup resistance  
14.4  
18  
21.6  
kΩ  
Resistance drift over  
temperature  
RNTC(DRIFT)  
0
PPM/°C  
250  
120  
7.11 Coulomb Counter (CC)  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Differential input voltage  
range  
V(CC_IN)  
0.1  
V
0.1  
t(CC_CONV)  
Conversion time  
Single conversion  
1000  
3.8  
ms  
µV  
Effective resolution  
1 LSB  
16-bit, best fit over input voltage  
range  
Integral nonlinearity  
5.2  
+22.3  
+2.6  
LSB  
22.3  
Differential nonlinearity  
Offset error  
16-bit, no missing codes  
1.5  
1.3  
LSB  
LSB  
16- bit post calibration  
2.6  
492  
7
Offset error drift  
Gain error  
15-bit + sign, post calibration  
15-bit + sign, over input voltage range  
15-bit + sign, over input voltage range  
0.04  
131  
4.3  
0.07 LSB/°C  
+492 LSB  
Gain error drift  
9.8 LSB/°C  
Effective input resistance  
MΩ  
7.12 Analog Digital Converter (ADC)  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
0.2  
0.2  
0.2  
8.4  
TYP  
MAX  
UNIT  
V
VFS = VREF2  
1.0  
1.44  
5.5  
VADC_TS_GPIO  
VBAT_MODE  
Input voltage range  
VFS = VREG18 × 2  
V
Battery input voltage  
Integral nonlinearity  
Differential nonlinearity  
Offset error  
V
+8.4  
LSB  
LSB  
LSB  
16-bit, best fit, 0.1 V to 0.8 × VREF2  
16-bit, no missing codes  
1.5  
1.8  
0.02  
131  
2
16-bit post calibration(1), VFS = VREF2  
16-bit post calibration(1), VFS = VREF2  
16-bit, 0.1 to 0.8 × VFS  
+4.2  
4.2  
492  
8
Offset error drift  
0.1 LSB/°C  
Gain Error  
+492  
LSB  
Gain error drift  
4.5 LSB/°C  
16-bit, 0.1 to 0.8 × VFS  
Effective input resistance  
Conversion time  
MΩ  
ms  
t(ADC_CONV)  
11.7  
15  
Effective resolution  
14  
bits  
(1) Factory calibration  
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7.13 Internal Oscillator Specifications  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
High Frequency Oscillator (HFO)  
fHFO  
Operating frequency  
16.78  
MHz  
2.5%  
3.5  
TA = 20°C to 70°C  
2.5%  
3.5  
fHFO  
HFO frequency drift  
TA = 40°C to 85°C  
TA = 40°C to 85°C, oscillator  
frequency within +/3% of nominal  
frequency or a power-on reset  
tHFOSTART  
HFO start-up time  
4
ms  
Low Frequency Oscillator (LFO)  
fLFO  
Operating frequency  
Frequency error  
65.536  
kHz  
fLFO(ERR)  
+2.5%  
TA = 40°C to 85°C  
2.5%  
7.14 Voltage Reference1 (REF1)  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
1.195  
80  
TYP  
MAX  
UNIT  
VREF1  
Internal reference voltage(1)  
1.21  
1.227  
V
VREF1_DRIFT  
Internal reference voltage drift  
+80 PPM/C  
TA = 40 °C to 85°C  
(1) Used for CC and LDO  
7.15 Voltage Reference2 (REF2)  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
1.2  
TYP  
MAX  
UNIT  
VREF2  
Internal reference voltage(1)  
1.21  
1.22  
V
VREF2_DRIFT  
Internal reference voltage drift  
20 PPM/°C  
TA = 40 °C to 85°C  
20  
(1) Used for ADC  
7.16 Flash Memory  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
10  
TYP  
MAX  
UNIT  
Years  
Cycles  
Cycles  
µs  
Data retention  
100  
Data Flash  
20000  
1000  
Flash programming write  
cycles  
Instruction Flash  
t(ROWPROG)  
t(MASSERASE)  
t(PAGEERASE)  
IFLASHREAD  
IFLASHWRTIE  
IFLASHERASE  
Row programming time  
Mass-erase time  
40  
40  
40  
1
ms  
TA = 40°C to 85°C  
TA = 40°C to 85°C  
TA = 40°C to 85°C  
TA = 40°C to 85°C  
TA = 40°C to 85°C  
Page-erase time  
ms  
Flash read current  
Flash write current  
Flash erase current  
mA  
5
mA  
15  
mA  
7.17 I2C I/O  
Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
SCL, SDA/HDQ, VREG18 = 1.8 V  
VREG18 = 1.8 V  
MIN  
TYP  
MAX  
UNIT  
V
VIH  
VIL  
High-level input voltage  
Low-level input voltage low  
1.26  
0.54  
V
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Unless otherwise noted, characteristics noted under conditions of TA = 40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
VOL  
CI  
Low-level output voltage  
Input capacitance  
Input leakage current  
IOL = 1 mA, VREG18 = 1.8 V  
0.36  
10  
pF  
Ilkg  
1
µA  
7.18 I2C Timing 100 kHz  
PARAMETER  
TEST CONDITIONS  
MIN  
NOM  
MAX  
UNIT  
kHz  
µs  
fSCL  
Clock operating frequency  
Start condition hold time  
Low period of the SCL Clock  
High period of the SCL Clock  
Setup repeated START  
Data hold time (SDA input)  
Data setup time (SDA input)  
Clock rise time  
SCL duty cycle = 50%  
100  
tHD:STA  
tLOW  
tHIGH  
tSU:STA  
tHD:DAT  
tSU:DAT  
tr  
4.0  
4.7  
4.0  
4.7  
0
µs  
µs  
µs  
ns  
250  
ns  
10% to 90%  
90% to 10%  
1000  
300  
ns  
tf  
Clock fall time  
ns  
tSU:STO  
Setup time STOP condition  
4.0  
4.7  
µs  
Bus free time STOP to  
START  
tBUF  
µs  
7.19 I2C Timing 400 kHz  
PARAMETER  
TEST CONDITIONS  
MIN  
NOM  
MAX  
UNIT  
kHz  
µs  
fSCL  
Clock operating frequency  
START condition hold time  
Low period of the SCL Clock  
High period of the SCL Clock  
Setup repeated START  
Data hold time (SDA input)  
Data setup time (SDA input)  
Clock rise time  
SCL duty cycle = 50%  
400  
tHD:STA  
tLOW  
tHIGH  
tSU:STA  
tHD:DAT  
tSU:DAT  
tr  
0.6  
1.3  
600  
600  
0
µs  
ns  
ns  
ns  
100  
ns  
10% to 90%  
90% to 10%  
300  
300  
ns  
tf  
Clock fall time  
ns  
tSU:STO  
Setup time STOP condition  
0.6  
1.3  
µs  
Bus free time STOP to  
START  
tBUF  
µs  
7.20 HDQ Timing  
PARAMETER  
TEST CONDITIONS  
MIN  
190  
40  
NOM  
MAX  
UNIT  
µs  
tB  
Break time  
tBR  
Break recovery time  
Host write 1 time  
µs  
tHW1  
tHW0  
tCYCH  
tCYCD  
tDW1  
tDW0  
tRSPS  
Host drives HDQ  
Host drives HDQ  
Device drives HDQ  
Device drives HDQ  
Device drives HDQ  
Device drives HDQ  
Device drives HDQ  
0.5  
86  
50  
µs  
Host write 0 time  
145  
µs  
Cycle time, host to device  
Cycle time, device to Host  
Device write 1 time  
Device write 0 time  
Device response time  
190  
190  
32  
µs  
205  
250  
50  
µs  
µs  
80  
145  
950  
µs  
190  
µs  
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PARAMETER  
TEST CONDITIONS  
MIN  
NOM  
MAX  
UNIT  
µs  
Host drives HDQ after device drives  
HDQ  
tTRND  
tRISE  
tRST  
Host turn around time  
HDQ line rising time to logic 1  
HDQ Reset  
250  
1.8  
µs  
Host drives HDQ low before device  
reset  
2.2  
s
SDA  
t
BUF  
t
t
LOW  
t
f
HD;STA  
t
r
t
t
SP  
t
r
f
SCL  
t
t
SU;STA  
t
SU;STO  
HD;STA  
t
HIGH  
t
t
SU;DAT  
HD;DAT  
STOP START  
START  
REPEATED  
START  
7-1. I2C Timing  
1.2V  
t
t
(R ISE)  
(BR )  
t
(B)  
(b) H D Q line rise tim e  
(a) Break and Break R ecovery  
t
(D W 1)  
t
(H W 1)  
t
(D W 0)  
(C YC D )  
t
(H W 0)  
(C YC H )  
t
t
(d) Gauge Transm itted Bit  
(c) H ost Transm itted Bit  
7-bit address  
1-bit  
R/W  
8-bit data  
Break  
t
(R SPS)  
(e) Gauge to Host Response  
t
(R ST )  
(f) H D Q R eset  
a . H D Q Bre a kin g  
b . R ise tim e o f H D Q lin e  
c. H D Q H o st to fu e l g a u g e co m m u n ica tio n  
d . Fu e l g a u g e to H o st co m m u n ica tio n  
e . Fu e l g a u g e to H o st re sp o n se fo rm a t  
f. H D Q H o st to fu e l g a u g e  
7-2. HDQ Timing  
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7.21 Typical Characteristics  
1.21  
1.208  
1.206  
1.204  
1.202  
1.8  
1.795  
1.79  
Min  
Nom  
Max  
1.785  
1.78  
Min  
Nom  
Max  
1.2  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
D002  
Temperature (èC)  
Temperature (èC)  
D001  
BAT Min = 2 V  
BAT Nom = 3.6 V  
BAT Max = 5 V  
BAT Min = 2 V  
BAT Nom = 3.6 V  
BAT Max = 5 V  
7-3. REF1 Voltage Versus Battery and  
7-4. LDO Voltage Versus Battery and  
Temperature  
Temperature  
66  
20  
15  
10  
5
Min  
Nom  
Max  
65.8  
65.6  
65.4  
65.2  
65  
0
Min  
Nom  
Max  
-5  
64.8  
-10  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
Temperature (èC)  
Temperature (èC)  
D003  
D004  
BAT Min = 2 V  
BAT Nom = 3.6 V  
BAT Max = 5 V  
BAT Min = 2 V  
BAT Nom = 3.6 V  
BAT Max = 5 V  
7-5. LFO Frequency Versus Battery and  
7-6. ADVC Offset Voltage Versus Battery and  
Temperature  
Temperature  
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8 Detailed Description  
8.1 Overview  
The BQ27Z561-R2 gas gauge is a fully integrated battery manager that employs flash-based firmware to provide  
a complete solution for battery-stack architectures composed of 1-series cells. The BQ27Z561-R2 device  
interfaces with a host system through an I2C or HDQ protocol. High-performance, integrated analog peripherals  
enable support for a sense resistor down to 1 mΩ, and simultaneous current/voltage data conversion for instant  
power calculations. The following sections detail all of the major component blocks included as part of the  
BQ27Z561-R2 device.  
8.2 Functional Block Diagram  
VSS  
TS  
BAT_SNS  
BAT  
GPIO  
Internal  
temperature  
sensor  
REG18  
CE  
ADC  
MUX  
REF1  
CC  
SRP  
SRN  
ADC  
REF2  
HFO  
LFO  
INT  
PULS  
IO and  
interrupt  
controller  
SDA/HDQ  
SCL  
Test  
interface  
CC/ADC  
digital filter  
COM  
engine  
Timers  
bqBMP  
CPU  
PMInstr  
(8 bit)  
PMAddr  
(16 bit)  
ROM  
12-  
kBytes  
Program flash  
32-kBytes  
Data flash  
4-kBytes  
Data SRAM  
2-kBytes  
8.3 Feature Description  
8.3.1 BQ27Z561-R2 Processor  
The BQ27Z561-R2 device uses a custom TI-proprietary processor design that features a Harvard architecture  
and operates at frequencies up to 4.2 MHz. Using an adaptive, three-stage instruction pipeline, the BQ27Z561-  
R2 processor supports variable instruction lengths of 8, 16, or 24 bits.  
8.3.2 Battery Parameter Measurements  
The BQ27Z561-R2 device measures cell voltage and current simultaneously, and also measures temperature to  
calculate the information related to the following:  
Remaining capacity  
Full charge capacity  
State-of-health  
Other gauging parameters.  
8.3.2.1 Coulomb Counter (CC)  
The first ADC is an integrating analog-to-digital converter designed specifically for tracking charge and discharge  
activity, or coulomb counting, of a rechargeable battery. It features a single-channel differential input that  
converts the voltage difference across a sense resistor between the SRP and SRN pins with a resolution of 3.74  
µV.  
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8.3.2.2 CC Digital Filter  
The CC digital filter generates a 16-bit conversion value from the delta-sigma CC front end. Its FIR filter uses the  
HFO clock output. New conversions are available every 1 s.  
8.3.2.3 ADC Multiplexer  
The ADC multiplexer provides selectable connections to the following:  
External pins BAT, BAT_SNS, TS  
Internal temperature sensor  
Internal reference voltages  
Internal 1.8-V regulator  
VSS ground reference input  
In addition, the multiplexer can independently enable the TS input connection to the internal thermistor biasing  
circuitry, and enables the user to short the multiplexer inputs for test and calibration purposes.  
8.3.2.4 Analog-to-Digital Converter (ADC)  
The second ADC is a 16-bit delta-sigma converter designed for general-purpose measurements. The ADC  
automatically scales the input voltage range during sampling based on channel selection. The converter  
resolution is a function of its full-scale range and number of bits, yielding a 38-µV resolution.  
8.3.2.5 Internal Temperature Sensor  
An internal temperature sensor is available on the BQ27Z561-R2 device to reduce the cost, power, and size of  
the external components necessary to measure temperature. It is available for connection to the ADC using the  
multiplexer, and is ideal for quickly determining pack temperature under a variety of operating conditions.  
8.3.2.6 External Temperature Sensor Support  
The TS input is enabled with an internal 18-kΩ (typical) linearization pullup resistor to support the use of a 10-  
kΩ (25°C) NTC external thermistor, such as the Semitec 103AT-2. The NTC thermistor should be connected  
between VSS and the individual TS pin. The ADC, through its input multiplexer, then takes the analog  
measurement. If a different thermistor type is required, then changes to configurations might be required.  
REG18  
TS  
ADC  
NTC  
8-1. External Thermistor Biasing  
8.3.3 Power Supply Control  
The BQ27Z561-R2 device uses the BAT pin as its power source. BAT powers the internal voltage sources that  
supply references for the device. BAT_SNS is a noncurrent carrying path and used at the Kelvin reference for  
BAT.  
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8.3.4 Bus Communication Interface  
The BQ27Z561-R2 device has an I2C bus communication interface. Alternatively, the BQ27Z561-R2 can be  
configured to communicate through the HDQ pin (shared with SDA).  
备注  
Once the device is switched to the HDQ protocol, it is not reversible.  
8.3.5 Low Frequency Oscillator  
The BQ27Z561-R2 device includes a low frequency oscillator (LFO) running at 65.536 kHz.  
8.3.6 High Frequency Oscillator  
The BQ27Z561-R2 includes a high frequency oscillator (HFO) running at 16.78 MHz. It is frequency locked to  
the LFO output and scaled down to 8.388 MHz with a 50% duty cycle.  
8.3.7 1.8-V Low Dropout Regulator  
The BQ27Z561-R2 device contains an integrated capacitor-less 1.8-V LDO (REG18) that provides regulated  
supply voltage for the device CPU and internal digital logic.  
8.3.8 Internal Voltage References  
The BQ27Z561-R2 device provides two internal voltage references. REF1 is used by REG18, oscillators, and  
CC. REF2 is used by the ADC.  
8.3.9 Gas Gauging  
This device uses the Impedance Tracktechnology to measure and determine the available charge in battery  
cells. See the Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm Application  
Report for further details.  
8.3.10 Charge Control Features  
This device supports charge control features, such as:  
Reports charging voltage and charging current based on the active temperature rangeJEITA temperature  
ranges T1, T2, T3, T4, T5, and T6  
Provides more complex charging profiles, including sub-ranges within a standard temperature range  
Reports the appropriate charging current required for constant current charging, and the appropriate charging  
voltage needed for constant voltage charging to a smart charger, using the bus communication interface  
Compensates the charging profile based on the value of RelativeStateOfCharge()  
Selects the chemical state-of-charge of each battery cell using the Impedance Track method  
Reports charging faults and indicates charge status via charge and discharge alarms  
8.3.11 Authentication  
This device supports security with the following features, which can be enabled if desired:  
Authentication by the host using the SHA-256 method  
The gas gauge requires SHA-256 authentication before the device can be unsealed or allow full access.  
8.4 Device Functional Modes  
This device supports five modes, but the current consumption varies, based on firmware control of certain  
functions and modes of operation:  
NORMAL mode: In this mode, the device performs measurements, calculations, protections, and data  
updates in 250-ms intervals. Between these intervals, the device is operating in a reduced power stage to  
minimize total average current consumption.  
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SLEEP mode: In this mode, the device performs measurements, calculations, and data updates in adjustable  
time intervals. Between these intervals, the device is operating in a reduced power stage to minimize total  
average current consumption.  
DEEP SLEEP mode: In this mode, the current is reduced slightly while current and voltage are still measured  
periodically, with a user-defined time between reads.  
HIBERNATE mode: In this mode, the device is completely disabled with CE remaining high. This mode is  
exited upon two valid communications within a specified time window.  
OFF mode: The device is completely disabled by pulling CE low. CE disables the internal voltage rail. All  
nonvolatile memory is unprotected.  
8.4.1 Lifetime Logging Features  
The device supports data logging of several key parameters for warranty and analysis:  
Maximum and minimum cell temperature  
Maximum current in CHARGE or DISCHARGE mode  
Maximum and minimum cell voltages  
Total run time (This data is stored with a resolution of two hours.)  
Time spent different temperature ranges (This data is stored with a resolution of two hours.)  
8.4.2 Configuration  
The device supports accurate data measurements and data logging of several key parameters.  
8.4.2.1 Coulomb Counting  
The device uses an integrating delta-sigma analog-to-digital converter (ADC) for current measurement. The ADC  
measures charge and discharge flow of the battery by measuring the voltage across a very small external sense  
resistor. The integrating ADC measures a bipolar signal from a range of 100 mV to 100 mV, with a positive  
value when V(SRP) V(SRN), indicating charge current and a negative value indicating discharge current.  
The current measurement is performed by measuring the voltage drop across the external sense resistor, which  
can be as low as 1 mΩ, and the polarity of the differential voltage determines if the cell is in the CHARGE or  
DISCHARGE mode.  
8.4.2.2 Cell Voltage Measurements  
The BQ27Z561-R2 gas gauge measures the cell voltage at 1-s intervals using the ADC. This measured value is  
internally scaled for the ADC and is calibrated to reduce any errors due to offsets. This data is also used for  
calculating the impedance of the cell for Impedance Track gas gauging.  
8.4.2.3 Auto Calibration  
The auto-calibration feature helps to cancel any voltage offset across the SRP and SRN pins for accurate  
measurement of the cell voltage, charge/discharge current, and thermistor temperature. The auto-calibration is  
performed when there is no communication activity for a minimum of 5 s on the bus lines.  
8.4.2.4 Temperature Measurements  
This device has an internal sensor for on-die temperature measurements, and the ability to support an external  
temperature measurement via the external NTC on the TS pin. These two measurements are individually  
enabled and configured.  
9 Applications and Implementation  
备注  
以下应用部分中的信息不属TI 器件规格的范围TI 不担保其准确性和完整性。TI 的客 户应负责确定  
器件是否适用于其应用。客户应验证并测试其设计以确保系统功能。  
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9.1 Application Information  
The BQ27Z561-R2 gas gauge can be used with a 1-series Li-ion/Li-polymer battery pack. To implement and  
design a comprehensive set of parameters for a specific battery pack, the user needs Battery Management  
Studio (BQSTUDIO), which is a graphical user-interface tool installed on a PC during development. The firmware  
installed in the product has default values, which are summarized in the BQ27Z561-R2 Technical Reference  
Manual. Using the BQSTUDIO tool, these default values can be changed to cater to specific application  
requirements during development once the system parameters, such as enable and disable of certain features  
for operation, cell configuration, chemistry that best matches the cell used, and more are known. The final flash  
image, which is extracted once configuration and testing are complete, is used for mass production and is  
referred to as the "golden image."  
9.2 Typical Applications  
The following is an example BQ27Z561-R2 application schematic for a single-cell battery pack.  
PACK+  
Protector  
IC  
CE  
Tie to CPU for  
direct control  
SDA/HDQ  
SCL  
BAT_SNS  
BAT  
INT  
+
-
1 µF  
PULS  
Ba ery  
NU  
TS  
Thermistor  
10 k  
VSS  
SRN  
SRP  
0.1 F  
RSRN  
RSRP  
PACK-  
RSENSE  
1 m  
9-1. BQ27Z561-R1 Typical Implementation with Low-side Current Sensing  
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RSENSE  
1 m  
PACK+  
RSRP  
RSRN  
Protector  
IC  
0.1 µF  
SRP  
SRN  
CE  
Tie to CPU for  
direct control  
SDA/HDQ  
SCL  
BAT_SNS  
BAT  
INT  
+
-
1 µF  
PULS  
Ba ery  
NU  
TS  
Thermistor  
10 k  
VSS  
PACK-  
9-2. BQ27Z561-R1 Typical Implementation with High-side Current Sensing  
9.2.1 Design Requirements (Default)  
DESIGN PARAMETER  
EXAMPLE  
1s1p (1 series with 1 parallel)  
5300 mAh  
Cell Configuration  
Design Capacity  
Device Chemistry  
Design Voltage  
li-ion  
4000 mV  
Cell Low Voltage  
2500 mV  
9.2.2 Detailed Design Procedure  
9.2.2.1 Changing Design Parameters  
For the firmware settings needed for the design requirements, refer to the BQ27Z561-R2 Technical Reference  
Manual.  
To change design capacity, set the data flash value (in mAh) in the Gas Gauging: Design: Design Capacity  
register.  
To set device chemistry, go to the data flash I2C Configuration: Data: Device Chemistry. The BQSTUDIO  
software automatically populates the correct chemistry identification. This selection is derived from using the  
BQCHEM feature in the tools and choosing the option that matches the device chemistry from the list.  
To set the design voltage, go to Gas Gauging: Design: Design Voltage register.  
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To set the Cell Low Voltage or clear the Cell Low Voltage, use Settings: Configuration: Init Voltage Low  
Set or Clear. This is used to set the cell voltage level that will set (clear) the [VOLT_LO] bit in the Interrupt  
Status register.  
To enable the internal temperature and the external temperature sensors: Set Settings:Configuration:  
Temperature Enable: Bit 0 (TSInt) = 1 for the internal sensor; set Bit 1 (TS1) = 1 for the external sensor.  
9.2.3 Calibration Process  
The calibration of current, voltage, and temperature readings is accessible by writing 0xF081 or 0xF082 to  
ManufacturerAccess(). A detailed procedure is included in the BQ27Z561-R2 Technical Reference Manual in the  
Calibration section. The description allows for calibration of cell voltage measurement offset, battery voltage,  
current calibration, coulomb counter offset, PCB offset, CC gain and capacity gain, and temperature  
measurement for both internal and external sensors.  
9.2.4 Gauging Data Updates  
When a battery pack enabled with the BQ27Z561-R2 gas gauge is cycled, the value of FullChargeCapacity()  
updates several times, including the onset of charge or discharge, charge termination, temperature delta,  
resistance updates during discharge, and relaxation. 9-3 shows actual battery voltage, load current, and  
FullChargeCapacity() when some of those updates occur during a single application cycle.  
Update points from the plot include:  
Charge termination at 7900 s  
Relaxation at 9900 s  
Resistance update at 11500 s  
9.2.4.1 Application Curve  
9-3. Full Charge Capacity Tracking (X-Axis Is Seconds)  
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9.3 Power Supply Recommendations  
The only power supply is the BAT pin, which is connected to the positive terminal of the battery. The input  
voltage for the BAT pin will have a minimum of 2 V to a maximum of 5 V.  
9.4 Layout  
9.4.1 Layout Guidelines  
The quality of the Kelvin connections at the sense resistor is critical. The sense resistor must have a  
temperature coefficient no greater than 50 ppm to minimize current measurement drift with temperature.  
Choose the value of the sense resistor to correspond to the available overcurrent and short-circuit ranges of  
the BQ27Z561-R2 gas gauge. Select the smallest value possible to minimize the negative voltage generated  
on the BQ27Z561-R2 VSS node during a short circuit. This pin has an absolute minimum of 0.3 V. Parallel  
resistors can be used as long as good Kelvin sensing is ensured. The device is designed to support a 1-mΩ  
to 3-mΩsense resistor.  
BAT_SNS should be tied directly to the positive connection of the battery. It should not share a path with the  
BAT pin.  
In reference to the gas gauge circuit the following features require attention for component placement and  
layout: differential low-pass filter and I2C communication.  
The BQ27Z561-R2 gas gauge uses an integrating delta-sigma ADC for current measurements. Add a 100-Ω  
resistor from the sense resistor to the SRP and SRN inputs of the device. Place a 0.1-μF filter capacitor  
across the SRP and SRN inputs. If required for a circuit, 0.1-µF filter capacitors can be added for additional  
noise filtering for each sense input pin to ground. Place all filter components as close as possible to the  
device. Route the traces from the sense resistor in parallel to the filter circuit. Adding a ground plane around  
the filter network can provide additional noise immunity.  
The BQ27Z561-R2 has an internal LDO that is internally compensated and does not require an external  
decoupling capacitor.  
The I2C clock and data pins have integrated high-voltage ESD protection circuits; however, adding a Zener  
diode and series resistor provides more robust ESD performance. The I2C clock and data lines have an  
internal pulldown. When the gas gauge senses that both lines are low (such as during removal of the pack),  
the device performs auto-offset calibration and then goes into SLEEP mode to conserve power.  
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9.4.2 Layout Example  
No contact to NU  
(BAT_SNS trace on  
bottom layer)  
Tab -  
Tab +  
PACK +  
PACK -  
SDA/  
HDQ  
INT  
PULS  
VSS  
TS  
SCL  
RSRN  
BAT_  
SNS  
SRN  
SRP  
NU  
CE  
RSENSE  
BAT  
RSRP  
Weld  
Tab  
Weld  
Tab  
BAT -  
BAT +  
Battery  
BAT_SNS at  
Battery terminal  
9-4. BQ27Z561-R2 Key Trace Board Layout  
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10 Device and Documentation Support  
10.1 Device Support  
10.1.1 第三方产品免责声明  
TI 发布的与第三方产品或服务有关的信息不能构成与此类产品或服务或保修的适用性有关的认可不能构成此  
类产品或服务单独或与任TI 产品或服务一起的表示或认可。  
10.2 Documentation Support  
10.2.1 Related Documentation  
BQ27Z561-R2 Technical Reference Manual  
Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm Application Report  
10.3 Receiving Notification of Documentation Updates  
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper  
right corner, click on Alert me to register and receive a weekly digest of any product information that has  
changed. For change details, review the revision history included in any revised document.  
10.4 支持资源  
TI E2E支持论坛是工程师的重要参考资料可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解  
答或提出自己的问题可获得所需的快速设计帮助。  
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范并且不一定反映 TI 的观点请参阅  
TI 《使用条款》。  
10.5 Trademarks  
Impedance Trackand TI E2Eare trademarks of Texas Instruments.  
所有商标均为其各自所有者的财产。  
10.6 Electrostatic Discharge Caution  
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled  
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may  
be more susceptible to damage because very small parametric changes could cause the device not to meet its published  
specifications.  
10.7 术语表  
TI 术语表  
本术语表列出并解释了术语、首字母缩略词和定义。  
11 Mechanical, Packaging, and Orderable Information  
The following page includes mechanical, packaging, and orderable information. This information is the most  
current data available for the designated devices. This data is subject to change without notice and revision of  
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.  
Copyright © 2022 Texas Instruments Incorporated  
20  
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Product Folder Links: BQ27Z561-R2  
 
 
 
 
 
 
 
 
 
PACKAGE OPTION ADDENDUM  
www.ti.com  
16-Nov-2022  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
BQ27Z561YPHR-R2  
ACTIVE  
DSBGA  
YPH  
12  
3000 RoHS & Green  
SAC396  
Level-1-260C-UNLIM  
-40 to 85  
Q27Z561R2  
Samples  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
16-Nov-2022  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
K0  
P1  
W
B0  
Reel  
Diameter  
Cavity  
A0  
A0 Dimension designed to accommodate the component width  
B0 Dimension designed to accommodate the component length  
K0 Dimension designed to accommodate the component thickness  
Overall width of the carrier tape  
W
P1 Pitch between successive cavity centers  
Reel Width (W1)  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Sprocket Holes  
Q1 Q2  
Q3 Q4  
Q1 Q2  
Q3 Q4  
User Direction of Feed  
Pocket Quadrants  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
BQ27Z561YPHR-R2  
DSBGA  
YPH  
12  
3000  
180.0  
8.4  
1.83  
2.2  
0.53  
4.0  
8.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
16-Nov-2022  
TAPE AND REEL BOX DIMENSIONS  
Width (mm)  
H
W
L
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
DSBGA YPH 12  
SPQ  
Length (mm) Width (mm) Height (mm)  
182.0 182.0 20.0  
BQ27Z561YPHR-R2  
3000  
Pack Materials-Page 2  
PACKAGE OUTLINE  
YPH0012  
DSBGA - 0.4 mm max height  
SCALE 7.000  
DIE SIZE BALL GRID ARRAY  
A
D
B
E
BALL A1  
INDEX AREA  
0.4 MAX  
C
SEATING PLANE  
0.05 C  
0.175  
0.125  
BALL TYP  
1 TYP  
0.5 TYP  
D
C
B
SYMM  
1.5  
TYP  
0.5  
TYP  
A
3
1
2
0.25  
0.15  
12X  
C A  
SYMM  
0.015  
B
4222640/A 12/2015  
NanoFree Is a trademark of Texas Instruments.  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. NanoFreeTM package configuration.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
YPH0012  
DSBGA - 0.4 mm max height  
DIE SIZE BALL GRID ARRAY  
(0.5) TYP  
12X ( 0.23)  
3
1
2
A
(0.5) TYP  
B
C
SYMM  
D
SYMM  
LAND PATTERN EXAMPLE  
SCALE:30X  
0.05 MAX  
0.05 MIN  
(
0.23)  
METAL UNDER  
SOLDER MASK  
METAL  
(
0.23)  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
NON-SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
NOT TO SCALE  
4222640/A 12/2015  
NOTES: (continued)  
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.  
For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).  
www.ti.com  
EXAMPLE STENCIL DESIGN  
YPH0012  
DSBGA - 0.4 mm max height  
DIE SIZE BALL GRID ARRAY  
(0.5) TYP  
(R0.05) TYP  
12X ( 0.225)  
1
2
3
A
(0.5) TYP  
B
SYMM  
METAL  
TYP  
C
D
SYMM  
SOLDER PASTE EXAMPLE  
BASED ON 0.1 mm THICK STENCIL  
SCALE:40X  
4222640/A 12/2015  
NOTES: (continued)  
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.  
www.ti.com  
重要声明和免责声明  
TI“按原样提供技术和可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,  
不保证没有瑕疵且不做出任何明示或暗示的担保,包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担  
保。  
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任:(1) 针对您的应用选择合适的 TI 产品,(2) 设计、验  
证并测试您的应用,(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。  
这些资源如有变更,恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。  
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成  
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TI 针对 TI 产品发布的适用的担保或担保免责声明。  
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE  
邮寄地址:Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2022,德州仪器 (TI) 公司  

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