BQ27Z561YPHR [TI]

适用于 1 节电池的 Impedance Track™ 集成电路电量计解决方案 | YPH | 12 | -40 to 85;
BQ27Z561YPHR
型号: BQ27Z561YPHR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

适用于 1 节电池的 Impedance Track™ 集成电路电量计解决方案 | YPH | 12 | -40 to 85

电池
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中文:  中文翻译
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BQ27Z561  
ZHCSIF7B MAY 2018REVISED AUGUST 2019  
适用于 1 节锂离子电池组的 BQ27Z561 Impedance Track™ 电池电量监测  
计解决方案  
1 特性  
3 说明  
1
支持低至 1mΩ 的电流感应电阻器  
德州仪器 (TI) BQ27Z561 Impedance Track™电量监  
测计解决方案是一个高度集成的高精度单节电池电量监  
测计,具有闪存可编程的定制精简指令集 CPU (RISC)  
和锂离子和锂聚合物电池组 SHA-256 认证。单节功能  
包括可提高容量的并联电池。  
SHA-256 认证响应器,用于提高电池组安全性  
两个独立的 ADC  
支持电流和电压同步采样  
高精度库伦计数器,输入失调电压误差 < 1µV  
(典型值)  
BQ27Z561 电量监测计通过兼容 I2C 的接口和 HDQ 单  
线制接口进行通信,且包括几个有助于实现准确电量监  
测 应用的 关键 特性。通过集成的温度检测功能(内部  
和外部选项),可实现系统和电池温度测量。集成的  
SHA-256 功能有助于在系统和电池组之间实现安全识  
别。通过中断功能,BQ27Z561 器件可在发生充电状  
(SOC)、电压或温度故障时通知系统。通过低电压  
运行,即使在深度放电情况下,系统也能够持续监控电  
池的状态。在低活跃度情况下,该器件可设置为低功耗  
库伦计数 (CC) 模式,从而在显著降低运行电流的情况  
下继续进行库伦计数。  
低电压 (2V) 运行  
支持电池组侧电量监测  
宽量程电流 应用 (1mA > 5A)  
高电平有效或低电平有效中断引脚  
节能模式(典型电池组运行范围条件)  
典型睡眠模式:低于 11μA  
典型深度睡眠模式:低于 9μA  
典型关断模式:低于 1.9μA  
内部和外部温度感应功能  
适用于高速编程和数据访问的 400kHz I2C 总线通  
信接口  
器件信息(1)  
用于主机通信的单线制 HDQ  
器件型号  
BQ27Z561  
封装  
封装尺寸(标称值)  
紧凑型 12 引脚 DSBGA 封装 (YPH)  
DSBGA (12)  
1.67mm × 2.05mm  
2 应用  
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附  
录。  
智能手机  
数码相机与摄像机  
平板电脑计算  
便携式和可穿戴健康设备以及便携式音频设备  
简化原理图  
PACK+  
Protector  
IC  
CE  
SDA/HDQ  
SCL  
BAT_SNS  
BAT  
INT  
+
-
PULS  
TS  
VSS  
SRN SRP  
PACK-  
1
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。 有关适用的官方英文版本的最新信息,请访问 www.ti.com,其内容始终优先。 TI 不保证翻译的准确  
性和有效性。 在实际设计之前,请务必参考最新版本的英文版本。  
English Data Sheet: SLUSCY0  
 
 
 
 
BQ27Z561  
ZHCSIF7B MAY 2018REVISED AUGUST 2019  
www.ti.com.cn  
目录  
6.18 I2C Timing — 400 kHz ............................................ 7  
6.19 HDQ Timing ............................................................ 8  
6.20 Typical Characteristics.......................................... 10  
Detailed Description ............................................ 10  
7.1 Overview ................................................................. 10  
7.2 Functional Block Diagram ....................................... 11  
7.3 Feature Description................................................. 11  
7.4 Device Functional Modes........................................ 13  
Applications and Implementation ...................... 14  
8.1 Application Information............................................ 15  
8.2 Typical Applications ............................................... 15  
Power Supply Requirements .............................. 17  
1
2
3
4
5
6
特性.......................................................................... 1  
应用.......................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 4  
6.1 Absolute Maximum Ratings ...................................... 4  
6.2 ESD Ratings.............................................................. 4  
6.3 Recommended Operating Conditions....................... 4  
6.4 Thermal Information.................................................. 4  
6.5 Supply Current .......................................................... 5  
6.6 Internal 1.8-V LDO (REG18)..................................... 5  
6.7 I/O (CE, PULS, INT).................................................. 5  
6.8 Internal Temperature Sensor .................................... 5  
6.9 NTC Thermistor Measurement Support.................... 5  
6.10 Coulomb Counter (CC) ........................................... 5  
6.11 Analog Digital Converter (ADC).............................. 6  
6.12 Internal Oscillator Specifications............................. 6  
6.13 Voltage Reference1 (REF1).................................... 6  
6.14 Voltage Reference2 (REF2).................................... 7  
6.15 Flash Memory ......................................................... 7  
6.16 I2C I/O ..................................................................... 7  
6.17 I2C Timing — 100 kHz ............................................ 7  
7
8
9
10 Layout................................................................... 17  
10.1 Layout Guidelines ................................................. 17  
10.2 Layout Example .................................................... 18  
11 器件和文档支持 ..................................................... 19  
11.1 文档支持................................................................ 19  
11.2 接收文档更新通知 ................................................. 19  
11.3 社区资源................................................................ 19  
11.4 ....................................................................... 19  
11.5 静电放电警告......................................................... 19  
11.6 Glossary................................................................ 19  
12 机械、封装和可订购信息....................................... 19  
4 修订历史记录  
Changes from Revision A (June 2018) to Revision B  
Page  
已更改 更改了器件信息 中的封装尺寸 .................................................................................................................................... 1  
2
Copyright © 2018–2019, Texas Instruments Incorporated  
 
BQ27Z561  
www.ti.com.cn  
ZHCSIF7B MAY 2018REVISED AUGUST 2019  
5 Pin Configuration and Functions  
1
2
3
D
C
B
A
SRP  
BAT  
CE  
SRN  
TS  
BAT_SNS  
NU  
VSS  
SCL  
INT  
PULS  
SDA/HDQ  
Not to scale  
Pin Functions  
NUMBER  
NAME  
I/O  
DESCRIPTION  
Battery voltage measurement input. Kelvin battery sense connection to BAT_SNS. Connect a  
capacitor (1 µF) between BAT and VSS. Place the capacitor close to the gauge.  
D2  
BAT  
CE  
P(1)  
D3  
C2  
A1  
A2  
B1  
C3  
I
Active high chip enable  
BAT_SNS  
INT  
AI  
O
Battery sense  
Interrupt for voltage, temperature, and state of charge (programmable active high or low)  
Programmable pulse width with active high or low option  
Temperature input for ADC  
PULS  
TS  
O
AI  
NU  
NU  
Makes no external connection  
Serial clock for I2C interface; requires external pull up when used. It can be left floating if  
unused.  
Serial data for I2C interface and one-wire interface for HDQ (selectable); requires external pull  
up when used. It can be left floating if unused.  
B3  
A3  
D1  
SCL  
I/O  
I/O  
I
SDA/HDQ  
SRP  
Analog input pin connected to the internal coulomb counter peripheral for integrating a small  
voltage between SRP (positive side) and SRN  
Analog input pin connected to the internal coulomb counter peripheral for integrating a small  
voltage between SRP (positive side) and SRN.  
C1  
B2  
SRN  
VSS  
I
P
Device ground  
(1) P = Power Connection, O = Digital Output, AI = Analog Input, I = Digital Input, I/O = Digital Input/Output, NU = Not Used  
Copyright © 2018–2019, Texas Instruments Incorporated  
3
BQ27Z561  
ZHCSIF7B MAY 2018REVISED AUGUST 2019  
www.ti.com.cn  
6 Specifications  
6.1 Absolute Maximum Ratings  
Over operating free-air temperature range (unless otherwise noted)(1)  
MIN  
–0.3  
–0.3  
–0.3  
-0.3  
–0.3  
–40  
–40  
–65  
MAX  
UNIT  
V
BAT  
6
6
INT, PULS, CE  
V
Input Voltage  
SRP, SRN, BAT_SNS  
TS  
VBAT + 0.3  
V
V
2.1  
6
SCL, SDA/HDQ  
V
Operating ambient temperature, TA  
Operating junction temperature, TJ  
Storage temperature, Tstg  
85  
°C  
°C  
°C  
125  
150  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended  
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
6.2 ESD Ratings  
VALUE  
UNIT  
Human-body model (HBM) on all pins, per  
ANSI/ESDA/JEDEC JS-001(1)  
±1500  
V(ESD) Electrostatic discharge  
V
Charged-device model (CDM) on all pins, per JEDEC  
specification JESD22-C101(2)  
±500  
(1) JEDEC document JEP155 states that 500-V HBM enables safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM enables safe manufacturing with a standard ESD control process.  
6.3 Recommended Operating Conditions  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
MIN  
NOM  
MAX  
UNIT  
VBAT  
CBAT  
Supply voltage  
No operating restrictions  
2.0  
5.5  
V
External capacitor from BAT to  
VSS  
1
0
0
µF  
V
VTS  
Temperature sense  
1.8  
VPULS  
,
Input and output pins  
VBAT  
V
VINT, VCE  
VSCL  
VSDA/HDQ  
,
Communication pins  
0
VBAT  
V
6.4 Thermal Information  
Over-operating free-air temperature range (unless otherwise noted)  
BQ27Z561  
DSBGA (YPH)  
(12 PINS)  
64.1  
THERMAL METRIC(1)  
UNIT  
RθJA  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
RθJC(top)  
RθJB  
59.8  
52.7  
°C/W  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
0.3  
ψJB  
28.3  
RθJC(bot)  
2.4  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application  
report (SPRA953).  
4
Copyright © 2018–2019, Texas Instruments Incorporated  
BQ27Z561  
www.ti.com.cn  
ZHCSIF7B MAY 2018REVISED AUGUST 2019  
6.5 Supply Current  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
PARAMETER  
INORMAL  
TEST CONDITIONS  
Standard operating Conditions  
MIN  
TYP  
60  
11  
9
MAX  
UNIT  
µA  
ISLEEP  
Sense resistor current below SLEEP mode threshold  
Sense resistor current below DEEP SLEEP mode threshold  
CE = VIL  
µA  
IDEEPSLEEP  
IOFF  
µA  
0.5  
µA  
6.6 Internal 1.8-V LDO (REG18)  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
1.6  
TYP  
MAX  
2.0  
UNIT  
VREG18  
VPORth  
VPORhy  
Regulator output voltage  
POR threshold  
1.8  
V
V
V
Rising Threshold  
1.45  
1.7  
POR hysteresis  
0.1  
6.7 I/O (CE, PULS, INT)  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
PARAMETER  
TEST CONDITIONS  
VREG18 = 1.8 V  
MIN  
TYP  
MAX  
UNIT  
V
VIH  
VIL  
VOL  
CI  
High-level input voltage  
Low-level input voltage low  
Output voltage low for INT/PULS  
Input capacitance  
1.15  
VREG18 = 1.8 V  
0.50  
0.4  
V
VREG18 = 1.8 V, IOL = 1 mA  
V
5
pF  
µA  
Ilkg  
Input leakage current  
1
6.8 Internal Temperature Sensor  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
1.65  
0.17  
TYP  
1.73  
0.18  
MAX  
1.8  
UNIT  
VTEMPP  
VTEMPP – VTEMPN (assured by design)  
Internal Temperature sensor  
voltage drift  
V(TEMP)  
mV/°C  
0.19  
6.9 NTC Thermistor Measurement Support  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
RNTRC(PU)  
Internal Pullup Resistance  
14.4  
18  
21.6  
kΩ  
Resistance drift over  
temperature  
RNTC(DRIFT)  
–250  
–120  
0
PPM/°C  
6.10 Coulomb Counter (CC)  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
V(CC_IN)  
Input voltage range  
Conversion time  
Effective Resolution  
–0.1  
0.1  
t(CC_CONV)  
Single conversion  
1000  
3.8  
ms  
µV  
1 LSB  
16-bit, Best fit over input voltage  
range  
Integral nonlinearity  
-22.3  
-2.6  
5.2  
+22.3  
LSB  
Differential nonlinearity  
Offset error  
16-bit, No missing codes  
16- bit Post-Calibration  
1.5  
1.3  
LSB  
LSB  
+2.6  
0.07  
Offset error drift  
15-bit + sign, Post Calibration  
0.04  
LSB/°C  
15-bit + sign, Over input voltage  
range  
Gain Error  
-492  
131  
+492  
LSB  
Copyright © 2018–2019, Texas Instruments Incorporated  
5
BQ27Z561  
ZHCSIF7B MAY 2018REVISED AUGUST 2019  
www.ti.com.cn  
Coulomb Counter (CC) (continued)  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
LSB/°C  
MΩ  
15-bit + sign, Over input voltage  
range  
Gain Error drift  
4.3  
9.8  
Effective input resistance  
7
6.11 Analog Digital Converter (ADC)  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
PARAMETER  
TEST CONDITIONS  
VFS = VREF2  
MIN  
–0.2  
–0.2  
–0.2  
-8.4  
TYP  
MAX  
1.0  
UNIT  
V
VADC_TS_GPIO  
VBAT_MODE  
Input voltage range  
VFS = VREG18 × 2  
1.44  
5.5  
V
Battery Input Voltage  
Integral nonlinearity  
Differential nonlinearity  
V
16-bit, Best fit, -0.1 V to 0.8 × VREF2  
16-bit, No missing codes  
16-bit Post-Calibration(1), VFS  
VREF2  
16-bit Post-Calibration(1), VFS  
VREF2  
+8.4  
LSB  
LSB  
1.5  
1.8  
=
Offset error  
-4.2  
+4.2  
0.1  
LSB  
=
Offset error drift  
0.02  
LSB/°C  
Gain Error  
16-bit, –0.1 to 0.8 × VFS  
16-bit, –0.1 to 0.8 × VFS  
-492  
8
131  
2
+492  
4.5  
LSB  
LSB/°C  
MΩ  
Gain Error drift  
Effective input resistance  
Conversion time  
t(ADC_CONV)  
11.7  
15  
ms  
Effective resolution  
14  
bits  
(1) Factory calibration.  
6.12 Internal Oscillator Specifications  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
High Frequency Oscillator (HFO)  
fHFO  
Operating frequency  
16.78  
MHz  
TA = –20°C to 70°C  
–2.5%  
–3.5  
2.5%  
3.5  
fHFO  
HFO frequency drift  
TA = –40°C to 85°C  
TA = –40°C to 85°C, oscillator  
frequency within +/- 3% of nominal  
frequency or a power-on reset  
tHFOSTART  
HFO Start-up time  
4
ms  
Low Frequency Oscillator (LFO)  
fLFO  
Operating frequency  
Frequency error  
65.536  
kHz  
fLFO(ERR)  
TA = –40°C to 85°C  
-2.5%  
+2.5%  
6.13 Voltage Reference1 (REF1)  
Unless otherwise noted, characteristics noted under conditions of TA = –40°C to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
VREF1  
Internal Reference Voltage(1)  
1.195  
1.21  
1.227  
V
Internal Reference Voltage  
Drift  
VREF1_DRIFT  
TA = –40°C to 85°C  
-80  
+80 PPM/C  
(1) Used for CC and LDO  
6
Copyright © 2018–2019, Texas Instruments Incorporated  
BQ27Z561  
www.ti.com.cn  
ZHCSIF7B MAY 2018REVISED AUGUST 2019  
6.14 Voltage Reference2 (REF2)  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
VREF2  
Internal Reference Voltage(1)  
1.2  
1.21  
1.22  
V
Internal Reference Voltage  
Drift  
VREF2_DRIFT  
TA = –40°C to 85°C  
-20  
20 PPM/°C  
(1) Used for ADC  
6.15 Flash Memory  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Data retention  
10  
20000  
1000  
100  
Years  
Cycles  
Cycles  
Data Flash  
Flash programming write  
cycles  
Instruction Flash  
t(ROWPROG)  
t(MASSERASE)  
t(PAGEERASE)  
IFLASHREAD  
IFLASHWRTIE  
IFLASHERASE  
Row programming time  
Mass-erase time  
40  
40  
40  
1
µs  
ms  
ms  
mA  
mA  
mA  
TA = –40°C to 85°C  
TA = –40°C to 85°C  
TA = –40°C to 85°C  
TA = –40°C to 85°C  
TA = –40°C to 85°C  
Page-erase time  
Flash Read Current  
Flash Write Current  
Flash Erase Current  
5
15  
6.16 I2C I/O  
Unless otherwise noted, characteristics noted under conditions of TA = –40to 85℃  
PARAMETER  
TEST CONDITIONS  
SCL, SDA/HDQ, VREG18 = 1.8 V  
VREG18 = 1.8 V  
MIN  
TYP  
MAX  
UNIT  
VIH  
VIL  
VOL  
CI  
High-level input voltage  
Low-level input voltage low  
Low-level output voltage  
Input capacitance  
1.26  
V
V
0.54  
0.36  
10  
IOL = 1 mA, VREG18 = 1.8 V  
V
pF  
µA  
Ilkg  
Input leakage current  
1
6.17 I2C Timing — 100 kHz  
PARAMETER  
TEST CONDITIONS  
MIN  
NOM  
MAX  
UNIT  
fSCL  
Clock Operating Frequency  
START Condition Hold Time  
Low period of the SCL Clock  
SCL duty cycle = 50%  
100  
kHz  
µs  
tHD:STA  
tLOW  
4.0  
4.7  
µs  
High period of the SCL  
Clock  
tHIGH  
4.0  
µs  
tSU:STA  
tHD:DAT  
tSU:DAT  
tr  
Setup repeated START  
Data hold time (SDA input)  
Data setup time (SDA input)  
Clock Rise Time  
4.7  
0
µs  
ns  
ns  
ns  
ns  
µs  
250  
10% to 90%  
90% to 10%  
1000  
300  
tf  
Clock Fall Time  
tSU:STO  
Setup time STOP Condition  
4.0  
4.7  
Bus free time STOP to  
START  
tBUF  
µs  
6.18 I2C Timing — 400 kHz  
PARAMETER  
TEST CONDITIONS  
MIN  
NOM  
MAX  
UNIT  
fSCL  
Clock Operating Frequency  
START Condition Hold Time  
SCL duty cycle = 50%  
400  
kHz  
µs  
tHD:STA  
0.6  
Copyright © 2018–2019, Texas Instruments Incorporated  
7
BQ27Z561  
ZHCSIF7B MAY 2018REVISED AUGUST 2019  
www.ti.com.cn  
I2C Timing — 400 kHz (continued)  
PARAMETER  
TEST CONDITIONS  
MIN  
NOM  
MAX  
UNIT  
tLOW  
tHIGH  
Low period of the SCL Clock  
1.3  
µs  
High period of the SCL  
Clock  
600  
ns  
tSU:STA  
tHD:DAT  
tSU:DAT  
tr  
Setup repeated START  
Data hold time (SDA input)  
Data setup time (SDA input)  
Clock Rise Time  
600  
0
ns  
ns  
ns  
100  
10% to 90%  
90% to 10%  
300  
300  
ns  
ns  
µs  
tf  
Clock Fall Time  
tSU:STO  
Setup time STOP Condition  
0.6  
1.3  
Bus free time STOP to  
START  
tBUF  
µs  
6.19 HDQ Timing  
PARAMETER  
TEST CONDITIONS  
MIN  
NOM  
MAX  
UNIT  
tB  
Break Time  
190  
µs  
µs  
µs  
µs  
µs  
µs  
µs  
µs  
µs  
tBR  
Break Recovery Time  
Host Write 1 Time  
40  
0.5  
86  
tHW1  
tHW0  
tCYCH  
tCYCD  
tDW1  
tDW0  
tRSPS  
Host drives HDQ  
Host drives HDQ  
Device drives HDQ  
Device drives HDQ  
Device drives HDQ  
Device drives HDQ  
Device drives HDQ  
50  
Host Write 0 Time  
145  
Cycle Time, Host to device  
Cycle Time, device to Host  
Device Write 1 Time  
Device Write 0 Time  
Device Response Time  
190  
190  
32  
205  
250  
50  
80  
145  
950  
190  
Host drives HDQ after device drives  
HDQ  
tTRND  
tRISE  
tRST  
Host Turn Around Time  
250  
2.2  
µs  
µs  
s
HDQ Line Rising Time to  
Logic 1  
1.8  
Host drives HDQ low before device  
reset  
HDQ Reset  
SDA  
t
BUF  
t
t
LOW  
t
f
HD;STA  
t
r
t
t
SP  
t
r
f
SCL  
t
t
SU;STA  
t
SU;STO  
HD;STA  
t
HIGH  
t
t
SU;DAT  
HD;DAT  
STOP START  
START  
REPEATED  
START  
Figure 1. I2C Timing  
8
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1.2V  
t
t
(R ISE)  
(BR )  
t
(B)  
(b) H D Q line rise tim e  
(a) Break and Break R ecovery  
t
(D W 1)  
t
(H W 1)  
t
(D W 0)  
(C YC D )  
t
(H W 0)  
(C YC H )  
t
t
(d) Gauge Transm itted Bit  
(c) H ost Transm itted Bit  
7-bit address  
1-bit  
R/W  
8-bit data  
Break  
t
(R SPS)  
(e) Gauge to Host Response  
t
(R ST )  
(f) H D Q R eset  
a . H D Q Bre a kin g  
b . R ise tim e o f H D Q lin e  
c. H D Q H o st to fu e l g a u g e co m m u n ica tio n  
d . Fu e l g a u g e to H o st co m m u n ica tio n  
e . Fu e l g a u g e to H o st re sp o n se fo rm a t  
f. H D Q H o st to fu e l g a u g e  
Figure 2. HDQ Timing  
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6.20 Typical Characteristics  
1.8  
1.795  
1.79  
1.21  
1.208  
1.206  
1.204  
1.202  
1.2  
Min  
Nom  
Max  
1.785  
1.78  
Min  
Nom  
Max  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
Temperature (èC)  
Temperature (èC)  
D001  
D002  
BAT Min = 2 V  
BAT Nom = 3.6 V  
BAT Max = 5 V  
BAT Min = 2 V  
BAT Nom = 3.6 V  
BAT Max = 5 V  
Figure 3. REF1 Voltage Versus Battery and Temperature  
Figure 4. LDO Voltage Versus Battery and Temperature  
66  
20  
15  
10  
5
Min  
Nom  
Max  
65.8  
65.6  
65.4  
65.2  
65  
0
Min  
Nom  
Max  
-5  
64.8  
-10  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
Temperature (èC)  
Temperature (èC)  
D003  
D004  
BAT Min = 2 V  
BAT Nom = 3.6 V  
BAT Max = 5 V  
BAT Min = 2 V  
BAT Nom = 3.6 V  
BAT Max = 5 V  
Figure 5. LFO Frequency Versus Battery and Temperature  
Figure 6. ADVC Offset Voltage Versus Battery and  
Temperature  
7 Detailed Description  
7.1 Overview  
The BQ27Z561 gas gauge is a fully integrated battery manager that employs flash-based firmware to provide a  
complete solution for battery-stack architectures composed of 1-series cells. The BQ27Z561 device interfaces  
with a host system via an I2C or HDQ protocol. High-performance, integrated analog peripherals enable support  
for a sense resistor down to 1 mΩ, and simultaneous current/voltage data conversion for instant power  
calculations. The following sections detail all of the major component blocks included as part of the BQ27Z561  
device.  
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7.2 Functional Block Diagram  
BAT_SNS  
BAT  
VSS  
TS  
GPIO  
Internal  
Temp  
Sensor  
REG18  
CE  
ADC MUX  
REF1  
CC  
SRP  
SRN  
ADC  
HFO  
LFO  
REF2  
INT  
PULS  
CC/ADC  
Digital  
Filter  
IO and  
Interrupt  
Controller  
SDA/HDQ  
COM  
Engine  
Test  
Interface  
Timers  
SCL  
Data (8bit)  
DMAddr (16bit)  
bqBMP  
CPU  
PMAddr  
(16 bit)  
PMInstr  
(8bit)  
ROM  
12-  
kBytes  
Program Flash  
32-kBytes  
Data Flash  
4-kBytes  
Data SRAM  
2-kBytes  
Copyright © 2017, Texas Instruments Incorporated  
7.3 Feature Description  
7.3.1 BQ27Z561 Processor  
The BQ27Z561 device uses a custom TI-proprietary processor design that features a Harvard architecture and  
operates at frequencies up to 4.2 MHz. Using an adaptive, three-stage instruction pipeline, the BQ27Z561  
processor supports variable instruction lengths of 8, 16, or 24 bits.  
7.3.2 Battery Parameter Measurements  
The BQ27Z561 device measures cell voltage and current simultaneously, and also measures temperature to  
calculate the information related to remaining capacity, full charge capacity, state-of-health, and other gauging  
parameters.  
7.3.2.1 Coulomb Counter (CC)  
The first ADC is an integrating analog-to-digital converter designed specifically for tracking charge and discharge  
activity, or coulomb counting, of a rechargeable battery. It features a single-channel differential input that  
converts the voltage difference across a sense resistor between the SRP and SRN terminals with a resolution of  
3.74 µV.  
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Feature Description (continued)  
7.3.2.2 CC Digital Filter  
The CC digital filter generates a 16-bit conversion value from the delta-sigma CC front-end. Its FIR filter uses the  
HFO clock output. New conversions are available every 1 s.  
7.3.2.3 ADC Multiplexer  
The ADC multiplexer provides selectable connections to the external pins BAT, BAT_SNS, TS, the internal  
temperature sensor, internal reference voltages, internal 1.8-V regulator, and VSS ground reference input. In  
addition, the multiplexer can independently enable the TS input connection to the internal thermistor biasing  
circuitry, and enables the user to short the multiplexer inputs for test and calibration purposes.  
7.3.2.4 Analog-to-Digital Converter (ADC)  
The second ADC is a 16-bit delta-sigma converter designed for general-purpose measurements. The ADC  
automatically scales the input voltage range during sampling based on channel selection. The converter  
resolution is a function of its full-scale range and number of bits, yielding a 38-µV resolution.  
7.3.2.5 Internal Temperature Sensor  
An internal temperature sensor is available on the BQ27Z561 device to reduce the cost, power, and size of the  
external components necessary to measure temperature. It is available for connection to the ADC using the  
multiplexer, and is ideal for quickly determining pack temperature under a variety of operating conditions.  
7.3.2.6 External Temperature Sensor Support  
The TS input is enabled with an internal 18-kΩ (Typ.) linearization pull-up resistor to support the use of a 10-kΩ  
(25°C) NTC external thermistor, such as the Semitec 103AT-2. The NTC thermistor should be connected  
between VSS and the individual TS pin. The analog measurement is then taken via the ADC through its input  
multiplexer. If a different thermistor type is required, then changes to configurations may be required.  
REG18  
TS  
ADC  
NTC  
Figure 7. External Thermistor Biasing  
7.3.3 Power Supply Control  
The BQ27Z561 device uses the BAT pin as its power source. BAT powers the internal voltage sources that  
supply references for the device. BAT_SNS is a non-current carrying path and used at the Kelvin reference for  
BAT.  
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Feature Description (continued)  
7.3.4 Bus Communication Interface  
The BQ27Z561 device has an I2C bus communication interface. Alternatively, the BQ27Z561 can be configured  
to communicate through the HDQ pin (shared with SDA).  
NOTE  
Once the device is switched to the HDQ protocol, it is not reversible.  
7.3.5 Low Frequency Oscillator  
The BQ27Z561 device includes a low frequency oscillator (LFO) running at 65.536 kHz.  
7.3.6 High Frequency Oscillator  
The BQ27Z561 includes a high frequency oscillator (HFO) running at 16.78 MHz. It is frequency locked to the  
LFO output and scaled down to 8.388 MHz with a 50% duty cycle.  
7.3.7 1.8-V Low Dropout Regulator  
The BQ27Z561 device contains an integrated capacitor-less 1.8-V LDO (REG18) that provides regulated supply  
voltage for the device CPU and internal digital logic.  
7.3.8 Internal Voltage References  
The BQ27Z561 device provides two internal voltage references. REF1 is used by REG18, oscillators, and CC.  
REF2 is used by the ADC.  
7.3.9 Gas Gauging  
This device uses the Impedance Track™ technology to measure and determine the available charge in battery  
cells. See the Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm Application  
Report (SLUA450) for further details.  
7.3.10 Charge Control Features  
This device supports charge control features, such as:  
Reports charging voltage and charging current based on the active temperature range—JEITA temperature  
ranges T1, T2, T3, T4, T5, and T6  
Provides more complex charging profiles, including sub-ranges within a standard temperature range  
Reports the appropriate charging current required for constant current charging, and the appropriate charging  
voltage needed for constant voltage charging to a smart charger, using the bus communication interface  
Selects the chemical state-of-charge of each battery cell using the Impedance Track method  
Reports charging faults and indicates charge status via charge and discharge alarms  
7.3.11 Authentication  
This device supports security with the following features, which can be enabled if desired:  
Authentication by the host using the SHA-256 method  
The gas gauge requires SHA-256 authentication before the device can be unsealed or allow full access.  
7.4 Device Functional Modes  
This device supports four modes, but the current consumption varies, based on firmware control of certain  
functions and modes of operation:  
NORMAL mode: In this mode, the device performs measurements, calculations, protections, and data  
updates every 250-ms intervals. Between these intervals, the device is operating in a reduced power stage to  
minimize total average current consumption.  
SLEEP mode: In this mode, the device performs measurements, calculations, and data updates in adjustable  
time intervals. Between these intervals, the device is operating in a reduced power stage to minimize total  
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Device Functional Modes (continued)  
average current consumption.  
DEEP SLEEP mode: In this mode, the current is reduced slightly while current and voltage are still measured  
periodically, with a user-defined time between reads.  
OFF mode: The device is completely disabled by pulling CE low. CE disables the internal voltage rail. All non-  
volatile memory is unprotected.  
7.4.1 Lifetime Logging Features  
The device supports data logging of several key parameters for warranty and analysis:  
Maximum and minimum cell temperature  
Maximum current in CHARGE or DISCHARGE mode  
Maximum and minimum cell voltages  
7.4.2 Configuration  
The device supports accurate data measurements and data logging of several key parameters.  
7.4.2.1 Coulomb Counting  
The device uses an integrating delta-sigma analog-to-digital converter (ADC) for current measurement. The ADC  
measures charge/discharge flow of the battery by measuring the voltage across a very small external sense  
resistor. The integrating ADC measures a bipolar signal from a range of –100 mV to 100 mV, with a positive  
value when V(SRP) – V(SRN), indicating charge current and a negative value indicating discharge current.  
The current measurement is performed by measuring the voltage drop across the external sense resistor, which  
can be as low as 1 mΩ, and the polarity of the differential voltage determines if the cell is in the CHARGE or  
DISCHARGE mode.  
7.4.2.2 Cell Voltage Measurements  
The BQ27Z561 gas gauge measures the cell voltage at 1-s intervals using the ADC. This measured value is  
internally scaled for the ADC and is calibrated to reduce any errors due to offsets. This data is also used for  
calculating the impedance of the cell for Impedance Track gas gauging.  
7.4.2.3 Auto Calibration  
The auto-calibration feature helps to cancel any voltage offset across the SRP and SRN pins for accurate  
measurement of the cell voltage, charge/discharge current, and thermistor temperature. The auto-calibration is  
performed when there is no communication activity for a minimum of 5 s on the bus lines.  
7.4.2.4 Temperature Measurements  
This device has an internal sensor for on-die temperature measurements, and the ability to support an external  
temperature measurement via the external NTC on the TS pin. These two measurements are individually  
enabled and configured.  
8 Applications and Implementation  
NOTE  
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
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8.1 Application Information  
The BQ27Z561 gas gauge can be used with a 1-series li-ion/Li Polymer battery pack. To implement and design a  
comprehensive set of parameters for a specific battery pack, the user needs Battery Management Studio  
(bqStudio), which is a graphical user-interface tool installed on a PC during development. The firmware installed  
in the product has default values, which are summarized in the BQ27Z561 Technical Reference Manual  
(SLUUBO7). Using the bqStudio tool, these default values can be changed to cater to specific application  
requirements during development once the system parameters, such as enable/disable of certain features for  
operation, cell configuration, chemistry that best matches the cell used, and more are known. The final flash  
image, which is extracted once configuration and testing are complete, will be used for mass production and is  
referred to as the "golden image."  
8.2 Typical Applications  
The following is an example BQ27Z561 application schematic for a single-cell battery pack.  
PACK+  
Protector  
IC  
CE  
Tie to CPU for  
direct control  
SDA/HDQ  
SCL  
BAT_SNS  
BAT  
INT  
+
-
1 µF  
PULS  
Battery  
NU  
TS  
Thermistor  
10 k  
VSS  
SRN  
SRP  
0.1 mF  
RSRN  
100 Ω  
RSRP  
100 Ω  
PACK-  
RSENSE  
1 mΩ  
Figure 8. BQ27Z561 1-Series Cell Typical Implementation  
8.2.1 Design Requirements (Default)  
Design Parameter  
Cell Configuration  
Design Capacity  
Device Chemistry  
Design Voltage  
Example  
1s1p (1 series with 1 parallel)  
5300 mAh  
li-ion  
4000 mV  
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Typical Applications (continued)  
Design Parameter  
Example  
Cell Low Voltage  
2500 mV  
8.2.2 Detailed Design Procedure  
8.2.2.1 Changing Design Parameters  
For the firmware settings needed for the design requirements, refer to the BQ27Z561 Technical Reference  
Manual (SLUUBO7).  
To change design capacity, set the data flash value (in mAh) in the Gas Gauging: Design: Design Capacity  
register.  
To set device chemistry, go to the data flash I2C Configuration: Data: Device Chemistry. The bqStudio  
software automatically populates the correct chemistry identification. This selection is derived from using the  
bqCHEM feature in the tools and choosing the option that matches the device chemistry from the list.  
To set the design voltage, go to Gas Gauging: Design: Design Voltage register.  
To set the Cell Low Voltage or clear the Cell Low Voltage, use Settings: Configuration: Init Voltage Low  
Set or Clear. This is used to set the cell voltage level that will set (clear) the [VOLT_LO] bit in the Interrupt  
Status register.  
To enable the internal temperature and the external temperature sensors: Set Settings:Configuration:  
Temperature Enable: Bit 0 (TSInt) = 1 for the internal sensor; set Bit 1 (TS1) = 1 for the external sensor.  
8.2.3 Calibration Process  
The calibration of current, voltage, and temperature readings is accessible by writing 0xF081 or 0xF082 to  
ManufacturerAccess(). A detailed procedure is included in the BQ27Z561 Technical Reference Manual  
(SLUUBO7) in the Calibration section. The description allows for calibration of cell voltage measurement offset,  
battery voltage, current calibration, coulomb counter offset, PCB offset, CC gain/capacity gain, and temperature  
measurement for both internal and external sensors.  
8.2.4 Gauging Data Updates  
When a battery pack enabled with the BQ27Z561 gas gauge is cycled, the value of FullChargeCapacity()  
updates several times, including the onset of charge or discharge, charge termination, temperature delta,  
resistance updates during discharge, and relaxation. Figure 9 shows actual battery voltage, load current, and  
FullChargeCapacity() when some of those updates occur during a single application cycle.  
Update points from the plot include:  
Charge termination at 7900 s  
Relaxation at 9900 s  
Resistance update at 11500 s  
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8.2.4.1 Application Curve  
Figure 9. Full Charge Capacity Tracking (X-Axis Is Seconds)  
9 Power Supply Requirements  
The only power supply is the BAT pin, which is connected to the positive terminal of the battery. The input  
voltage for the BAT pin will have a minimum of 2 V to a maximum of 5 V.  
10 Layout  
10.1 Layout Guidelines  
The quality of the Kelvin connections at the sense resistor is critical. The sense resistor must have a  
temperature coefficient no greater than 50 ppm to minimize current measurement drift with temperature.  
Choose the value of the sense resistor to correspond to the available overcurrent and short-circuit ranges of  
the BQ27Z561 gas gauge. Select the smallest value possible to minimize the negative voltage generated on  
the BQ27Z561 VSS node during a short circuit. This pin has an absolute minimum of –0.3 V. Parallel  
resistors can be used as long as good Kelvin sensing is ensured. The device is designed to support a 1-mΩ  
to 3-mΩ sense resistor.  
BAT_SNS should be tied directly to the positive connection of the battery. It should not share a path with the  
BAT pin.  
In reference to the gas gauge circuit the following features require attention for component placement and  
layout: differential low-pass filter and I2C communication.  
The BQ27Z561 gas gauge uses an integrating delta-sigma ADC for current measurements. Add a 100-Ω  
resistor from the sense resistor to the SRP and SRN inputs of the device. Place a 0.1-μF filter capacitor  
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Layout Guidelines (continued)  
across the SRP and SRN inputs. If required for a circuit, 0.1-µF filter capacitors can be added for additional  
noise filtering for each sense input pin to ground. Place all filter components as close as possible to the  
device. Route the traces from the sense resistor in parallel to the filter circuit. Adding a ground plane around  
the filter network can provide additional noise immunity.  
The BQ27Z561 has an internal LDO that is internally compensated and does not require an external  
decoupling capacitor.  
The I2C clock and data pins have integrated high-voltage ESD protection circuits; however, adding a Zener  
diode and series resistor provides more robust ESD performance. The I2C clock and data lines have an  
internal pull-down. When the gas gauge senses that both lines are low (such as during removal of the pack),  
the device performs auto-offset calibration and then goes into SLEEP mode to conserve power.  
10.2 Layout Example  
No contact to NU  
(BAT_SNS trace on  
bottom layer)  
Tab -  
Tab +  
PACK +  
PACK -  
SDA/  
HDQ  
INT  
PULS  
VSS  
TS  
SCL  
RSRN  
BAT_  
SNS  
SRN  
SRP  
NU  
CE  
RSENSE  
BAT  
RSRP  
Weld  
Tab  
Weld  
Tab  
BAT -  
BAT +  
Battery  
BAT_SNS at  
Battery terminal  
Figure 10. BQ27Z561 Key Trace Board Layout  
18  
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11 器件和文档支持  
11.1 文档支持  
11.1.1 相关文档  
BQ27Z561 技术参考手册》 (SLUUBO7)  
Impedance Track 电池电量监测算法的理论及实现应用报告》(SLUA364)  
11.2 接收文档更新通知  
要接收文档更新通知,请导航至 ti.com. 上的器件产品文件夹。单击右上角的通知我进行注册,即可每周接收产品  
信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。  
11.3 社区资源  
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective  
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of  
Use.  
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration  
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help  
solve problems with fellow engineers.  
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and  
contact information for technical support.  
11.4 商标  
Impedance Track, E2E are trademarks of Texas Instruments.  
All other trademarks are the property of their respective owners.  
11.5 静电放电警告  
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可  
能会损坏集成电路。  
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可  
能会导致器件与其发布的规格不相符。  
11.6 Glossary  
SLYZ022 TI Glossary.  
This glossary lists and explains terms, acronyms, and definitions.  
12 机械、封装和可订购信息  
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知,且  
不会对此文档进行修订。如需获取此数据表的浏览器版本,请查阅左侧的导航栏。  
版权 © 2018–2019, Texas Instruments Incorporated  
19  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
BQ27Z561YPHR  
BQ27Z561YPHT  
ACTIVE  
ACTIVE  
DSBGA  
DSBGA  
YPH  
YPH  
12  
12  
3000 RoHS & Green  
250 RoHS & Green  
SAC396  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 85  
-40 to 85  
BQ27Z561  
BQ27Z561  
SAC396  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
9-Mar-2022  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
BQ27Z561YPHR  
BQ27Z561YPHT  
DSBGA  
DSBGA  
YPH  
YPH  
12  
12  
3000  
250  
180.0  
180.0  
8.4  
8.4  
1.83  
1.83  
2.2  
2.2  
0.53  
0.53  
4.0  
4.0  
8.0  
8.0  
Q1  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
9-Mar-2022  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
BQ27Z561YPHR  
BQ27Z561YPHT  
DSBGA  
DSBGA  
YPH  
YPH  
12  
12  
3000  
250  
182.0  
182.0  
182.0  
182.0  
20.0  
20.0  
Pack Materials-Page 2  
PACKAGE OUTLINE  
YPH0012  
DSBGA - 0.4 mm max height  
SCALE 7.000  
DIE SIZE BALL GRID ARRAY  
A
D
B
E
BALL A1  
INDEX AREA  
0.4 MAX  
C
SEATING PLANE  
0.05 C  
0.175  
0.125  
BALL TYP  
1 TYP  
0.5 TYP  
D
C
B
SYMM  
1.5  
TYP  
D: Max = 2.08 mm, Min = 2.02 mm  
E: Max = 1.705 mm, Min =1.644 mm  
0.5  
TYP  
A
3
1
2
0.25  
0.15  
12X  
C A  
SYMM  
0.015  
B
4222640/A 12/2015  
NanoFree Is a trademark of Texas Instruments.  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. NanoFreeTM package configuration.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
YPH0012  
DSBGA - 0.4 mm max height  
DIE SIZE BALL GRID ARRAY  
(0.5) TYP  
12X ( 0.23)  
3
1
2
A
(0.5) TYP  
B
C
SYMM  
D
SYMM  
LAND PATTERN EXAMPLE  
SCALE:30X  
0.05 MAX  
0.05 MIN  
(
0.23)  
METAL UNDER  
SOLDER MASK  
METAL  
(
0.23)  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
NON-SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
NOT TO SCALE  
4222640/A 12/2015  
NOTES: (continued)  
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.  
For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).  
www.ti.com  
EXAMPLE STENCIL DESIGN  
YPH0012  
DSBGA - 0.4 mm max height  
DIE SIZE BALL GRID ARRAY  
(0.5) TYP  
(R0.05) TYP  
12X ( 0.225)  
1
2
3
A
(0.5) TYP  
B
SYMM  
METAL  
TYP  
C
D
SYMM  
SOLDER PASTE EXAMPLE  
BASED ON 0.1 mm THICK STENCIL  
SCALE:40X  
4222640/A 12/2015  
NOTES: (continued)  
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.  
www.ti.com  
重要声明和免责声明  
TI“按原样提供技术和可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,  
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这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任:(1) 针对您的应用选择合适的 TI 产品,(2) 设计、验  
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