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BQ294533DRVR [TI]

适用于 2 节和 3 节锂离子电池的过压保护 | DRV | 6 | -40 to 85;
BQ294533DRVR
型号： BQ294533DRVR
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

适用于 2 节和 3 节锂离子电池的过压保护 | DRV | 6 | -40 to 85

电池 光电二极管
文件： 总24页 (文件大小：1917K)
中文：  中文翻译
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BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
BQ2945xy 适用于2 节和3 节串联锂离子电池的过压保护器件  
1 特性  
3 说明  
• 用于二级保护的2 节和3 节串联电池过压监控器  
• 固定可编程延迟计时器  
• 固定OVP 阈值  
BQ2945xy 系列产品是用于锂离子电池组系统的二级电  
压监控器和保护器。独立监控每节电池是否具有过压状  
态。根据配置，如果两节或三节电池中的任何电池存在  
过压，则在经过固定的延迟后会触发一个输出。在过压  
状态满足指定的延迟计时器条件后，该输出触发为高电  
平状态。  
– 可用范围为3.85V 至4.6V  
• 固定OVP 延迟选项：4s 或6.5s  
• 高精度过压保护：  
±10mV  
• 低功耗ICC ≈1µA  
器件信息  
器件型号(1)  
BQ2945xy  
封装尺寸（标称值）  
封装  
(VCELL(ALL) < VPROTECT  
)
SON (6)  
2.00mm × 2.00mm  
• 每节电池输入具有小于100nA 的低泄漏电流  
• 小型封装尺寸  
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附  
录。  
– 6 引脚SON  
2 应用  
• 为下列产品的锂离子电池组提供二级保护：  
– 平板电脑  
– 手写板电脑  
– 电动工具  
– 笔记本电脑  
– 便携式设备和仪器  
Pack +  
R
VD  
RIN  
V3  
OUT  
VDD  
V1  
C
IN  
VCELL3  
VCELL2  
VCELL1  
R
IN  
V2  
C
IN  
R
IN  
CVD  
VSS  
PWRPAD  
C
IN  
Pack–  
Copyright © 2017, Texas Instruments Incorporated  
简化版原理图  
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问  
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。  
English Data Sheet: SLUSAJ3  
 
 
 
BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
www.ti.com.cn  
Table of Contents  
9 Application and Implementation..................................10  
9.1 Application Information............................................. 10  
9.2 Typical Application.................................................... 10  
9.3 System Examples..................................................... 11  
10 Power Supply Recommendations..............................12  
11 Layout...........................................................................12  
11.1 Layout Guidelines................................................... 12  
11.2 Layout Example...................................................... 12  
12 Device and Documentation Support..........................13  
12.1 Device Support....................................................... 13  
12.2 Related Documentation.......................................... 13  
12.3 Receiving Notification of Documentation Updates..13  
12.4 支持资源..................................................................13  
12.5 Trademarks.............................................................13  
12.6 Electrostatic Discharge Caution..............................13  
12.7 术语表..................................................................... 13  
13 Mechanical, Packaging, and Orderable  
1 特性................................................................................... 1  
2 应用................................................................................... 1  
3 说明................................................................................... 1  
4 Revision History.............................................................. 2  
5 Device Comparison Table...............................................3  
6 Pin Configuration and Functions...................................3  
7 Specifications.................................................................. 4  
7.1 Absolute Maximum Ratings........................................ 4  
7.2 ESD Ratings............................................................... 4  
7.3 Recommended Operating Conditions.........................4  
7.4 Thermal Information....................................................4  
7.5 Electrical Characteristics.............................................5  
7.6 Typical Characteristics................................................6  
8 Detailed Description........................................................7  
8.1 Overview.....................................................................7  
8.2 Functional Block Diagram...........................................7  
8.3 Feature Description.....................................................7  
8.4 Device Functional Modes............................................8  
Information.................................................................... 13  
4 Revision History  
注：以前版本的页码可能与当前版本的页码不同  
Changes from Revision J (June 2022) to Revision K (August 2022)  
Page  
• Changed the BQ294534 device to Production Data...........................................................................................3  
• Changed the BQ294534 device to Production Data in the Electrical Characteristics ........................................5  
Changes from Revision I (May 2021) to Revision J (June 2022)  
Page  
• Added the PRODUCT PREVIEW BQ294534 device......................................................................................... 3  
• Added the PRODUCT PREVIEW BQ294534 device to the Electrical Characteristics ......................................5  
Changes from Revision H (December 2017) to Revision I (May 2021)  
Page  
• Changed the BQ294506 device to Production Data...........................................................................................3  
Changes from Revision G (November 2017) to Revision H (December 2017)  
Page  
• Added the BQ294506 device..............................................................................................................................3  
• Added the BQ294506 device to the Electrical Characteristics .......................................................................... 5  
Copyright © 2022 Texas Instruments Incorporated  
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Product Folder Links: BQ294502 BQ294504 BQ294506 BQ294512 BQ294522 BQ294524 BQ294532  
BQ294533 BQ294534 BQ294582 BQ294592  
 
BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
www.ti.com.cn  
5 Device Comparison Table  
TA  
PART NUMBER  
OVP (V)  
4.35  
4.35  
4.38  
4.4  
DELAY TIME (s)  
BQ294502  
BQ294504  
BQ294506  
BQ294512  
BQ294522  
BQ294524  
BQ294532  
BQ294533  
BQ294534  
BQ294582  
BQ294592  
4
6.5  
4
4
4.45  
4.45  
4.5  
4
6.5  
4
–40°C to +110°C  
4.5  
6.5  
4
4.55  
4.225  
4.3  
4
4
6 Pin Configuration and Functions  
V3  
1
2
3
6
5
4
OUT  
VDD  
V1  
Thermal  
Pad  
V2  
VSS  
Not to scale  
图6-1. DRV Package 6-Pin SON Top View  
表6-1. Pin Functions  
NUMBER  
NAME  
V3  
TYPE(1)  
DESCRIPTION  
1
2
3
4
5
6
IA  
IA  
Sense input for positive voltage of the third cell from the bottom of the stack.  
Sense input for positive voltage of the second cell from the bottom of the stack.  
Electrically connected to IC ground and negative terminal of the lowest cell in the stack.  
Sense input for positive voltage of the lowest cell in the stack.  
Power supply  
V2  
VSS  
V1  
P
IA  
VDD  
OUT  
P
OA1  
Output drive for external N-channel FET.  
VSS pin to be connected to the PWRPAD on the printed-circuit-board (PCB) for proper  
operation.  
PWRPAD  
—
—
(1) IA = Input Analog, OA = Output Analog, P = Power Connection  
Copyright © 2022 Texas Instruments Incorporated  
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Product Folder Links: BQ294502 BQ294504 BQ294506 BQ294512 BQ294522 BQ294524 BQ294532  
BQ294533 BQ294534 BQ294582 BQ294592  
 
 
 
 
BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
www.ti.com.cn  
7 Specifications  
7.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)(1) (2)  
MIN  
MAX  
30  
30  
8
UNIT  
Supply voltage  
Input voltage  
V
V
V
V
VDD–VSS  
–0.3  
–0.3  
–0.3  
–0.3  
V1–VSS or V2–VSS or V3–VSS+  
V3–V2 or V2–V1  
OUT–VSS  
Output voltage  
30  
Continuous total power dissipation, PTOT  
Lead temperature (soldering, 10 s), TSOLDER  
Storage temperature, Tstg  
See 节7.4.  
300  
150  
°C  
°C  
–65  
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply  
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If  
outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and  
this may affect device reliability, functionality, performance, and shorten the device lifetime.  
(2) See 图8-3.  
7.2 ESD Ratings  
VALUE  
±2000  
±500  
UNIT  
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)  
V(ESD)  
Electrostatic discharge  
V
Charged device model (CDM), per JEDEC specification JESD22-C101(2)  
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
7.3 Recommended Operating Conditions  
over operating free-air temperature range (unless otherwise noted)  
MIN  
MAX  
25  
UNIT  
V
(1)  
Supply voltage, VDD  
Input voltage  
3
0
5
V
V3–V2 or V2–V1 or V1–VSS  
Operating ambient temperature, TA  
110  
°C  
–40  
(1) See 节9.2.  
7.4 Thermal Information  
BQ2945xy  
DRV (SON)  
6 PINS  
186.4  
THERMAL METRIC(1)  
UNIT  
RθJA  
Junction-to-ambient thermal resistance  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
RθJC(top)  
RθJB  
Junction-to-case(top) thermal resistance  
Junction-to-board thermal resistance  
90.4  
110.7  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case(bottom) thermal resistance  
96.7  
ψJT  
90  
ψJB  
RθJC(bot)  
N/A  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics Application  
Report.  
Copyright © 2022 Texas Instruments Incorporated  
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Product Folder Links: BQ294502 BQ294504 BQ294506 BQ294512 BQ294522 BQ294524 BQ294532  
BQ294533 BQ294534 BQ294582 BQ294592  
 
 
 
 
 
 
 
 
 
 
 
BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
www.ti.com.cn  
7.5 Electrical Characteristics  
Typical values stated where TA = 25°C and VDD = 10.8 V, MIN/MAX values stated where TA = –40°C to +110°C and VDD  
=
3 V to 15 V (unless otherwise noted).  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
VOLTAGE PROTECTION THRESHOLD VCx  
BQ294502, fixed delay 4 s  
4.35  
4.35  
4.38  
4.4  
BQ294504, fixed delay 6.5 s  
BQ294506, fixed delay 4 s  
BQ294512, fixed delay 4 s  
BQ294522, fixed delay 4 s  
BQ294524, fixed delay 6.5 s  
BQ294532, fixed delay 4 s  
BQ294533, fixed delay 6.5 s  
BQ294534, fixed delay 4 s  
BQ294582, fixed delay 4 s  
BQ294592, fixed delay 4 s  
4.45  
4.45  
4.5  
V(PROTECT)  
Overvoltage Detection  
–
VOV  
V
4.5  
4.55  
4.225  
4.3  
Overvoltage Detection  
Hysteresis  
VHYS  
VHYS  
250  
300  
400  
mV  
TA = 25°C, BQ2945xy  
10  
7
mV  
mV  
–10  
–7  
VOA  
OV Detection Accuracy  
TA = 25°C, BQ294506 only  
–40  
–20  
–24  
–54  
44  
20  
24  
54  
TA = –40°C  
TA = 0°C  
TA = 60°C  
TA = 110°C  
mV  
mV  
OV Detection Accuracy  
due to Temperature  
VOA –DRIFT  
TA = 10°C to 45°C, BQ294506 only  
15  
–15  
SUPPLY AND LEAKAGE CURRENT  
(V3–V2) = (V2–V1) = (V1–VSS) = 4 V (See 图8-3  
for reference.)  
1
2
ICC  
Supply Current  
µA  
µA  
(V3–V2) = (V2–V1) = (V1–VSS) = 2.8 V with TA =  
–40°C to 60°C  
1.25  
Measured at V3, V2, and V1 = 4 V  
(V2–V1) = (V1–VSS) = 4 V  
TA = 0°C to 60°C (See 图8-3 for reference.)  
Input Current at Vx  
Pins  
IIN  
0.1  
–0.1  
OUTPUT DRIVE OUT  
(V3–V2) or (V2–V1) or (V1–VSS) > VOV  
VDD = 7.2 V, IOH = 100 µA, TA = –40°C to +110°C  
6
V
V
Two of the three cells are short circuit and only one  
cell is powered  
(V3–V2) or (V2–V1) or (V1–VSS) > VOV  
VDD = Vx (Cell voltage), IOH = 100 µA, TA = –40°C to  
+110°C  
VDD –  
VOUT  
Output Drive Voltage  
0.2  
(V3–V2), (V2–V1), and (V1–VSS) < VOV, IOL = 100  
µA, TA = 25°C  
TA = –40°C to +110°C  
250  
400  
4.5  
mV  
mA  
OUT Short Circuit  
Current  
IOUT(Short)  
OUT = 0 V (V3–V2) or (V2–V1) or (V1–VSS) > VOV  
tR  
Output Rise Time  
Output Impedance  
CL = 1 nF, VOH(OUT) = 0 V to 5 V(1)  
5
2
µs  
ZO  
5
kΩ  
FIXED DELAY TIMER  
Fixed Delay, BQ2945xy with delay set to 4s typ  
Fixed Delay, BQ2945xy with delay set to 6.5 s  
3.2  
5.2  
4
4.8  
7.8  
Fault Detection Delay  
Time  
tDELAY  
s
6.5  
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Product Folder Links: BQ294502 BQ294504 BQ294506 BQ294512 BQ294522 BQ294524 BQ294532  
BQ294533 BQ294534 BQ294582 BQ294592  
 
 
BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
www.ti.com.cn  
7.5 Electrical Characteristics (continued)  
Typical values stated where TA = 25°C and VDD = 10.8 V, MIN/MAX values stated where TA = –40°C to +110°C and VDD  
=
3 V to 15 V (unless otherwise noted).  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Fault Detection Delay  
Time in Test Mode  
tDELAY_CTM  
Fixed Delay (Internal settings)  
15  
ms  
(1) Specified by design. It is not 100% tested in production.  
7.6 Typical Characteristics  
1.3  
1.2  
1.1  
1
4.38  
4.37  
4.36  
4.35  
4.34  
4.33  
4.32  
4.31  
Min  
Max  
Mean  
0.9  
0.8  
0.7  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
Temperature (èC)  
D002  
Temperature (èC)  
D001  
图7-2. BQ294502 Overvoltage Threshold (OVT) vs  
图7-1. ICC Current Consumption vs Temperature  
Temperature  
325  
324  
323  
322  
321  
320  
319  
318  
317  
316  
315  
-3.85  
-3.9  
-3.95  
-4  
-4.05  
-4.1  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
Temperature (èC)  
Temperature (èC)  
D004  
D003  
图7-4. Output Current IOUT vs Temperature  
图7-3. Hysteresis VHYS vs Temperature  
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Product Folder Links: BQ294502 BQ294504 BQ294506 BQ294512 BQ294522 BQ294524 BQ294532  
BQ294533 BQ294534 BQ294582 BQ294592  
 
 
BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
www.ti.com.cn  
8
7.5  
7
3-Cell Data  
2-Cell Data  
6.5  
6
5.5  
5
4.5  
4
0
100 200 300 400 500 600 700 800 900 1000  
Output Current (mA)  
D005  
图7-5. Output Voltage vs Output Current  
8 Detailed Description  
8.1 Overview  
The BQ2945xy is a second-level overvoltage (OV) protector. Each cell is monitored independently by comparing  
the actual cell voltage to a protection voltage threshold, VOV. The protection threshold is preprogrammed at the  
factory with a range from 3.85 V to 4.65 V.  
8.2 Functional Block Diagram  
PACK+  
RVD  
CVD  
VDD  
REG  
R
IN  
V3  
V2  
INT_EN  
VOV  
Delay  
Timer  
C
IN  
R
IN  
OUT  
C
IN  
V1  
R
IN  
OSC  
C
IN  
VSS  
PWRPAD  
PACK–  
Copyright © 2017, Texas Instruments Incorporated  
8.3 Feature Description  
The voltage sensing for each cell is done independently using a multiplexer. The method of overvoltage  
detection is comparing the voltage to an overvoltage protection voltage VOV. Once the voltage exceeds the  
programmed fixed value, the delay timer circuit is activated. This delay (tDELAY) is fixed for either a 4-s or 6.5-s  
delay. When these conditions are satisfied, the OUT terminal is transitioned to a high level. This output (OUT) is  
released to a low condition if all of the cell inputs (Vx) are below the OVP threshold minus the Vhys.  
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Product Folder Links: BQ294502 BQ294504 BQ294506 BQ294512 BQ294522 BQ294524 BQ294532  
BQ294533 BQ294534 BQ294582 BQ294592  
 
 
 
 
BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
www.ti.com.cn  
VOV  
VOV–VHYS  
tDELAY  
OUT (V)  
图8-1. Timing for Overvoltage Sensing  
8.3.1 Sense Positive Input for VX  
This is an input to sense each single battery cell voltage. A series resistor and a capacitor across the cell for  
each input is required for noise filtering and stable voltage monitoring.  
8.3.2 Output Drive, OUT  
The gate of an external N-channel MOSFET is connected to this terminal. This output transitions to a high level  
when an overvoltage condition is detected and after the programmed delay timer. OUT resets to a low level if the  
cell voltage falls below the VOV threshold before the fixed delay timer expires.  
8.3.3 Supply Input, VDD  
This terminal is the unregulated input power source for the IC. A series resistor is connected to limit the current,  
and a capacitor is connected to ground for noise filtering.  
8.3.4 Thermal Pad, PWRPAD  
For correct operation, the power pad (PWRPAD) is connected to the VSS terminal on the PCB.  
8.4 Device Functional Modes  
8.4.1 NORMAL Mode  
When all of the cell voltages are below the overvoltage threshold, VOV, the device operates in NORMAL mode.  
The device monitors the differential cell voltages connected across (V1–VSS), (V2–V1) and (V3–V2). The  
OUT pin is inactive in this mode.  
8.4.2 OVERVOLTAGE Mode  
OVERVOLTAGE mode is detected if any of the cell voltages exceeds the overvoltage threshold, VOV for the  
configured OV delay time, tDELAY. The OUT pin pulls high internally. An external FET then turns on, shorting the  
fuse to ground, which enables the battery or charger power to blow the fuse. When all of the cell voltages fall  
below (VOV–VHYS), the device returns to NORMAL mode.  
8.4.3 Customer Test Mode  
Customer Test Mode (CTM) helps to reduce test time for checking the overvoltage delay timer parameter once  
the circuit is implemented in the battery pack. To enter CTM, set VDD to at least 10 V higher than V3 (see 图  
8-2). The delay timer is greater than 10 ms, but considerably shorter than the timer delay in normal operation. To  
exit CTM, remove the VDD to VC3 voltage differential of 10 V so that the decrease in this value automatically  
causes an exit.  
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Product Folder Links: BQ294502 BQ294504 BQ294506 BQ294512 BQ294522 BQ294524 BQ294532  
BQ294533 BQ294534 BQ294582 BQ294592  
 
BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
www.ti.com.cn  
CAUTION  
Avoid exceeding any Absolute Maximum Voltages on any pins when placing the part into CTM. Also  
avoid exceeding Absolute Maximum Voltages for the individual cell voltages (V3–V2), (V2–V1),  
and (V1–VSS). Stressing the pins beyond the rated limits may cause permanent damage to the  
device.  
图8-2 shows the timing for CTM.  
10 V  
V
OV  
V
–V  
HYS  
OV  
t
10 ms  
>
DELAY  
OUT (V)  
图8-2. Timing for Customer Test Mode  
图8-3 shows the measurement for current consumption for the product for both VDD and Vx.  
bq2945xx  
IIN  
1
2
3
V3  
OUT  
VDD  
V1  
6
5
4
3.6 V  
3.6 V  
3.6 V  
ICC  
IIN  
V2  
IIN  
VSS  
PWRPAD  
图8-3. Configuration for IC Current Consumption Test  
Copyright © 2022 Texas Instruments Incorporated  
Submit Document Feedback  
9
Product Folder Links: BQ294502 BQ294504 BQ294506 BQ294512 BQ294522 BQ294524 BQ294532  
BQ294533 BQ294534 BQ294582 BQ294592  
 
 
BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
www.ti.com.cn  
9 Application and Implementation  
备注  
Information in the following applications sections is not part of the TI component specification, and TI  
does not warrant its accuracy or completeness. TI’s customers are responsible for determining  
suitability of components for their purposes. Customers should validate and test their design  
implementation to confirm system functionality.  
9.1 Application Information  
The BQ2945xy devices are second-level protectors used for overvoltage protection for the battery pack in the  
application. The device, when configuring the OUT pin with active high, drives an NMOS FET that connects the  
fuse to ground in the event of a fault condition. This provides a shorted path to use the battery or charger power  
to blow the fuse and cut the power path.  
9.2 Typical Application  
Pack +  
R
VD  
RIN  
V3  
OUT  
VDD  
V1  
C
IN  
VCELL3  
VCELL2  
VCELL1  
R
IN  
V2  
C
IN  
R
IN  
CVD  
VSS  
PWRPAD  
C
IN  
Pack–  
Copyright © 2017, Texas Instruments Incorporated  
图9-1. Application Configuration Schematic  
9.2.1 Design Requirements  
Changes to the ranges stated in 表 9-1 impact the accuracy of the cell measurements. 图 9-1 shows each  
external component.  
表9-1. Parameters  
PARAMETER  
EXTERNAL COMPONENT  
MIN  
100  
0.1  
TYP  
MAX UNIT  
Voltage monitor filter resistance  
Voltage monitor filter capacitance  
Supply voltage filter resistance  
Supply voltage filter capacitance  
RIN  
CIN  
1000  
4700  
1
Ω
µF  
RVD  
CVD  
100  
1K  
Ω
0.1  
µF  
9.2.2 Detailed Design Procedure  
1. Determine the overvoltage threshold and delay time. Select the proper device from the table in 节5 or  
contact TI for a different configuration.  
2. Determine the number of cell in series. The device supports 2-series to 3-series cell configurations. For a 2-  
series configuration, the V3 pin is shorted to V2.  
3. To connect to the device, follow the application configuration schematic (see 图9-1).  
Copyright © 2022 Texas Instruments Incorporated  
10  
Submit Document Feedback  
Product Folder Links: BQ294502 BQ294504 BQ294506 BQ294512 BQ294522 BQ294524 BQ294532  
BQ294533 BQ294534 BQ294582 BQ294592  
 
 
 
 
 
BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
www.ti.com.cn  
9.2.3 Application Curves  
4.38  
Min  
Max  
325  
324  
323  
322  
321  
320  
319  
318  
317  
316  
315  
4.37  
Mean  
4.36  
4.35  
4.34  
4.33  
4.32  
4.31  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
Temperature (èC)  
Temperature (èC)  
D002  
D003  
图9-2. OVT vs Temperature  
图9-3. VHYS vs Temperature  
9.3 System Examples  
Pack +  
100  
1k  
bq2945xx  
V3  
OUT  
VDD  
V1  
VCELL3  
VCELL2  
VCELL1  
0.1µF  
1k  
1k  
V2  
0.1µF  
VSS  
0.1 µF  
PWRPAD  
0.1µF  
Pack –  
图9-4. 3-Series Cell Configuration with Fixed Delay  
Pack +  
100  
bq2945xx  
OUT  
VDD  
V1  
V3  
1k  
1k  
V2  
VCELL2  
VCELL1  
0.1µF  
VSS  
0.1µF  
PWRPAD  
0.1µF  
Pack –  
图9-5. 2-Series Cell Configuration with Internal Fixed Delay  
Copyright © 2022 Texas Instruments Incorporated  
Submit Document Feedback  
11  
Product Folder Links: BQ294502 BQ294504 BQ294506 BQ294512 BQ294522 BQ294524 BQ294532  
BQ294533 BQ294534 BQ294582 BQ294592  
 
BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
www.ti.com.cn  
10 Power Supply Recommendations  
The maximum power of this device is 25 V on VDD.  
11 Layout  
11.1 Layout Guidelines  
• Ensure the RC filters for the V1 and VDD pins are placed as close as possible to the target terminal, reducing  
the tracing loop area.  
• Route the VSS pin to the CELL–terminal.  
• Ensure the trace connecting the fuse to the gate, source of the NFET to the Pack–is sufficient to withstand  
the current during a fuse blown event.  
11.2 Layout Example  
Place the RC filters close to the  
device terminals  
Power Trace Line  
Pack +  
NC  
V2  
OUT  
VDD  
Pack œ  
PWPD  
VCELL  
VSS  
VSS  
Ensure trace can support sufficient current  
flow for fuse blow  
Connect the VSS pins to the CELL- side  
图11-1. Layout Schematic  
Copyright © 2022 Texas Instruments Incorporated  
12  
Submit Document Feedback  
Product Folder Links: BQ294502 BQ294504 BQ294506 BQ294512 BQ294522 BQ294524 BQ294532  
BQ294533 BQ294534 BQ294582 BQ294592  
 
 
 
 
BQ294502, BQ294504, BQ294506, BQ294512, BQ294522  
BQ294524, BQ294532, BQ294533, BQ294534, BQ294582, BQ294592  
ZHCS477K –SEPTEMBER 2011 –REVISED AUGUST 2022  
www.ti.com.cn  
12 Device and Documentation Support  
12.1 Device Support  
12.1.1 第三方产品免责声明  
TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此  
类产品或服务单独或与任何TI 产品或服务一起的表示或认可。  
12.2 Related Documentation  
• Semiconductor and IC Package Thermal Metrics Application Report  
12.3 Receiving Notification of Documentation Updates  
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on  
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For  
change details, review the revision history included in any revised document.  
12.4 支持资源  
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解  
答或提出自己的问题可获得所需的快速设计帮助。  
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅  
TI 的《使用条款》。  
12.5 Trademarks  
TI E2E™ is a trademark of Texas Instruments.  
所有商标均为其各自所有者的财产。  
12.6 Electrostatic Discharge Caution  
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled  
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may  
be more susceptible to damage because very small parametric changes could cause the device not to meet its published  
specifications.  
12.7 术语表  
TI 术语表  
本术语表列出并解释了术语、首字母缩略词和定义。  
13 Mechanical, Packaging, and Orderable Information  
The following pages include mechanical, packaging, and orderable information. This information is the most  
current data available for the designated devices. This data is subject to change without notice and revision of  
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.  
Copyright © 2022 Texas Instruments Incorporated  
Submit Document Feedback  
13  
Product Folder Links: BQ294502 BQ294504 BQ294506 BQ294512 BQ294522 BQ294524 BQ294532  
BQ294533 BQ294534 BQ294582 BQ294592  
 
 
 
 
 
 
 
 
 
PACKAGE OPTION ADDENDUM  
www.ti.com  
18-Jul-2023  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
BQ294502DRVR  
BQ294502DRVT  
BQ294504DRVR  
BQ294504DRVT  
BQ294506DRVR  
BQ294506DRVT  
BQ294512DRVR  
BQ294512DRVT  
BQ294522DRVR  
BQ294522DRVT  
BQ294524DRVR  
BQ294524DRVT  
BQ294532DRVR  
BQ294532DRVT  
BQ294533DRVR  
BQ294533DRVT  
BQ294534DRVR  
BQ294582DRVR  
BQ294582DRVT  
BQ294592DRVR  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000 RoHS & Green  
250 RoHS & Green  
3000 RoHS & Green  
250 RoHS & Green  
3000 RoHS & Green  
250 RoHS & Green  
3000 RoHS & Green  
250 RoHS & Green  
3000 RoHS & Green  
250 RoHS & Green  
3000 RoHS & Green  
250 RoHS & Green  
3000 RoHS & Green  
250 RoHS & Green  
3000 RoHS & Green  
250 RoHS & Green  
NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 110  
-40 to 85  
-40 to 85  
-40 to 85  
4502  
4502  
4504  
4504  
4506  
4506  
4512  
4512  
4522  
4522  
4524  
4524  
4532  
4532  
4533  
4533  
4534  
4582  
4582  
4592  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
Samples  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
NIPDAU  
3000 RoHS & Green  
3000 RoHS & Green  
250  
RoHS & Green  
3000 RoHS & Green  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
18-Jul-2023  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
BQ294592DRVT  
ACTIVE  
WSON  
DRV  
6
250  
RoHS & Green  
NIPDAU  
Level-1-260C-UNLIM  
-40 to 85  
4592  
Samples  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
18-Jul-2023  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
K0  
P1  
W
B0  
Reel  
Diameter  
Cavity  
A0  
A0 Dimension designed to accommodate the component width  
B0 Dimension designed to accommodate the component length  
K0 Dimension designed to accommodate the component thickness  
Overall width of the carrier tape  
W
P1 Pitch between successive cavity centers  
Reel Width (W1)  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Sprocket Holes  
Q1 Q2  
Q3 Q4  
Q1 Q2  
Q3 Q4  
User Direction of Feed  
Pocket Quadrants  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
BQ294502DRVR  
BQ294502DRVR  
BQ294502DRVT  
BQ294502DRVT  
BQ294504DRVR  
BQ294504DRVR  
BQ294504DRVT  
BQ294504DRVT  
BQ294506DRVR  
BQ294506DRVR  
BQ294506DRVT  
BQ294512DRVR  
BQ294512DRVT  
BQ294522DRVR  
BQ294522DRVT  
BQ294524DRVR  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000  
3000  
250  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
250  
3000  
3000  
250  
250  
3000  
3000  
250  
3000  
250  
3000  
250  
3000  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
18-Jul-2023  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
BQ294524DRVR  
BQ294524DRVT  
BQ294524DRVT  
BQ294532DRVR  
BQ294532DRVR  
BQ294532DRVT  
BQ294532DRVT  
BQ294533DRVR  
BQ294533DRVT  
BQ294534DRVR  
BQ294582DRVR  
BQ294582DRVR  
BQ294582DRVT  
BQ294582DRVT  
BQ294592DRVR  
BQ294592DRVR  
BQ294592DRVT  
BQ294592DRVT  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000  
250  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
2.3  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
1.15  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
Q2  
250  
3000  
3000  
250  
250  
3000  
250  
3000  
3000  
3000  
250  
250  
3000  
3000  
250  
250  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
18-Jul-2023  
TAPE AND REEL BOX DIMENSIONS  
Width (mm)  
H
W
L
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
BQ294502DRVR  
BQ294502DRVR  
BQ294502DRVT  
BQ294502DRVT  
BQ294504DRVR  
BQ294504DRVR  
BQ294504DRVT  
BQ294504DRVT  
BQ294506DRVR  
BQ294506DRVR  
BQ294506DRVT  
BQ294512DRVR  
BQ294512DRVT  
BQ294522DRVR  
BQ294522DRVT  
BQ294524DRVR  
BQ294524DRVR  
BQ294524DRVT  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000  
3000  
250  
182.0  
210.0  
182.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
182.0  
185.0  
182.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
20.0  
35.0  
20.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
250  
3000  
3000  
250  
250  
3000  
3000  
250  
3000  
250  
3000  
250  
3000  
3000  
250  
Pack Materials-Page 3  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
18-Jul-2023  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
BQ294524DRVT  
BQ294532DRVR  
BQ294532DRVR  
BQ294532DRVT  
BQ294532DRVT  
BQ294533DRVR  
BQ294533DRVT  
BQ294534DRVR  
BQ294582DRVR  
BQ294582DRVR  
BQ294582DRVT  
BQ294582DRVT  
BQ294592DRVR  
BQ294592DRVR  
BQ294592DRVT  
BQ294592DRVT  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
DRV  
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
250  
3000  
3000  
250  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
250  
3000  
250  
3000  
3000  
3000  
250  
250  
3000  
3000  
250  
250  
Pack Materials-Page 4  
GENERIC PACKAGE VIEW  
DRV 6  
WSON - 0.8 mm max height  
PLASTIC SMALL OUTLINE - NO LEAD  
Images above are just a representation of the package family, actual package may vary.  
Refer to the product data sheet for package details.  
4206925/F  
PACKAGE OUTLINE  
DRV0006A  
WSON - 0.8 mm max height  
SCALE 5.500  
PLASTIC SMALL OUTLINE - NO LEAD  
2.1  
1.9  
A
B
PIN 1 INDEX AREA  
2.1  
1.9  
0.8  
0.7  
C
SEATING PLANE  
0.08 C  
(0.2) TYP  
0.05  
0.00  
1
0.1  
EXPOSED  
THERMAL PAD  
3
4
6
2X  
7
1.3  
1.6 0.1  
1
4X 0.65  
0.35  
0.25  
6X  
PIN 1 ID  
(OPTIONAL)  
0.3  
0.2  
6X  
0.1  
C A  
C
B
0.05  
4222173/B 04/2018  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
DRV0006A  
WSON - 0.8 mm max height  
PLASTIC SMALL OUTLINE - NO LEAD  
6X (0.45)  
6X (0.3)  
(1)  
1
7
6
SYMM  
(1.6)  
(1.1)  
4X (0.65)  
4
3
SYMM  
(1.95)  
(R0.05) TYP  
(
0.2) VIA  
TYP  
LAND PATTERN EXAMPLE  
SCALE:25X  
0.07 MIN  
ALL AROUND  
0.07 MAX  
ALL AROUND  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
METAL  
SOLDER MASK  
OPENING  
NON SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
4222173/B 04/2018  
NOTES: (continued)  
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature  
number SLUA271 (www.ti.com/lit/slua271).  
5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
DRV0006A  
WSON - 0.8 mm max height  
PLASTIC SMALL OUTLINE - NO LEAD  
SYMM  
7
6X (0.45)  
METAL  
1
6
6X (0.3)  
(0.45)  
SYMM  
4X (0.65)  
(0.7)  
4
3
(R0.05) TYP  
(1)  
(1.95)  
SOLDER PASTE EXAMPLE  
BASED ON 0.125 mm THICK STENCIL  
EXPOSED PAD #7  
88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE  
SCALE:30X  
4222173/B 04/2018  
NOTES: (continued)  
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
www.ti.com  
重要声明和免责声明  
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，  
不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担  
保。  
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验  
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。  
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。  
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成  
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TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改  
TI 针对 TI 产品发布的适用的担保或担保免责声明。  
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邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2023，德州仪器 (TI) 公司  

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