BQ500211A [TI]
5-V, WPC1.1 Compliant Wireless Power Transmitter Manager; 5 -V , WPC1.1符合无线电源发送器管理器型号: | BQ500211A |
厂家: | TEXAS INSTRUMENTS |
描述: | 5-V, WPC1.1 Compliant Wireless Power Transmitter Manager |
文件: | 总27页 (文件大小:1010K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
bq500211A
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SLUSBB1 – DECEMBER 2012
5-V, WPC1.1 Compliant Wireless Power Transmitter Manager
Check for Samples: bq500211A
1
FEATURES
DESCRIPTION
The bq500211A is
a second generation digital
2
•
•
Intelligent Control of Wireless Power Transfer
wireless power controller that integrates all functions
required to control wireless power transfer to a single
WPC compliant receiver. It is WPC1.1 compliant and
designed for 5-V systems as either a WPC type A5
transmitter with a magnetic positioning guide or as a
WPC type A11 transmitter without the magnetic
guide. The bq500211A pings the surrounding
environment for WPC compliant devices to be
powered, safely engages the device, receives packet
communication from the powered device and
manages the power transfer. To maximize flexibility in
wireless power applications, Dynamic Power
Limiting™ (DPL) is featured on the bq500211A. DPL
enhances user experience by seamlessly optimizing
the usage of power available from limited input
supplies. The bq500211A supports both Foreign
Object Detection (FOD) and Parasitic Metal Object
Detection (PMOD) by continuously monitoring the
efficiency of the established power transfer,
protecting from power lost due to metal objects
misplaced in the wireless power transfer bath. Should
any abnormal condition develop during power
transfer, the bq500211A handles it and provides
indicator outputs. Comprehensive status and fault
monitoring features enable a robust system design.
5-V Operation Conforms to Wireless Power
Consortium (WPC) Type A5 and Type A11
Transmitter Specifications
•
•
•
WPC1.1 Compliant, Including Foreign Object
Detection (FOD)
Enhanced Parasitic Metal Detection (PMOD)
Assures Safety
Dynamic Power Limiting™ for USB and
Limited Source Operation
•
•
Digital Demodulation Reduces Components
LED Indication of Charging State and Fault
Status
APPLICATIONS
•
WPC 1.1 Compliant Wireless Chargers For:
–
Qi-Certified Smart Phones and other
Handhelds
–
–
–
Hermetically Sealed Devices and Tools
Cars and Other Vehicles
Tabletop Charge Surfaces
•
See www.ti.com/wirelesspower for More
Information on TI's Wireless Charging
Solutions
The bq500211A is available in a 48-pin, 7 mm x 7
mm QFN package and operates over a temperature
range from –40°C to 110°C.
Functional Diagram and Efficiency Versus System Output Power
80
Transmitter
Receiver
Power
70
60
50
40
30
20
10
0
Power
Stage
Voltage
Conditioning
AC-DC
Rectification
Load
Communication
BQ500211 A
Controller
Feedback
bq51013
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Output Power (W)
G000
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Dynamic Power Limiting is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated
bq500211A
SLUSBB1 – DECEMBER 2012
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION(1)
OPERATING
TEMPERATURE
RANGE, TA
TOP SIDE
MARKING
ORDERABLE PART NUMBER
PIN COUNT
SUPPLY
PACKAGE
bq500211ARGZR
bq500211ARGZT
48 pin
48 pin
Reel of 2500
Reel of 250
QFN
QFN
bq500211A
bq500211A
-40°C to 110°C
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
MIN
–0.3
–0.3
–0.3
–40
MAX
3.6
Voltage applied at V33D to GND
Voltage applied at V33A to GND
3.6
V
(2)
Voltage applied to any pin
3.6
Storage temperature,TSTG
150
°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages referenced to GND.
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RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN TYP MAX UNIT
V
Supply voltage during operation, V33D, V33A
Operating free-air temperature range
Junction temperature
3.0
3.3
3.6
110
110
V
TA
TJ
–40
°C
THERMAL INFORMATION
bq500211A
RGZ
48 PINS
28.4
THERMAL METRIC(1)
UNITS
θJA
Junction-to-ambient thermal resistance(2)
Junction-to-case (top) thermal resistance(3)
Junction-to-board thermal resistance(4)
Junction-to-top characterization parameter(5)
Junction-to-board characterization parameter(6)
Junction-to-case (bottom) thermal resistance(7)
θJCtop
θJB
14.2
5.4
°C/W
ψJT
0.2
ψJB
5.3
θJCbot
1.4
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
Spacer
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ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
IV33A
V33A = 3.3 V
8
44
52
15
55
60
IV33D
Supply current
V33D = 3.3 V
mA
ITOTAL
V33D = V33A = 3.3 V
INTERNAL REGULATOR CONTROLLER INPUTS/OUTPUTS
V33
3.3-V linear regulator
Emitter of NPN transistor
3.25
40
3.3
4
3.6
4.6
V
V33FB
IV33FB
Beta
3.3-V linear regulator feedback
Series pass base drive
Series NPN pass device
VIN = 12 V; current into V33FB pin
10
mA
EXTERNALLY SUPPLIED 3.3 V POWER
V33D
V33A
Digital 3.3-V power
Analog 3.3-V power
TA = 25°C
TA = 25°C
3
3
3.6
3.6
V
V33 slew rate between 2.3 V and 2.9 V,
V33A = V33D
V33Slew
V33 slew rate
0.25
V/ms
DIGITAL DEMODULATION INPUTS COMM_A+, COMM_A-, COMM_B+, COMM_B-
VCM
Common mode voltage each pin
–0.15
1.631
V
COMM+,
COMM-
Modulation voltage digital resolution
1
mV
REA
Input impedance
Ground reference
0.5
–5
1.5
3
5
MΩ
IOFFSET
Input offset current
1-kΩ source impedance
µA
ANALOG INPUTS V_SENSE, I_SENSE, T_SENSE, LED_MODE
VADDR_OPEN
VADDR_SHORT
VADC_RANGE
INL
Voltage indicating open pin
Voltage indicating pin shorted to GND
Measurement range for voltage monitoring
ADC integral nonlinearity
Input leakage current
LED_MODE open
2.37
LED_MODE shorted to ground
ALL ANALOG INPUTS
0.36
2.5
V
0
-2.5
2.5
mV
nA
Ilkg
3 V applied to pin
Ground reference
100
RIN
Input impedance
8
MΩ
pF
CIN
Input capacitance
10
DIGITAL INPUTS/OUTPUTS
DGND1
+ 0.25
VOL
VOH
Low-level output voltage
IOL = 6 mA , V33D = 3 V
IOH = -6 mA , V33D = 3 V
V33D
- 0.6V
High-level output voltage
V
VIH
High-level input voltage
Low-level input voltage
Output high source current
Output low sink current
V33D = 3V
2.1
3.6
1.4
4
VIL
V33D = 3.5 V
IOH(MAX)
IOL(MAX)
mA
4
SYSTEM PERFORMANCE
VRESET
tRESET
fSW
Voltage where device comes out of reset
V33D Pin
2.3
2
2.4
V
Pulse width needed for reset
Switching Frequency
RESET pin
µs
112
205
0.5
kHz
Time to detect presence of device requesting
power
tdetect
s
tretention
Retention of configuration parameters
TJ = 25°C
100
Years
4
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DEVICE INFORMATION
Functional Block Diagram
7
8
9
MSP430_RST/LED_A
bq500211A
LED Control /
Low Power
MSP430_MISO/LED_B
MSP430_TEST
Supervisor
Interface
COMM_A+ 37
COMM_A- 38
COMM_B+ 39
COMM_B- 40
14 MSP430_SYNC
18 MSP430_CLK
Digital
Demodulation
25 MSP430_MOSI/LPWR_EN
26 MSP430_TDO/PROG
12 DPWM-A
13 DPWM-B
Controller
PWM
V_Sense 46
I_Sense 42
23 BUZ_AC
24 BUZ_DC
12-bit
ADC
Buzzer
Control
T_Sense
LoPWR
2
4
Low
Power
Control
LED_MODE 44
11 PMB_DATA
10 PMB_CLK
I2C
TEMP_INT
6
5
SLEEP RESET
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RGZ Package
(Top View)
48 47 46 45 44 43 42 41 40 39 38 37
36
AIN5
T_SENSE
AIN3
1
2
3
4
5
6
7
8
9
GND
35
34
33
32
BPCAP
V33A
LoPWR
RESET
SLEEP
V33D
GND
RESERVED
31
bq500211A
MSP_RST/LED_A
MSP_MISO/LED_B
MSP_TEST
30
RESERVED
RESERVED
RESERVED
29
28
10
11
12
27
26
25
RESERVED
PMB_CLK
PMB_DATA
MSP_TDO/PROG
MSP_MOSI/LPWR_EN
DPWM_A
13 14 15 16 17 18 19 20 21 22 23 24
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PIN FUNCTIONS
PIN
NAME
I/O
DESCRIPTION
NO.
3
This pin can be either connected to GND or left open. Connecting to GND can improve
layout grounding.
AIN3
I
1
This pin can be either connected to GND or left open. Connecting to GND can improve
layout grounding.
AIN5
AIN7
I
I
45
This pin can be either connected to GND or left open. Connecting to GND can improve
layout grounding.
35
23
24
BPCAP
—
O
Bypass capacitor for internal 1.8-V core regulator. Connect bypass capacitor to GND.
AC Buzzer Output. Outputs a 400-ms, 4-kHz AC pulse when charging begins.
BUZ_AC
DC Buzzer Output. Outputs a 400-ms DC pulse when charging begins. This could also be
connected to an LED via 470-Ω resistor.
BUZ_DC
O
37
38
39
40
22
21
15
12
COMM_A+
COMM_A-
COMM_B+
COMM_B-
DOUT_RX
DOUT_TX
DOUT_2B
I
I
Digital demodulation non-inverting input A, connect parallel to input B+.
Digital demodulation inverting input A, connect parallel to input B-.
Digital demodulation non-inverting input B, connect parallel to input A+.
Digital demodulation inverting input B, connect parallel to input A-.
Leave this pin open.
I
I
I
I
Leave this pin open.
O
Optional Logic Output 2B. Leave this pin open.
PWM Output A, controls one half of the full bridge in a phase-shifted full bridge. Switching
deadtimes must be externally generated.
DPWM_A
O
13
PWM Output B, controls other half of the full bridge in a phase-shifted full bridge. Switching
deadtimes must be externally generated.
DPWM_B
EPAD
O
-
49
16
Flood with copper GND plane and stitch vias to PCB internal GND plane.
FOD read pin. Leave open unless PMOD and FOD thresholds need to be different. It
controls the FOD threshold resistor read at startup.
FOD
O
32
36
47
42
GND
GND
GND
—
—
—
I
GND.
GND.
GND.
Transmitter input current, used for efficiency calculations. Use 20-mΩ sense resistor and
A=50 gain current sense amplifier.
I_SENSE
LED_MODE
LoPWR
44
4
I
Input to select from 4 LED modes.
Dynamic Power Limiting™ (DPL) control pin. To set power mode to 500 mA, pull to GND.
For full-power operation pull to 3.3-V supply.
I
I
43
18
LOSS_THR
MSP_CLK
Input to program foreign and parasitic metal object detection threshold
Used for boot loading the MSP430 low power supervisor. If MSP430 is not used, leave this
pin floating.
I/O
8
7
MSP – TMS, SPI-MISO, LED-B -- If external MSP430 is not used, connect to an LED via
470-Ω resistor for status indication.
MSP_MISO/LED_B
MSP_RST/LED_A
I
I
MSP – Reset, LED-A -- If external MSP430 is not used, connect to an LED via 470-Ω
resistor for status indication.
14
26
9
MSP_SYNC
O
I/O
I
MSP SPI_SYNC, if external MSP430 is not used, leave this pin open.
MSP-TDO, MSP430 programmed indication.
MSP_TDO/PROG
MSP_TEST
MSP – Test, If external MSP430 is not used, leave this pin open.
Low standby power supervisor enable. If low power is not needed, connect this to GND.
25
17
MSP_MOSI/LPWR_EN
I/O
PMOD read pin. Leave open unless PMOD and FOD thresholds need to be different. It
controls the PMOD threshold resistor read at startup.
PMOD
O
10
11
PMB_CLK
I/O
I/O
10-kΩ pull-up resistor to 3.3-V supply.
10-kΩ pull-up resistor to 3.3-V supply.
PMB_DATA
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PIN FUNCTIONS (continued)
PIN
I/O
DESCRIPTION
NO.
19
20
48
27
28
29
30
31
41
5
NAME
RESERVED
O
I
Reserved, leave this pin open.
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESET
Reserved, connect to GND.
I
External Reference Voltage Input. Connect this input to GND.
Reserved, leave this pin open.
I/O
I/O
I/O
I/O
I/O
O
Reserved, leave this pin open.
Reserved, leave this pin open.
Reserved, leave this pin open.
Reserved, connect 10-kΩ pull-down resistor to GND.
Reserved, leave this pin open.
I
Device reset. Use a 10-kΩ to 100-kΩ pull-up resistor to the 3.3-V supply.
Low-power mode output. Starts low-power ping cycle.
6
SLEEP
O
2
Sensor Input. Device shuts down when below 1 V. If not used, keep above 1 V by
connecting to the 3.3-V supply.
T_SENSE
V_SENSE
V33A
I
I
46
34
33
Transmitter input voltage, used for efficiency calculations. Use 76.8-kΩ to 10-kΩ divider to
minimize quiescent current.
—
—
Analog 3.3-V Supply. This pin can be derived from V33D supply, decouple with 10-Ω resistor
and additional bypass capacitors
Digital core 3.3-V supply. Be sure to decouple with bypass capacitors as close to the part as
possible.
V33D
Typical Characteristics Curves
60
50
40
30
20
10
0
80
70
60
50
40
30
20
CSD17308Q2
CSD16301Q2
10
0
1.7
1.9
2.1
2.3
2.5
2.7
2.9
3.1
3.3
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Output Current (A)
1
Input Voltage (V)
G000
G000
Figure 1. bq500211A Supply Current vs. VCC Voltage
Figure 2. System Efficiency Using Alternate MOSFETs
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Principles of Operation
Fundamentals
The principle of wireless power transfer is simply an open cored transformer consisting of primary and secondary
coils and associated electronics. The primary coil and electronics are also referred to as the transmitter, and the
secondary side the receiver. The transmitter coil and electronics are typically built into a charger pad. The
receiver coil and electronics are typically built into a portable device, such as a cell-phone.
When the receiver coil is positioned on the transmitter coil, magnetic coupling occurs when the transmitter coil is
driven. The flux is coupled into the secondary coil which induces a voltage, current flows, it is rectified and power
can be transferred quite effectively to a load - wirelessly. Power transfer can be managed via any of various
familiar closed-loop control schemes.
Wireless Power Consortium (WPC)
The Wireless Power Consortium (WPC) is an international group of companies from diverse industries. The WPC
standard was developed to facilitate cross compatibility of compliant transmitters and receivers. The standard
defines the physical parameters and the communication protocol to be used in wireless power. For more
information, go to www.wirelesspowerconsortium.com.
Power Transfer
Power transfer depends on coil coupling. Coupling is dependant on the distance between coils, alignment, coil
dimensions, coil materials, number of turns, magnetic shielding, impedance matching, frequency and duty cycle.
Most importantly, the receiver and transmitter coils must be aligned for best coupling and efficient power transfer.
The closer the space between the coils, the better the coupling, but the practical distance is set to be less than 5
mm (as defined within the WPC Specification) to account for housing and interface surfaces.
Shielding is added as a backing to both the transmitter and receiver coils to direct the magnetic field to the
coupled zone. Magnetic fields outside the coupled zone do not transfer power. Thus, shielding also serves to
contain the fields to avoid coupling to other adjacent system components.
Regulation can be achieved by controlling any one of the coil coupling parameters. For WPC compatibility, the
transmitter coils and capacitance are specified and the resonant frequency point is fixed at 100 kHz. Power
transfer is regulated by changing the operating frequency between 112 kHz to 205 kHz. The higher the
frequency, the further from resonance and the lower the power. Duty cycle remains constant at 50% throughout
the power band and is reduced only once 205 kHz is reached.
The WPC standard describes the dimension and materials of the coils. It also has information on tuning the coils
to resonance. The value of the inductor and resonant capacitor are critical to proper operation and system
efficiency.
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Communication
Communication within the WPC is from the receiver to the transmitter, where the receiver tells the transmitter to
send power and how much. In order to regulate, the receiver must communicate with the transmitter whether to
increase or decrease frequency. The receiver monitors the rectifier output and using Amplitude Modulation (AM),
sends packets of information to the transmitter. A packet is comprised of a preamble, a header, the actual
message and a checksum, as defined by the WPC standard.
The receiver sends a packet by modulating an impedance network. This AM signal reflects back as a change in
the voltage amplitude on the transmitter coil. The signal is demodulated and decoded by the transmitter side
electronics and the frequency of its coil drive output is adjusted to close the regulation loop. The bq500211A
features internal digital demodulation circuitry.
The modulated impedance network on the receiver can either be resistive or capacitive. Figure 3 shows the
resistive modulation approach, where a resistor is periodically added to the load and also shows the resulting
change in resonant curve which causes the amplitude change in the transmitter voltage indicated by the two
operating points at the same frequency. Figure 4 shows the capacitive modulation approach, where a capacitor
is periodically added to the load and also shows the resulting amplitude change in the transmitter voltage.
Rectifier
Receiver
Capacitor
Amax
Receiver Coil
Modulation
Resitor
Operating state at logic “0”
Operating state at logic “1”
A(0)
A(1)
Comm
Fsw
F, kHz
a)
b)
Figure 3. Receiver Resistive Modulation Circuit
Rectifier
Receiver
Capacitor
Receiver Coil
Amax
Modulation
Capacitors
Operating state at logic “ 0”
Operating state at logic “ 1”
A(0)
A(1)
Comm
Fsw
F, kHz
Fo(1) < Fo(0)
a)
b)
Figure 4. Receiver Capacitive Modulation Circuit
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Application Information
Coils and Matching Capacitors
The coil and matching capacitor selection for the transmitter has been established by WPC standard. This is
fixed and cannot be changed on the transmitter side.
An up to date list of available and compatible A5 and A11 transmitter coils can be found here (Texas Instruments
Literature Number SLUA649):
Capacitor selection is critical to proper system operation. A total capacitance value of 400 nF is required in the
resonant tank. This is the WPC system compatibility requirement, not a guideline, and must be followed.
NOTE
A total capacitance value of 400 nF/50 V (C0G dielectric type or equivalent) is required in
the resonant tank to achieve a 100-kHz resonance frequency.
The capacitors chosen must be rated for at least 50 V and must be of high quality C0G dielectric or equivalent.
These are typically available in a 5% tolerance. The use of X7R types or below is not recommended if WPC
compliance is required because critical WPC certification testing, such as the minimum modulation requirement,
might fail.
A 400-nF capacitor is not a standard value and therefore several must be combined in parallel. The designer can
combine a (4 nF x 100 nF) or a (180 nF + 220 nF) along with other combinations depending on market
availability. All capacitors must be of high quality C0G type or equivalent and not mixed with lesser dielectric
types.
Dynamic Power Limiting™
Dynamic Power Limiting™ (DPL) allows operation from a 5-V supply with limited current capability (such as a
USB port). There are two modes of operation selected via an input pin. In the dynamic mode, when the input
voltage is observed drooping, the output power is limited to reduce the load and provides margin relative to the
supply’s capability. The second mode, or constant current mode, is designed specifically for operation from a
500-mA capable USB port, it restricts the output such that the input current remains below the 500-mA limit.
NOTE
Pin 4 must always be terminated, else erratic behavior may result.
Anytime the DPL control loop is regulating the operating point of the transmitter, the LED will indicate that DPL is
active. The LED color and flashing pattern are determined by the LED Table. If the receiver sends a Control
Error Packet (CEP) with a negative value, (for example, to reduce power to the load), the WPTX in DPL mode
will respond to this CEP via the normal WPC control loop.
NOTE
Depending on LED_MODE selected, the power limit indication may be either solid amber
(green + red) or solid red.
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Option Select Pin
Two pins (pin 43 and pin 44) on the bq500211A are allocated to program the Loss Threshold and the LED mode
of the device. At power up, a bias current is applied to pins LED_MODE and LOSS_THR and the resulting
voltage measured in order to identify the value of the attached programming resistor. The values of the operating
parameters set by these pins are determined using Table 2. For LED_MODE, the selected bin determines the
LED behavior based on Table 1; for the LOSS_THR, the selected bin sets a threshold used for parasitic metal
object detection (see Parasitic Metal Detection (PMOD) and Foreign Object Detection (FOD) section). Table 1.
bq500411A
LED_MODE
44
Resistors
LOSS_THR
43
to set
To 12-bit ADC
options
Figure 5. Option Select Pin Programming
LED Indication Modes
The bq500211A can directly drive two LED outputs (pin 7 and pin 8) through a simple current limit resistor
(typically 470 Ω), based on the mode selected. The two current limit resistors can be individually adjusted to tune
or match the brightness of the two LEDs. Do not exceed the maximum output current rating of the device.
The resistor in Figure 5 connected to pin 44 and GND selects the desired LED indication scheme in Table 1.
Table 1. LED Modes
Operational States
LED
LED
DYNAMIC
POWER
LIMITING™
CONTROL
OPTION
SELECTION
RESISTOR
DESCRIPTION
LED
POWER
TRANSFER
CHARGE
COMPLETE
STANDBY
FAULT
LED1, green
LED2, red
LED1, green
LED2, red
LED1, green
LED2, red
LED1, green
LED2, red
LED1, green
LED2, red
-
X
1
2
3
4
< 36.5 kΩ
42.2 kΩ
48.7 kΩ
56.2 kΩ
Reserved, do not use
-
-
-
-
-
Off
Off
On
On
Off
Off
Off
Off
-
Blink slow
On
Off
On
Off
On
Off
Off
Off
-
Off
Blink slow
Blink slow
Blink slow
Blink slow
Off
Choice number 1
Choice number 2
Choice number 3
Off
On
Blink slow
Off
Off
Off
On
On
Off
-
On
Off
Blink slow
On
Off
On
-
Off
64.9 kΩ
> 75 kΩ
Choice number 4
Blink slow
-
Reserved, all LED off
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Parasitic Metal Object Detect (PMOD) and Foreign Object Detection (FOD)
The bq500211A is WPC1.1 compliant and supports both enhanced PMOD and the new FOD features by
continuously monitoring the input voltage and current to calculate input power. Combining input power, known
losses, and the value of power reported by the RX device being charged, the bq500211A can estimate how
much power is unaccounted for and presumed lost due to metal objects placed in the wireless power transfer
path. If this unexpected loss exceeds the threshold set by the LOSS_THR resistor, a fault is indicated and power
transfer is halted. Whether the PMOD or the FOD algorithm is used is determined by the ID packet of the
receiver being charged.
PMOD has certain inherent weaknesses as rectified power is not ensured to be accurate per WPC1.0
Specification. The user has the flexibility to adjust the LOSS_THR resistor to suit the application. Should issues
with compliance or interoperability arise, the PMOD feature can be selectively disabled as explained below.
The FOD algorithm uses information from an in-system characterized and WPC1.1 certified RX and it is therefore
more accurate. Where the WPC1.0 specification merely requires the Rectified Power packet, the WPC1.1
specification additionally uses the Received Power packet which more accurately tracks power used by the
receiver.
As the default, PMOD and FOD share the same LOSS_THR setting resistor for which the recommended starting
point is 400 mW (selected by a 56.2-kΩ resistor on the LOSS_THR option pin 43). That value has been
empirically determined using standard WPC disc, ring and foil FOD test objects. Some tuning might be required
in the final system as every system will be different. This tuning is best done by trial and error, use the set
resistor values given in the table to increase or decrease the loss threshold and retry the system with the
standard test objects. The ultimate goal of the FOD feature is safety, to protect misplaced metal objects from
becoming hot. Reducing the loss threshold and making the system too sensitive will lead to false trips and a bad
user experience. Find the balance which best suits the application.
If the application requires disabling one or the other or setting separate PMOD and FOD thresholds, a setting
resistor of appropriate value can be connected directly from the LOSS_THR (pin43) to the FOD (pin16) or PMOD
(pin17) pins, as needed. These pins are then read at power up and the correct respective values are set. To
selectively disable PMOD, for example, only the chosen FOD resistor value would be connected between
LOSS_THR (pin43) and FOD (pin 16) and PMOD (pin17) would left open.
Resistors of 1% tolerance must be used for proper detection of the desired bin.
Table 2. Option Select Bins
LOSS THRESHOLD
BIN NUMBER
RESISTANCE (kΩ)
(mW)
0
1
<36.5
42.2
48.7
56.2
64.9
75.0
86.6
100
250
300
2
350
3
400
4
450
5
500
6
550
7
600
8
115
650
9
133
700
10
11
12
13
154
750
800
178
205
850
>237
Feature Disabled
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Shut Down via External Thermal Sensor or Trigger
Typical applications of the bq500211A will not require additional thermal protection. This shutdown feature is
provided for enhanced applications and is not only limited to thermal shutdown. The key parameter is the 1.0 V
threshold on pin 2. Voltage below 1.0 V on pin 2 causes the device to shutdown.
The application of thermal monitoring via a Negative Temperature Coefficient (NTC) sensor, for example, is
straightforward. The NTC forms the lower leg of a temperature dependant voltage divider. The NTC leads are
connected to the bq500211A device, pin 2 and GND. The threshold on pin 2 is set to 1.0 V, below which the
system shuts down and a fault is indicated (depending on LED mode chosen).
To implement this feature follow these steps:
1) Consult the NTC datasheet and find the resistence vs temperature curve.
2) Determine the actual temperature where the NTC will be placed by using a thermal probe.
3) Read the NTC resistance at that temperature in the NTC datasheet, that is R_NTC.
4) Use the following formula to determine the upper leg resistor (R_Setpoint):
R _Setpoint = 2.3´R _NTC
(1)
The system will restore normal operation after approximately five minutes or if the receiver is removed. If the
feature is not used, this pin must be pulled high.
NOTE
Pin 2 must always be terminated, else erratic behavior may result.
3V3_VCC
Optional
Temperature
R_Setpoint
Sensor
2
T_SENSE
AGND
AGND
Figure 6. Negative Temperature Coefficient (NTC) Application
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Fault Handling and Indication
The following is a table of End Power Transfer (EPT) packet responses, fault conditions, the duration how long
the condition lasts until a retry in attempted. The LED mode selected determines how the LED indicates the
condition or fault.
DURATION
CONDITION
HANDLING
(before retry)
Immediate
5 seconds
Infinite
EPT-00
EPT-01
Unknown
Charge complete
Internal fault
EPT-02
EPT-03
5 minutes
Immediate
Immediate
Infinite
Over temperature
Over voltage
EPT-04
EPT-05
Over current
EPT-06
Battery failure
Reconfiguration
No response
EPT-07
Not applicable
Immediate
Immediate
1 minute
EPT-08
OVP (over voltage)
OC (over current)
NTC (external sensor)
5 minutes
10 seconds LED only,
2 seconds LED +
buzzer
PMOD/FOD warning
PMOD/FOD
12 seconds
5 minutes
Power Transfer Start Signal
The bq500211A features two signal outputs to indicate that power transfer has begun. Pin 23 outputs a 400-ms
duration, 4-kHz square wave for driving low cost AC type ceramic buzzers. Pin 24 outputs logic high, also for 400
ms, which is suitable for DC type buzzers with built-in tone generators, or as a trigger for any type of customized
indication scheme. If not used, these pins can be left open.
Power-On Reset
The bq500211A has an integrated Power-On Reset (POR) circuit which monitors the supply voltage and handles
the correct device startup sequence. Additional supply voltage supervisor or reset circuits are not needed.
External Reset, RESET Pin
The bq500211A can be forced into a reset state by an external circuit connected to the RESET pin. A logic low
voltage on this pin holds the device in reset. For normal operation, this pin is pulled up to 3.3 VCC with a 10-kΩ
pull-up resistor.
Trickle Charge and CS100
The WPC specification provides an End-of-Power Transfer message (EPT–01) to indicate charge complete.
Upon receipt of the charge complete message, the bq500211A will change the LED indication to solid green LED
output and halt power transfer for 5 seconds.
In some battery charging applications there is a benefit to continue the charging process in trickle-charge mode
to top off the battery. There are several information packets in the WPC specification related to the levels of
battery charge (Charge Status). The bq500211A uses these commands to enable top-off charging. The
bq500211A changes the LED indication to reflect charge complete when a Charge Status message is 100%
received, but unlike the response to an EPT, it will not halt power transfer while the LED is solid green. The
mobile device can use a CS100 packet to enable trickle charge mode.
If the reported charge status drops below 90% normal, charging indication will be resumed.
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Current Monitoring Requirements
The bq500211A is WPC1.1 ready. In order to enable the PMOD or FOD features, current monitoring must be
provided in the design.
Current monitoring is optional however, it is used for the foreign metal protection features and over current
protection. The system designer can choose not to include the current monitor and remain WPC1.0 compliant.
Alternately, the additional current monitoring circuitry can be added to the hardware design but not loaded. This
would enable a forward migration path to future WPC1.1 compatibility.
For proper scaling of the current monitor signal, the current sense resistor should be 20 mΩ and the current
shunt amplifier should have a gain of 50, such as the INA199A1. The current sense resistor has a temperature
stability of ±200 PPM. Proper current sensing techniques in the application hardware should also be observed.
Over-Current Protection
The bq500211A has an integrated current protection feature which monitors the input current reported by the
current sense resistor and amplifier. If the input current exceeds a safety threshold, a fault is indicated and power
transfer is halted for one minute.
If this feature is desired, the sense resistor and amplifier are required. If this feature is not desired, the I_SENSE
input pin to the bq500410A (pin 42) should be grounded.
NOTE
Always terminate the I_SENSE pin (pin 42), either with the output of a current monitor
circuit or by connecting to ground.
MSP430G2001 Low Power Supervisor
This is an optional low-power feature. By adding the MSP430G2001, the entire bq500211A is periodically shut
down to conserve power, yet all relevant states are recalled and all running LED status indicators remain on.
MSP430 Low Power Supervisor Details
Since the bq500211A needs an external low-power mode to significantly reduce power consumption, one way of
positively achieving that goal is to remove its supply and completely shut it down. In doing so, however, the
bq500211A goes through a reset and any data in memory would be lost. Important information regarding charge
state, fault condition and operating mode would be cleared. The MSP430G2001 maintains the LED indication
and stores previous charge state during the bq500211A reset period.
The LEDs indicators are now driven by the MSP430G2001, do not exceed the pin output current drive limit.
Using the suggested circuitry, a standby power reduction from 300 mW to less than 90 mW can be expected
making it possible to achieve Energy Star rating.
The user does not need to program the MSP430G2001, an off-the-shelf part and any of the available packages
can be used as long as the connections are correct. The required MSP430G2001 firmware is embedded in the
bq500211A and is boot loaded at first power up, similar to a field update. The MSP430G2001 code cannot be
modified by the user.
NOTE
The user cannot program the MSP430G2001 in this system.
All Unused Pins
All unused pins can be left open unless otherwise indicated. Pins 1, 3, 45 can be tied to GND and flooded with
copper to improve ground shielding. Please refer to the pin definition table for further explanations.
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APPLICATION INFORMATION
Overview
The application schematic for the transmitter with reduced standby power is shown in Figure 7.
CAUTION
Please check the bq500211A product page for the most up-to-date application
schematic and list of materials package before starting a new design.
Input Regulator
The bq500211A requires 3.3 VDC to operate. A buck regulator or a linear regulator can be used to step down
from the 5-V system input. Either choice is fully WPC compatible, the decision lies in the user's requirements with
respect to cost or efficiency.
For highest efficiency use a low-cost buck regulator, TPS62237, which on account of a 3-MHz switching
frequency, can use a 0805 size chip inductor. This results in a very attractive combination, high performance,
small size, ease of use and low cost.
Power Train
The bq500211A drives a phase-shifted full bridge. This is essentially twin half bridges and the choice of driver
devices is quite simple, a pair of TPS28225 synchronous MOSFET drivers are used with four CSD17308Q2
NexFETs. Other combinations work and system performance with regards to efficiency and EMI emissions vary.
Any alternate MOSFETs chosen must be fully saturated at 5-V gate drive and be sure to pay attention whether or
not to use gate resistors; some tuning might be required.
Low Power Supervisor
Power reduction is achieved by periodically disabling the bq500211A while LED and housekeeping control
functions are continued by U4 – the low-cost, low quiescent current microcontroller MSP430G2001. When U4 is
present in the circuit (which is set by a pull-up resistor on bq500211A pin 25), the bq500211A at first power-up
boots the MSP430G2001 with the necessary firmware and the two chips operate in tandem. During standby
operation, the bq500211A periodically issues a SLEEP command, Q12 pulls the RESET pin low, therefore
reducing its power consumption. Meanwhile, the MSP430G2001 maintains the LED indication and stores
previous charge state during this bq500211A reset period. This bq500211A reset period is set by the RC time
constant network of R26, C22 (see Figure 7). WPC compliance mandates receive detection within 500 ms, the
power transmitter controller, bq500211A, awakes every 400 ms to produce an analog ping and check if a valid
device is present. Increasing this time constant, therefore is not advised; shortening could result in faster
detection time with some decrease in efficiency.
Disabling Low Power Supervisor Mode
For lowest cost or if the low-power supervisor is not needed, please refer to Figure 8 for the application
schematic.
NOTE
Current sense shunt and amplifier circuitry are optional. The circuitry is needed to enable
Foreign Object Detection (FOD) and a forward migration path to WPC1.1 compliance.
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PCB Layout
A good PCB layout is critical to proper system operation and due care should be taken. There are many
references on proper PCB layout techniques.
Generally speaking, the system layout will require a 4-layer PCB layout, although a 2-layer PCB layout can be
achieved. A proven and recommended approach to the layer stack-up has been:
•
•
•
•
Layer 1, component placement and as much ground plane as possible.
Layer 2, clean ground.
Layer 3, finish routing.
Layer 4, clean ground.
Thus, the circuitry is virtually sandwiched between grounds. This minimizes EMI noise emissions and also
provides a noise free voltage reference plane for device operation.
Keep as much copper as possible. Make sure the bq500211A GND pins and the power pad have a continuous
flood connection to the ground plane. The power pad should also be stitched to the ground plane, which also
acts as a heat sink for the bq500211A. A good GND reference is necessary for proper bq500211A operation,
such as analog-digital conversion, clock stability and best overall EMI performance.
Separate the analog ground plane from the power ground plane and use only one tie point to connect grounds.
Having several tie points defeats the purpose of separating the grounds.
The COMM return signal from the resonant tank should be routed as a differential pair. This is intended to reduce
stray noise induction. The frequencies of concern warrant low-noise analog signaling techniques, such as
differential routing and shielding, but the COMM signal lines do not need to be impedance matched.
Typically a single chip controller solution with integrated power FET and synchronous rectifier will be used. To
create a tight loop, pull in the buck inductor and power loop as close as possible. Likewise, the power-train, full-
bridge components should be pulled together as tight as possible. See the bq500211AEVM-045, bqTESLA
Wireless Power TX EVM User's Guide (Texas Instruments Literature Number SLVU536) for layout examples.
References
Building a Wireless Power Transmitter, SLUA635
Technology, Wireless Power Consortium. http://www.wirelesspowerconsortium.com/
An Introduction to the Wireless Power Consortium Standard and TI’s Compliant Solutions, Johns, Bill.
BQ500210 Datasheet
BQ51013 Datasheet
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Typical Application Diagram
R
G
Z U B
D A P E
D N G
D N G
D N G
9 4
2 3
6 3
7 4
A 3 3 V
D 3 3 V
4 3
3 3
N I
C T N
Figure 7. bq500211A Typical Low-Standby Power Application Diagram
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D A P E
D N G
D N G
D N G
9 4
2 3
6 3
7 4
A 3 3 V
D 3 3 V
4 3
3 3
N I
Figure 8. bq500211A Typical Low-Cost Application Diagram
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PACKAGE OPTION ADDENDUM
www.ti.com
21-Dec-2012
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Samples
Drawing
(1)
(2)
(3)
(Requires Login)
BQ500211ARGZR
ACTIVE
VQFN
VQFN
RGZ
48
48
2500
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
BQ500211ARGZT
ACTIVE
RGZ
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BQ500211ARGZR
BQ500211ARGZT
VQFN
VQFN
RGZ
RGZ
48
48
2500
250
330.0
180.0
16.4
16.4
7.3
7.3
7.3
7.3
1.5
1.5
12.0
12.0
16.0
16.0
Q2
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
BQ500211ARGZR
BQ500211ARGZT
VQFN
VQFN
RGZ
RGZ
48
48
2500
250
367.0
210.0
367.0
185.0
38.0
35.0
Pack Materials-Page 2
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SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
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